Patent Application
20200203960
This relates generally to power systems, and, more particularly, to balancing battery cells in electronic devices.
Electronic devices have battery packs. Some battery packs are composed of multiple cells. Battery cells may, for example, be coupled in series. Individual cell voltages in a series battery pack may become unbalanced due to differences in the amount of charge stored on the cells. This can pose challenges in ensuring that charge is spread appropriately across individual cells within the pack.
An electronic device has a battery system with control circuitry for use during charging and discharging. The battery system is used in a portable electronic item or other equipment. The battery pack has two or more battery cells coupled in series. The control circuitry includes battery charging circuitry that applies a charging current to the battery pack during charging.
The control circuitry includes bleed resistors and switches that can be selectively activated to bleed charging current away from a selected cell during charging. This allows the control circuitry to balance charge stored on the cells and to thereby balance the voltages of the cells.
The control circuitry is configured to maintain information a difference in discharge rates of the cells. During operation, the control circuitry can maintain information on a difference between the charge stored on the first battery cell and the charge stored on the second battery cell. Information on this charge difference value is maintained during charging and discharging and is used in conjunction with information on the open-circuit-voltage-versus-charge behavior of the cells in establishing a battery pack charging voltage target to use during charging.
The control circuitry halts charging operations when the battery pack charging voltage target is reached to avoid charging the cells to more than a desired maximum value (e.g., to avoid overcharging). A voltage sensor is used to measure the voltage of the battery pack across the terminals of the battery pack. Because the battery pack charging voltage target sets a satisfactory charging voltage level for the entire battery pack, the pack can be charged to the voltage target without measuring the voltages of the individual cells within the battery pack.
Electronic devices contain battery packs (batteries) formed from multiple individual battery cells. Battery cells are connected in series and/or in parallel to form completed battery packs. A battery pack that has two battery cells connected in series may sometimes be referred to as a series-connected battery pack or a 2s battery pack. If desired, multi-cell battery packs can contain three or more cells connected in series.
It is desirable to balance the cell voltages on each of the individual cells in a multi-cell battery pack (e.g., each of the cells in a two-cell pack, a three-cell pack, or other types of multi-cell packs with cells electrically coupled in series). For example, in an electronic device with a 2s battery pack, it is desirable that the voltages on each of the two cells in the pack do not differ too much. This helps ensure that the cells maintain desired operating conditions, e.g., voltage levels.
The circuitry of
As shown in
Control circuitry in device 10 such as control circuitry 104 may be configured to perform operations in device 10 using hardware (e.g., dedicated hardware or circuitry), firmware and/or software. Software code for performing operations in system 8 is stored on non-transitory computer readable storage media (e.g., tangible computer readable storage media) in control circuitry 104. The software code may sometimes be referred to as software, data, program instructions, instructions, or code. The non-transitory computer readable storage media may include non-volatile memory such as non-volatile random-access memory (NVRAM), one or more hard drives (e.g., magnetic drives or solid state drives), one or more removable flash drives or other removable media, or the like. Software stored on the non-transitory computer readable storage media may be executed on the processing circuitry of control circuitry 104. The processing circuitry may include application-specific integrated circuits with processing circuitry, one or more microprocessors, a central processing unit (CPU) or other processing circuitry.
Electronic device 10 may include input-output circuitry as shown by input-output devices 94 of
Device 10 may, if desired, include wireless power circuitry 96. Circuitry 96 may include wireless power transmitter TX for transmitting wireless power signals and wireless power receiver RX for receiving wireless power signals. If desired, transmitter TX and/or receiver RX may be omitted to reduce cost and complexity for device 10.
Device 10 may include wired or wireless communications circuitry such as communications circuitry 102 of
Alternating-current-to-direct-current power converter circuitry such as AC-DC converter 90 may be included in device 10 (e.g., to convert power from an alternating-current source into direct-current power for use in powering the circuitry of device 10).
Device 10 includes a battery such as battery pack 92. Battery pack 92 includes battery cells. In an embodiment, battery pack 92 includes two cells in a 2s (series) configuration. Battery pack 92 may be a lithium battery pack (e.g., a pack using lithium-based battery chemistry such as a lithium ion chemistry).
Device 10 includes battery management circuitry such as control circuitry 112 (e.g., control circuitry forming part of control circuitry 104 of
Bleed resistors 116 may be used to draw (bleed away) charging current from a selected cell during charging to help balance the cells. The control operations performed by circuitry 118 may include, for example, selectively opening and closing switches 114 when it is desired to bleed a given battery cell through an associated one of bleed resistors 116. For example, when the voltage on battery cell BH is higher than desired relative to battery cell BL, the switch 114 that is associated with battery cell BH may be closed by circuitry 118 during charging, thereby causing current that would otherwise flow through cell BH to charge cell BH to be bleed off through the resistor 116 that is associated with cell BH. In this way, difference in the charge stored on battery cell BH relative to the charge stored on battery cell BL may be reduced during charging, helping to balance the associated voltages on cells BH and BL. If desired, current can be bled in a non-charging state (e.g., an idle state). For example, current can be bled using electrical components in device 10 during an idle state.
The circuitry that is coupled to battery pack 92 (e.g., circuitry 112) creates uneven parasitic (quiescent) drain currents for cells BH and BL. These parasitic currents, which may be on the order of microamps in magnitude, may be measured during battery pack manufacturing. Information on the parasitic currents flowing from cells BH and BL when circuitry 112 is in a quiescent state can be stored in circuitry in device 10 (e.g., circuitry 118 and/or other storage in control circuitry 104 of device 10). This knowledge of the different parasitic drain currents between cells BH and BL may be used in helping to determine the amount of charge imbalance that develops between cells BH and BL. In turn, information on the amount of charge imbalance can be used (in conjunction with knowledge of the open-circuit-voltage-versus-charge characteristic of the cells) in determining when to halt charging to prevent excessive voltage on either of cells BH and BL, even in arrangements in which circuitry 112 (e.g., the voltage sensor in circuitry 118) is only capable of measuring pack voltage between terminals T1 and T2 and is incapable of individually measuring the voltages on cells BH and BL.
Cells BH and BL may be balanced by selectively bleeding current away from the cell that has more charge. Current may be bleed away from a selected cell by closing the switch 114 for that cell and thereby switching into use the bleed resistor 114 for that cell. By dissipating power through the bleed resistor instead of using the power to charge the higher-voltage cell during charging, the higher-voltage cell will charge at a slower rate relative to the lower-voltage cell during charging. This tends to balance the higher-voltage and lower-voltage cells. (Balancers may also be activated when device 10 is not charging.) Although not all charge balancing may be accomplished in a given charge cycle, the amount of balancing that is accomplished during each charging period tends to be much larger than the amount of unbalancing that is imposed on the cells during each discharge period due to the differences in parasitic currents between the cells. As a result, the voltages on cells BH and BL tend to converge over time (e.g., over a series of charge-discharge cycles). Non-intuitively, this balancing expends some energy into a bleed resistor (e.g., during charging), but allows the battery pack to provide an overall superior user experience (e.g., during discharging).
An illustrative discharge and charge cycle is shown in
During charging time period TB between time t1 and time t3, cells BH and BL are charged by applying a charging current and charging voltage across terminals T1 and T2 (e.g., a charging voltage that exceeds the open circuit voltage of the pack) using circuitry 112. Initially, during period TB-1 between time t1 and t2, the bleed resistors in circuitry 112 may be switched out of use, so that both cells BH and BL are charged equally at a first (e.g., higher) rate. At time t2, when the voltage V3 on higher-voltage cell BH is close to the maximum desired cell voltage V4 (e.g., 4.35 volts or other desired maximum voltage), the bleed resistor for cell BH is switched into use using the switch 114 associated with that bleed resistor. This selectively bleeds power away from cell BH during charging, so that cell BH charges more slowly than cell BL (e.g., cells BH and BL are charged unequally during time period TB-2 between times t2 and t3). This is illustrated by VBH curve 120 and VBL curve 122 of
During operation of device 10, the discharge and charge periods of
During charging operations, control circuitry 104 (see, e.g., circuitry 112 of
A flow chart of illustrative operations involved in balancing pack 92 during operation of device 10 is shown in
During the operations of block 130, pack 92 discharges. Load 110 may be active and drawing relatively large amounts of current from pack 92 during discharging or load 110 may be electrically isolated from pack 92 so that the only current drawn from pack 92 is due to the presence of a quiescent load on pack 92. During discharging, the parasitic current drawn from cells BH and BL will differ, leading to charge unbalance between cells BH and BL. As described in connection with period TA of
When discharging stops at the end of time period TA, operations proceed to block 132. During the operations of block 132, control circuitry 104 (e.g., circuitry 112) determines the current (most up-to-date) value of ΔQ by adding the value of ΔQ produced during period TA to the value of ΔQ that was computed at the end of the last discharge period (e.g., control circuitry 104 maintains a running value for ΔQ and updates this information based on discharging activity). To prevent charging of cells in pack 92 more than desired, control circuitry 104 determines a battery pack charging voltage target Vtotal for pack 92 using ΔQ and the known open-circuit-voltage-versus-charge behavior of the cells. This target value represents the maximum desired voltage to be produced across terminals T1 and T2 (e.g., the maximum open circuit pack voltage to be obtained during charging). The value of Vtotal can be determined by predicting the voltages VBH and VBL for cells BH and BL, respectively and by setting Vtotal at a value that ensures that the higher of VBH and VBL (e.g., VBH in this example) does not exceed a desired maximum cell voltage Vcellmax (e.g., a desired maximum voltage such as 4.35 V or other suitable value).
In predicting the value of Vtotal that will cause voltage VBH to reach Vcellmax, control circuitry 104 uses the current value of ΔQ and the V versus Q characteristic of cells BH and BL. Control circuitry 104 takes into account the fact that cells BH and BL charge at the same rate during first charge period TB-1 and that cell BH charges at a slower rate than BL (due to the switched-in bleed resistor) during second charge period TB-2. The bleed resistor may be switched into use when a threshold in the state of charge of the higher-voltage cell is exceeded as determined by settings in control circuitry 112 (e.g., when the state of charge of battery BH exceeds an activation threshold of 98%). There is more charge current flowing into cell BL during period TB-2 than flowing into cell BH during period TB-2, so control circuitry 104 considers this disparity in charging current when computing the expected rise in BH over time. The value of QH (and therefore the resulting open circuit voltage VBH) can be computed by integrating the charging current into cell BH during both time periods TB-1 and TB-2. The expected rise in BL over time TB can also be computed by control circuitry 104 by integrating the charge current into cell BL during period TB. The bleed resistor for cell BL is not switched into use during period TB (in this example), so control circuitry 104 need not account for a reduction in charging current into cell BL during period TB-2.
During the operations of block 132, control circuitry 104 (e.g., circuitry 112) charges pack 94 until the value of Vtotal is reached. Circuitry 118 includes voltage sensor 188V, which measures the voltage across terminals T1 and T2. Circuitry 118 need not include (and, in an embodiment, does not include) any separate voltage sensors for independently measuring cell voltages VBH and VBL. Nevertheless, because control circuitry 104 determined an appropriate value of Vtotal taking into account the different charge states of BH and BL and taking into account the different charge rates of BH and BL during time period TB-2, the charging process of block 132 can be satisfactorily halted when the voltage of pack 92 reaches Vtotal (or, if desired, earlier due to an interruption of available charge power, commencement of a discharge cycle, etc.).
When charging stops, operations proceed to block 134. During the operations of block 134, control circuitry 104 determines the decrease in ΔQ that was achieved due to the balancing that has taken place during charging period TB. During one or more periods of time during charging period TB, the bleed resistors may be active and may help in balancing the cells. By accounting for these balancing operations, control circuitry 104 can determine the decrease in ΔQ that has been achieved.
If, for example, charging period TB was cut short by a need to begin discharging, not much balancing will have taken place (e.g., ΔQ at the end of the charging operations of block 132 will not differ significantly from ΔQ at the beginning of block 132). On the other hand, there will generally be periods in which significant charging takes place (e.g., sufficient charging to bring the pack voltage to Vtotal). In these longer charging scenarios, there is time for balancing to take place and control circuitry 104 can compute ΔQ from the integrated value of the difference in charge current supplied to BH and the charge current supplied to BL. During the operations of block 134, control circuitry 104 therefore measures the amount of time that charging took place during block 132 and accounts for any periods of time where the bleed resistor was switched into place (e.g., the period of charging after the activation threshold voltage was exceeded and the bleed resistor was switched into use to produce unequal charging rates and thereby balance cells BH and BL) and produces a corresponding updated value for AQ. Processing can then loop back to block 130.
The foregoing describes a technology that uses data communication in the context of power transfer operations. The present disclosure contemplates that it may be desirable for power transmitter and receiver circuitry to communicate information such as states of charge, charging speeds, so forth, to control power transfer. The above-described technology need not involve the use of personally identifiable information in order to function. To the extent that implementations of this charging technology involve the use of personally identifiable information, implementers should follow privacy policies and practices that are generally recognized as meeting or exceeding industry or governmental requirements for maintaining the privacy of users. In particular, personally identifiable information data should be managed and handled so as to minimize risks of unintentional or unauthorized access or use, and the nature of authorized use should be clearly indicated to users.
The foregoing is merely illustrative and various modifications can be made to the described embodiments. The foregoing embodiments may be implemented individually or in any combination.
This application claims the benefit of provisional patent application No. 62/781,985, filed Dec. 19, 2018, which is hereby incorporated by reference herein in its entirety.
| Number | Date | Country | |
|---|---|---|---|
| 62781985 | Dec 2018 | US |
