The present invention relates to a chip resistor.
In general, a chip resistor includes an insulating substrate, a resistive element formed on the surface of the insulating substrate, and electrodes disposed on either side of the resistive element.
In a method of manufacturing a chip resistor, large numbers of electrodes and resistive elements are formed on a large-sized substrate, and thereafter, the large-sized substrate is divided to obtain a large number of chip resistors.
The resistive elements are formed in large quantity by printing and baking a resistive paste on the surface of the large-sized substrate. At this time, inconsistencies easily occur in the resistance values of the resistive elements due to factors such as deposition inconsistencies and permeation during printing or uneven temperatures inside the baking furnace.
Consequently, resistance value adjustment work is performed to form trimming grooves on the resistive elements and set each resistive element to have a predetermined resistance value while in the large-sized substrate state.
According to Patent Literature 1, approximately L-shaped trimming grooves for rough adjustment and fine adjustment are formed in a resistive element.
The invention described in Patent Literature 1 is characterized by a configuration that causes the trimming groove for rough adjustment and the trimming groove for fine adjustment to intersect near the center of the resistive element.
Patent Literature 1: Japanese Patent Laid-Open No. 2000-340401
However, if the trimming grooves are formed to intersect each other near the center of the resistive element, the potential distribution becomes concentrated (the electric field becomes stronger) in the center of the resistive element, and a hotspot occurs in the center of the resistive element. Because such a configuration causes a hotspot to occur in the center of the resistive element distant from the electrodes, heat dissipation is lowered.
In addition, inserting trimming grooves into the resistive element causes the problem of microcracks after trimming, which hinder the electrical characteristics and durability of the resistive element. Microcracks are produced at the terminal ends of the trimming grooves when the trimming is drawn into the resistive element from an edge of the resistive element. Consequently, the adverse effects on performance caused by microcracks occurring at the terminal ends of the trimming grooves must be reduced.
Accordingly, in light of the above issues, a particular object of the present invention is to provide a chip resistor in which hot spots can be dispersed and the adverse effects on performance caused by microcracks can also be reduced.
A chip resistor of the present invention includes a substrate, a resistive element formed on a surface of the substrate, and electrodes formed on either side of the resistive element. In the resistive element, at least a first trimming groove and a second trimming groove are formed. The first trimming groove and the second trimming groove have respective vertical grooves that extend orthogonally from one edge of the resistive element that faces a direction orthogonal to a direction between the electrodes, and additionally have horizontal grooves bent from the vertical grooves and extending in the direction between the electrodes. The first vertical groove of the first trimming groove and the second vertical groove of the second trimming groove are formed with a spacing in between in the direction between the electrodes. The first horizontal groove of the first trimming groove and the second horizontal groove of the second trimming groove extend in directions approaching each other, and in addition, terminal ends of the first horizontal groove and the second horizontal groove are formed to be separated in the direction between the electrodes such that the first horizontal groove and the second horizontal groove do not overlap in the orthogonal direction.
According to the chip resistor of the present invention, hotspots can be dispersed, while in addition, the adverse effects on performance caused by microcracks can be reduced.
Hereinafter, an embodiment for carrying out the present invention (hereinafter abbreviated to the “embodiment”) will be described in detail. Note that the present invention is not limited to the following embodiment, and may also be modified in various ways while remaining within the scope of the present invention.
<Chip Resistor>
(Components of Chip Resistor)
The X1-X2 direction illustrated in
As illustrated in
As illustrated in
The insulating substrate 2 contains a material such as ceramic, and the insulating substrate 2 is plurally obtained by dividing a large-sized substrate described later along horizontal and vertical dividing grooves.
As illustrated in
The resistive element 3 is obtained by screen-printing and drying/baking a resistive paste such as Cu—Ni or ruthenium oxide, for example.
The first electrode 4 disposed on the left side has an upper electrode 4a formed on the front surface 2a of the insulating substrate 2, a lower electrode 4b formed on the back surface 2b of the insulating substrate 2 in correspondence with the upper electrode 4a, and a side-face electrode 4c that electrically connects the upper electrode 4a and the lower electrode 4b and is formed on the left side face 2c. On the surface of the side-face electrode 4c, an electrode plating layer is formed.
Similarly, the second electrode 5 disposed on the right side has an upper electrode 5a formed on the front surface 2a of the insulating substrate 2, a lower electrode 5b formed on the back surface 2b of the insulating substrate 2 in correspondence with the upper electrode 5a, and a side-face electrode 5c that electrically connects the upper electrode 5a and the lower electrode 5b and is formed on the right side face 2d. On the surface of the side-face electrode 5c, an electrode plating layer is formed.
As illustrated in
The upper electrodes 4a and 5a and the lower electrodes 4b and 5b are formed by screen-printing and drying/baking Ag paste, for example. The side-face electrodes 4c and 5c are formed by applying and drying/baking Ag paste on the side faces 2c and 2d of the insulating substrate 2, or by sputtering a material such as Ni/Cr instead of Ag paste, for example. Additionally, an electrode plating layer such as Ni, Au, or Sn is formed on the surfaces of the side-face electrodes 4c and 5c.
Also, as illustrated in
Meanwhile, with regard to the formation of trimming grooves used to adjust the resistance value of the resistive element 3, thorough research by the inventors led to the present invention, which is capable of dispersing hotspots occurring inside the resistive element 3 while also reducing the adverse effects on performance due to microcracks.
Hereinafter, the features of a first trimming groove 11 and a second trimming groove 12 according to the embodiment will be described.
The long first trimming groove 11 illustrated in
As illustrated in
Also, as illustrated in
As illustrated in
Also, as illustrated in
Here, a “terminal end” refers to an irradiation end point when performing trimming by irradiating the resistive element 3 with laser light. The irradiation start points are the positions of the trimming grooves 11 and 12 at the first edge 3a, and these positions correspond to the “start point” of each of the trimming grooves 11 and 12.
As illustrated in
In the embodiment, hotspots occurring inside the resistive element 3 can be dispersed in association with the formation of each of the trimming grooves 11 and 12. The hotspot dispersion effect will be described using the potential distribution diagrams in
(Hotspot Dispersion Effect)
As illustrated in
The first trimming groove 11 is formed to the left-of-center in the horizontal direction (X1-X2) of the resistive element 3. The first trimming groove 11 is formed to have the first vertical groove 11a and the first horizontal groove 11b. At this time, the first vertical groove 11a is formed at a position a distance a from the first electrode 4. Also, the first horizontal groove 11b is formed in the direction going away from the first electrode 4, that is, to the right (X2 direction).
As illustrated in
Here, as illustrated in
As illustrated in
The second trimming groove 12 is formed to the right-of-center in the horizontal direction (X1-X2) of the resistive element 3. The second trimming groove 12 is approximately L-shaped formed to have the second vertical groove 12a and the second horizontal groove 12b. At this time, the spacing between the second vertical groove 12a and the second electrode 5 is preferably formed at a distance a substantially equal to the distance a between the first vertical groove 11a and the first electrode 4. Also, the terminal end 12c of the second horizontal groove 12b is formed going toward the left direction (X1). Consequently, the terminal end 11c of the first trimming groove 11 and the terminal end 12c of the second trimming groove 12 extend in directions approaching each other.
Additionally, in the embodiment, the terminal end 11c of the first trimming groove 11 and the terminal end 12c of the second trimming groove 12 are formed to be separated from each other in the horizontal direction (X1-X2) such that the first horizontal groove 11b of the first trimming groove 11 and the second horizontal groove 12b of the second trimming groove 12 do not overlap in the vertical direction (Y1-Y2).
Through the formation of the second trimming groove 12, the spacing in the vertical direction (Y1-Y2) between the second horizontal groove 12b and the second edge 3b of the resistive element 3 is narrower than other regions, except the region A. Hereinafter, the space between the second horizontal groove 12b and the second edge 3b is referred to as the second region C. In this way, the spacing in the second region C is narrower. For this reason, the electric field strength in the second region C is stronger when a voltage is applied between the electrodes 4 and 5. However, because the first region A is narrower than the second region C, the electric field strength is stronger in the first region A than in the second region C.
The first region A and the second region C where the electric field is strong are hotspots compared to the other regions where the spacing in the vertical direction (Y1-Y2) is wider.
As a comparative example,
In the comparative example illustrated in
In the comparative example illustrated in
In the comparative example illustrated in
In contrast, in the embodiment, as illustrated in
Consequently, in the embodiment, the heat of the hotspot H1 can escape appropriately to the upper electrode 4a of the first electrode 4, while the heat of the hotspot H2 can escape appropriately to the upper electrode 5a of the second electrode 5.
Also, in the embodiment, the distance between the first trimming groove 11 and the lower electrode 4b of the first electrode 4 as well as the distance between the second trimming groove 12 and the lower electrode 5b of the second electrode 5 can be shortened compared to the comparative example in
(Microcracks)
Microcracks will be described. In the embodiment, the terminal end 11c of the first trimming groove 11 and the terminal end 12c of the second trimming groove 12 are made to extend in directions approaching each other. For this reason, at least some of the microcracks occurring at the terminal ends 11c and 12c stretch into the region where current does not flow between the trimming grooves 11 and 12. As a result, change over time in the resistance value can be suppressed appropriately. This property will be described in further detail.
In the embodiment, as illustrated in
Also, some of the microcracks occurring at the terminal end 11c of the first trimming groove 11 easily stretch inside the region B. For this reason, the adverse effects of the microcracks occurring at the first trimming groove 11 can also be suppressed as much as possible.
As above, according to the configuration of the embodiment, the hotspots H1 and H2 can be dispersed and heat dissipation can be improved, while in addition, the adverse effects on performance by the microcracks occurring at the terminal ends 11c and 12c of the trimming grooves 11 and 12 can be reduced.
In the embodiment, as illustrated in
According to this configuration, the potential distribution occurring inside the resistive element 3 is better balanced left and right. Also, a balanced diffusion of electrode material from the electrodes 4 and 5 to the resistive element 3 due to heat during trimming occurs on either side. With this arrangement, variations in the temperature coefficient of resistance (TCR) due to trimming can be suppressed.
Next, other embodiments will be described. In the embodiment illustrated in
In the embodiment illustrated in
Also, in the embodiment illustrated in
In the embodiment illustrated in
In another embodiment illustrated in
The first trimming groove 41 is approximately L-shaped, extending from the first edge 3a of the resistive element 3 in the Y1 direction and also bent to the left (X1 direction). The first trimming groove 41 is formed to have a first vertical groove 41a and a first horizontal groove 41b.
The second trimming groove 42 is approximately L-shaped, extending from the first edge 3a of the resistive element 3 in the Y1 direction and also bent to the right (X2 direction). The second trimming groove 42 is formed to have a second vertical groove 42a and a second horizontal groove 42b.
As illustrated in
As illustrated in
As illustrated in
In
As illustrated in
Also, a third trimming groove 43 is formed in a region E enclosed between a third virtual line L3 joining a terminal end 41d of the first trimming groove 41 to an intersection point O2 of the second electrode 5 and the first edge 3a, the first vertical groove 41a of the first trimming groove 41, and the first edge 3a.
In the embodiment illustrated in
In the embodiment, four or more trimming grooves may also be formed. Trimming grooves for fine adjustment can be formed in each of the regions B and E formed to the left and right of the first trimming groove 41 illustrated in
<Method of Manufacturing Chip Resistor>
In
In the step illustrated in
Next, in the step illustrated in
Next, in the step illustrated in
Next, in the step illustrated in
Next, the second trimming groove 12 for fine adjustment is formed in each resistive element 3 to finely adjust the resistance value of the resistive element 3 to the target resistance value. For example, the second trimming groove 12 is formed to finely adjust the resistance value of the resistive element 3 to a resistance value slightly lower than the target resistance value. After that, the third trimming groove may be formed as a finishing adjustment that raises the resistance value to the target resistance value.
With regard to the formation of the first trimming groove 11 and the second trimming groove 12, as described already using
Note that the trimming groove is formed in resistive element 3 and the first overcoat layer 6 that covers the surface of the resistive element 3 (see
Next, in the step illustrated in
Next, the large-sized substrate 100 illustrated in
Next, each strip substrate is divided along the second dividing grooves 102 (second dividing step). With this division, a plurality of chip resistors 1 can be obtained. Finally, by electroplating the electrode surfaces of the individualized chip resistor 1 illustrated in
According to the method of manufacturing the chip resistor 1 of the embodiment, when trimming the resistive element 3 to adjust the resistance, the second trimming groove 12 for fine adjustment is formed after forming the first trimming groove 11 for rough adjustment. At this time, the second horizontal groove 12b of the second trimming groove 12 is formed to approach the first horizontal groove 11b of the first trimming groove 11, while in addition, the terminal end 11c of the first trimming groove 11 and the terminal end 12c of the second trimming groove 12 are formed to be separated in the horizontal direction (X1-X2) such that the first horizontal groove 11b and the second horizontal groove 12b do not overlap in the vertical direction (Y1-Y2) (see
With this arrangement, hotspots occurring inside the resistive element 3 can be dispersed in the left and right direction, while in addition, it is possible to appropriately suppress the adverse effects on performance by microcracks occurring at the terminal ends 11c and 12c.
As above, according to the method of manufacturing a chip resistor of the embodiment, a chip resistor having excellent heat dissipation and for which the amount of change in the temperature coefficient of resistance (TCR) after trimming is precisely adjustable to a target value can be manufactured appropriately and easily.
Hereinafter, the present invention will be described in further detail on the basis of an example. However, the present invention is not limited in any way by the following example.
In an experiment, the first trimming groove 11 and the second trimming groove 12 were formed in the resistive element 3 according to the procedure illustrated in
The length dimension in the horizontal direction (X1-X2) of the resistive element 3 used in the experiment was 1000 μm, and the length dimension in the vertical direction was 500 μm. Here, the “length dimension in the horizontal direction (X1-X2) of the resistive element 3” refers to the horizontal width of the resistive element 3 not overlapping with the electrodes.
The dimension of the distance a illustrated in
For example, it was determined that if the target value of the amount of change in the temperature coefficient of resistance (TCR) is approximately ±10 ppm, then for the size of the resistive element 3 in this example, the dimension of the distance a needs to be set to approximately 100 μm, and the trimming region T needs to be set to approximately 40%.
In the example, as illustrated in
Inside the trimming region T, the first trimming groove 11 used for rough adjustment is formed by laser irradiation, and then the second trimming groove 12 used for fine adjustment is formed by laser irradiation. The second trimming groove 12 is formed inside the region B enclosed between the first virtual line L1, the second virtual line L2, and the first edge 3a illustrated in
As illustrated in
When a voltage was applied between the electrodes 4 and 5 to the trimmed chip resistor and a thermo tracer was used to check for hotspots inside the resistive element 3, the hotspots were confirmed to be dispersed in the left and right direction (X1-X2).
Additionally, it was demonstrated that the amount of change in the temperature coefficient of resistance (TCR) after trimming can be kept within ±10 ppm.
A characteristic configuration of the embodiment is summarized below. The chip resistor 1 of the embodiment includes the insulating substrate 2, the resistive element 3 formed on the front surface of the insulating substrate 2, and the electrodes 4 and 5 formed on either side of the resistive element 3. In the resistive element 3, at least the first trimming groove 11 and the second trimming groove 12 are formed. The first trimming groove 11 and the second trimming groove 12 have respective vertical grooves 11a and 12a that extend orthogonally from the one edge 3a of the resistive element 3 that faces the direction orthogonal to the direction between the electrodes, and additionally have horizontal grooves 11b and 12b bent from the vertical grooves 11a and 12a and extending in the direction between the electrodes. The first vertical groove 11a of the first trimming groove 11 and the second vertical groove 12a of the second trimming groove 12 are formed with a spacing in between in the direction between the electrodes. The first horizontal groove 11b of the first trimming groove 11 and the second horizontal groove 12b of the second trimming groove 12 are characterized by extending in directions approaching each other, and in addition, the terminal ends 11c and 12c of the first horizontal groove 11b and the second horizontal groove 12b are formed to be separated in the direction between the electrodes such that the first horizontal groove 11b and the second horizontal groove 12b do not overlap in the orthogonal direction.
In the embodiment, the second trimming groove 12 is preferably formed inside the region B enclosed between the first virtual line L1 joining the terminal end 11c of the first horizontal groove 11b of the first trimming groove 11 to the intersection point O of the electrode 5 on the side the terminal end 11c faces and the one edge 3a, the second virtual line L2 joining the terminal end 11c to the one edge 3a in the orthogonal direction, and the one edge 3a.
In the embodiment, the distance a between the first vertical groove 11a of the first trimming groove 11 and the electrode 4 on the side near the first vertical groove 11a is preferably substantially equal to the distance a between the second vertical groove 12a of the second trimming groove 12 and the electrode 5 on the side near the second vertical groove 12a.
The chip resistor of the present invention has excellent heat dissipation, and furthermore, the change over time in the resistance value can be reduced. In particular, in the chip resistor of the present invention, the action of dissipating heat to the electrodes can be improved, and the heat can be escaped appropriately toward a heat sink side. In this way, the chip resistor of the present invention has excellent thermal stability and can be mounted on a variety of circuit boards.
This application is based on Japanese Patent Application No. 2018-055880 filed on Mar. 23, 2018, the content of which is hereby incorporated in entirety.
Number | Date | Country | Kind |
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JP2018-055880 | Mar 2018 | JP | national |
Filing Document | Filing Date | Country | Kind |
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PCT/JP2019/011572 | 3/19/2019 | WO | 00 |
Publishing Document | Publishing Date | Country | Kind |
---|---|---|---|
WO2019/181974 | 9/26/2019 | WO | A |
Number | Name | Date | Kind |
---|---|---|---|
5043694 | Higashi | Aug 1991 | A |
5874887 | Kosinski | Feb 1999 | A |
6107909 | Kosinski | Aug 2000 | A |
6462304 | Kaida | Oct 2002 | B2 |
9460834 | Croci | Oct 2016 | B2 |
Number | Date | Country |
---|---|---|
2000-340401 | Dec 2000 | JP |
2001-203101 | Jul 2001 | JP |
2013-179212 | Sep 2013 | JP |
2018195637 | Dec 2018 | JP |
Entry |
---|
JP2018-195637; machine translation. (Year: 2018). |
International Search Report, dated Jun. 4, 2019 from the Japan Patent Office (JPO), in International Application No. PCT/JP2019/011572. |
Number | Date | Country | |
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20210005361 A1 | Jan 2021 | US |