The present invention relates to a technical field of displays, and particularly, to a chip structure and a display device.
With advancement of display technology, flat panel display technology has long been used by mainstream display devices. Particularly, organic light-emitting diodes (OLEDs) have become display devices having most potential in recent years, due to advantages of being self-luminous, all-solid, and high contrast, etc. In organic light-emitting diode display devices, a driver chip is usually provided to control each pixel.
In addition, as resolution increases to four times the wide quad high definition (WQHD) or even ultra high definition (UHD), bonding pads of chips are configured with fine pitches, getting smaller and smaller and reaching a micron level, and requirements for bonding are getting higher and higher. Chip bonding is usually performed by bonding chips with panels through electrically conductive films, thereby to realize upper and lower electrically conduction through electrically conductive particles of the electrically conductive films. In a situation of certain shifting, number of electrically conductive particles in overlapping parts of chips and electrically conductive films and the panels needs to be greater than a certain number to ensure electrically conduction performance. It is also necessary to prevent a short circuit between left and right electrodes from being caused by accumulation of the electrically conductive particles. Electrodes (also known as contact bumps) on surfaces of conventional chips are mostly I-shaped, but pitches between the I-type electrodes are small, so flowability of the electrically conductive particles is poor. Besides, it is easy to cause short circuit due to the accumulation of electrically conductive particles. Furthermore, when chips are shifting, an overlapping area of the I-type electrodes and the panel is reduced, and thus number of effective electrically conductive particles becomes small that is easy to result in poor bonding. Still further, distribution of contact bumps of traditional chips is longer in Y axis, limiting design for electrode sizes, and unbeneficial to design of small electrodes, thereby failing to improve electrically conduction performance by contact. The drawbacks caused by a structure of transitional chip electrodes as described above seriously adversely affect bonding performance of chips, and further cause circuits to be short-circuited giving rise to abnormal display of display devices.
Accordingly, an object of the present invention is to provide a chip structure and a display device, capable of allowing electrically conductive particles of an electrically conductive film for adhering the chip structure to flow smoothly between chip electrodes when boning the chip structure, thereby increasing a capture rate of the electrically conductive particles, improving reliability of bonding, and avoiding short circuits.
To achieve the above-mention object, the present invention provides a chip structure, comprising a chip substrate; and a plurality of bumps disposed on a surface of the chip substrate and functioning as an interface for electrical connection between the chip substrate and an external connecting portion, wherein the plurality of bumps are spaced apart from each other, each of the plurality of bumps comprises a rhombic configuration with four sides of equal length, and at least one of the four sides is disposed at an angle of 45 degrees with respect to a horizontal line passing through an end point of the at least one of the four sides; wherein the plurality of bumps are arranged in rows in a transverse direction, and are arranged in columns in a longitudinal direction, and wherein the plurality of bumps in rows in the transverse direction are disposed in a staggered manner, and the plurality of bumps in columns in the longitudinal direction are disposed in a staggered manner.
The present invention further provides a chip structure, comprising a chip substrate; and a plurality of bumps disposed on a surface of the chip substrate and functioning as an interface for electrical connection between the chip substrate and an external connecting portion, wherein the plurality of bumps are spaced apart from each other, and each of the plurality of bumps comprises a rhombic configuration.
In a preferable embodiment of the present invention, each of the plurality of bumps has four sides of equal length, and at least one of the four sides is disposed at an angle of 45 degrees with respect to a horizontal line passing through an end point of the at least one of the four sides.
In another preferable embodiment of the present invention, the plurality of bumps are arranged in rows in a transverse direction, and are arranged in columns in a longitudinal direction, and wherein the plurality of bumps in rows in the transverse direction are disposed in a staggered manner, and the plurality of bumps in columns in the longitudinal direction are disposed in a staggered manner.
In another preferable embodiment of the present invention, each of the plurality of bumps in rows in the transverse direction is arranged at an equal pitch, and each of the plurality of bumps in columns in the longitudinal direction is arranged at an equal pitch.
In another preferable embodiment of the present invention, the chip substrate is bonded to the external connecting portion by an electrically conductive film, a shifting distance is formed between the chip substrate and the external connecting portion, and wherein the plurality of bumps in each row are in alignment with each other in the transverse direction, and a pitch is formed between the bumps adjacent to each other in the same row in the transverse direction and the pitch is greater than or equal to the shifting distance.
In another preferable embodiment of the present invention, the surface of the chip substrate is rectangular in shape and has a first side and a second side perpendicular to the first side, and wherein each of the plurality of bumps having the rhombic configuration comprises a first corner connecting line perpendicular to the first side, and a second corner connecting line perpendicular to the first corner connecting line and the second side.
The present invention further provides a display device, comprising an organic light emitting display panel, a bonding area, and a chip structure disposed on the bonding area, wherein the chip structure comprises a chip substrate; and a plurality of bumps disposed on a surface of the chip substrate and functioning as an interface for electrical connection between the chip substrate and an external connecting portion, wherein the plurality of bumps are spaced apart from each other, and each of the plurality of bumps comprises a rhombic configuration.
In a preferable embodiment of the present invention, each of the plurality of bumps has four sides of equal length, and at least one of the four sides is disposed at an angle of 45 degrees with respect to a horizontal line passing through an end point of the at least one of the four sides.
In another preferable embodiment of the present invention, the plurality of bumps are arranged in rows in a transverse direction, and are arranged in columns in a longitudinal direction, and wherein the plurality of bumps in rows in the transverse direction are disposed in a staggered manner, and the plurality of bumps in columns in the longitudinal direction are disposed in a staggered manner.
In another preferable embodiment of the present invention, the chip substrate is bonded to the bonding area by an electrically conductive film, a shifting distance is formed between the chip substrate and the external connecting portion, and wherein the plurality of bumps in each row are in alignment with each other in the transverse direction, and a pitch is formed between the bumps adjacent to each other in the same row in the transverse direction and the pitch is greater than or equal to the shifting distance.
The chip structure of the present invention utilizes the rhombic bumps to effectively enhance flowability of the electrically conductive particles of the electrically conductive film when bonding chips, thereby increasing a capture rate of the electrically conductive particles, reducing accumulation of the electrically conductive particles, avoiding short circuits, and further ensuring a normal operation of a display device. The chip structure 1 of the present invention effectively overcome drawbacks that flowing of electrically conductive particles between bump electrodes of a chip tends to be blocked, thereby giving rise to short circuits easily, and unbeneficial to development of small-sized chips
The following embodiments are referring to the accompanying drawings for exemplifying specific implementable embodiments of the present invention. Directional terms described by the present invention, such as upper, lower, front, back, left, right, inner, outer, side, etc., are only directions by referring to the accompanying drawings, and thus the used directional terms are used to describe and understand the present invention, but the present invention is not limited thereto.
The present invention is a chip structure, which may be a driver chip (also referred to IC) for controlling each pixel, and is adapted to a display device, wherein the display device may be a liquid crystal display panel or an organic light emitting display panel.
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Accordingly, the chip structure 1 of the present invention utilizes the rhombic bumps 12 to effectively enhance flowability of the electrically conductive particles of the ACF when bonding chips, thereby increasing a capture rate of the electrically conductive particles, reducing accumulation of the electrically conductive particles, avoiding short circuits, and further ensuring a normal operation of a display device. The chip structure 1 of the present invention effectively overcome drawbacks that flowing of electrically conductive particles between bump electrodes of a chip tends to be blocked, thereby giving rise to short circuits easily, and unbeneficial to development of small-sized chips.
The chip structure 1 includes a chip substrate 11 and a plurality of bumps 12 disposed on a surface of the chip substrate 11 and functioning as an interface for electrical connection between the chip substrate 11 and the bonding area 20 (i.e. an external connecting portion). The plurality of bumps 12 are spaced apart from each other, and each of the plurality of bumps 12 includes a rhombic configuration. Other detailed constructions relating to the chip structure 1 of the present invention have been described in detail in the foregoing description of the embodiment of
In another embodiment, the display device 2 of the present invention further includes a flexible circuit board (not shown) of which one end is electrically connected to the chip substrate of the chip structure. Another end of the flexible circuit board is electrically connected to an electronic main board of a display apparatus (not shown), such as mobile phones. The flexible circuit board transmits a control command and a power supply voltage from the electronic device main board to the chip structure, so that the chip structure provides voltage and data signals to the organic light-emitting diode panel 23, thereby making the display area 24 of the organic light-emitting diode panel 23 displays a desired picture (as shown in
Accordingly, although the present invention has been disclosed as a preferred embodiment, it is not intended to limit the present invention. Those skilled in the art without departing from the spirit and scope of the present invention may make various changes or modifications, and thus the scope of the present invention should be after the appended claims and their equivalents.
Number | Date | Country | Kind |
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201811583628.3 | Dec 2018 | CN | national |
Filing Document | Filing Date | Country | Kind |
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PCT/CN2019/084180 | 4/25/2019 | WO | 00 |