Patent Application
20230262268
The disclosure is in the field of video compression, and at least one embodiment relates more specifically to a video coding system with chroma format dependent quantization matrices.
To achieve high compression efficiency, image and video coding schemes usually employ prediction and transform to leverage spatial and temporal redundancy in the video content. Generally, intra or inter prediction is used to exploit the intra or inter frame correlation, then the differences between the original image block and the predicted image block, often denoted as prediction errors or prediction residuals, are transformed, quantized and entropy coded. During encoding, the original image block is usually partitioned/split into sub-blocks using various partitioning such as quad-tree for example. To reconstruct the video, the compressed data is decoded by inverse processes corresponding to the prediction, transform, quantization and entropy coding.
In at least one embodiment, it is proposed to transmit only a luma quantization matrix and no chroma quantization matrix when the chroma format is monochrome, and otherwise (i.e. not monochrome) to transmit at least both a luma quantization matrix and a chroma quantization matrix. This allows to avoid the transmission of data elements that are useless. It allows to improve simultaneously the encoding (less operations to perform), the transmission (less data to be transmitted) and decoding (less operations to perform).
According to a first aspect, a method for encoding data representative of a picture comprises obtaining a chroma format of the picture, in the condition that the chroma format is monochrome, encoding an information representative of at least one determined luma quantization matrix, otherwise encoding an information representative of at least one determined luma quantization matrix and at least one determined chroma quantization matrix, and encoding the picture using the determined matrices.
According to a second aspect, a method for decoding picture data comprises obtaining from a bitstream an information representative of the chroma format, in the condition that the chroma format is monochrome, decoding an information representative of at least one determined luma quantization matrix, otherwise decoding an information representative of at least one determined luma quantization matrix and at least one determined chroma quantization matrix, and decoding picture data using the obtained quantization matrices.
According to a third aspect, an apparatus comprising an encoder for encoding picture data, the encoder being configured to obtain a chroma format of the picture, in the condition that the chroma format is monochrome, encode an information representative of at least one determined luma quantization matrix, otherwise encode an information representative of at least one determined luma quantization matrix and at least one determined chroma quantization matrix, and encode the picture using the determined matrices.
According to a fourth aspect, an apparatus comprising a decoder for decoding picture data, the decoder being configured to obtain from a bitstream an information representative of the chroma format, in the condition that the chroma format is monochrome, decode an information representative of at least one determined luma quantization matrix, otherwise decode an information representative of at least one determined luma quantization matrix and at least one determined chroma quantization matrix, and decode picture data using the obtained quantization matrices.
One or more of the present embodiments also provide a non-transitory computer readable storage medium having stored thereon instructions for encoding or decoding video data according to at least part of any of the methods described above. One or more embodiments also provide a computer program product including instructions for performing at least part of any of the methods described above.
Various embodiments relate to a post-processing method for a predicted value of a sample of a block of an image, the value being predicted according to an intra prediction angle, wherein the value of the sample is modified after the prediction so that it is determined based on a weighting of the difference between a value of a left reference sample and the obtained predicted value for the sample, wherein the left reference sample is determined based on the intra prediction angle. Encoding method, decoding method, encoding apparatus, decoding apparatus based on this post-processing method are proposed.
Moreover, the present aspects, although describing principles related to particular drafts of VVC (Versatile Video Coding) or to HEVC (High Efficiency Video Coding) specifications, are not limited to VVC or HEVC, and can be applied, for example, to other standards and recommendations, whether pre-existing or future-developed, and extensions of any such standards and recommendations (including VVC and HEVC). Unless indicated otherwise, or technically precluded, the aspects described in this application can be used individually or in combination.
In the encoder 100, a picture is encoded by the encoder elements as described below. The picture to be encoded is partitioned (102) and processed in units of, for example, CUs. Each unit is encoded using, for example, either an intra or inter mode. When a unit is encoded in an intra mode, it performs intra prediction (160). In an inter mode, motion estimation (175) and compensation (170) are performed. The encoder decides (105) which one of the intra mode or inter mode to use for encoding the unit, and indicates the intra/inter decision by, for example, a prediction mode flag. Prediction residuals are calculated, for example, by subtracting (110) the predicted block from the original image block.
The prediction residuals are then transformed (125) and quantized (130). The quantized transform coefficients, as well as motion vectors and other syntax elements, are entropy coded (145) to output a bitstream. The encoder can skip the transform and apply quantization directly to the non-transformed residual signal. The encoder can bypass both transform and quantization, i.e., the residual is coded directly without the application of the transform or quantization processes.
The encoder decodes an encoded block to provide a reference for further predictions. The quantized transform coefficients are de-quantized (140) and inverse transformed (150) to decode prediction residuals. Combining (155) the decoded prediction residuals and the predicted block, an image block is reconstructed. In-loop filters (165) are applied to the reconstructed picture to perform, for example, deblocking/SAO (Sample Adaptive Offset), Adaptive Loop-Filter (ALF) filtering to reduce encoding artifacts. The filtered image is stored at a reference picture buffer (180).
The decoded picture can further go through post-decoding processing (285), for example, an inverse color transform (e.g. conversion from YCbCr 4:2:0 to RGB 4:4:4) or an inverse remapping performing the inverse of the remapping process performed in the pre-encoding processing (101). The post-decoding processing can use metadata derived in the pre-encoding processing and signaled in the bitstream.
The system 1000 includes at least one processor 1010 configured to execute instructions loaded therein for implementing, for example, the various aspects described in this document. Processor 1010 can include embedded memory, input output interface, and various other circuitries as known in the art. The system 1000 includes at least one memory 1020 (e.g., a volatile memory device, and/or a non-volatile memory device). System 1000 includes a storage device 1040, which can include non-volatile memory and/or volatile memory, including, but not limited to, Electrically Erasable Programmable Read-Only Memory (EEPROM), Read-Only Memory (ROM), Programmable Read-Only Memory (PROM), Random Access Memory (RAM), Dynamic Random Access Memory (DRAM), Static Random Access Memory (SRAM), flash, magnetic disk drive, and/or optical disk drive. The storage device 1040 can include an internal storage device, an attached storage device (including detachable and non-detachable storage devices), and/or a network accessible storage device, as non-limiting examples.
System 1000 includes an encoder/decoder module 1030 configured, for example, to process data to provide an encoded video or decoded video, and the encoder/decoder module 1030 can include its own processor and memory. The encoder/decoder module 1030 represents module(s) that can be included in a device to perform the encoding and/or decoding functions. As is known, a device can include one or both of the encoding and decoding modules. Additionally, encoder/decoder module 1030 can be implemented as a separate element of system 1000 or can be incorporated within processor 1010 as a combination of hardware and software as known to those skilled in the art.
Program code to be loaded onto processor 1010 or encoder/decoder 1030 to perform the various aspects described in this document can be stored in storage device 1040 and subsequently loaded onto memory 1020 for execution by processor 1010. In accordance with various embodiments, one or more of processor 1010, memory 1020, storage device 1040, and encoder/decoder module 1030 can store one or more of various items during the performance of the processes described in this document. Such stored items can include, but are not limited to, the input video, the decoded video or portions of the decoded video, the bitstream, matrices, variables, and intermediate or final results from the processing of equations, formulas, operations, and operational logic.
In some embodiments, memory inside of the processor 1010 and/or the encoder/decoder module 1030 is used to store instructions and to provide working memory for processing that is needed during encoding or decoding. In other embodiments, however, a memory external to the processing device (for example, the processing device can be either the processor 1010 or the encoder/decoder module 1030) is used for one or more of these functions. The external memory can be the memory 1020 and/or the storage device 1040, for example, a dynamic volatile memory and/or a non-volatile flash memory. In several embodiments, an external non-volatile flash memory is used to store the operating system of, for example, a television. In at least one embodiment, a fast external dynamic volatile memory such as a RAM is used as working memory for video coding and decoding operations, such as for MPEG-2 (MPEG refers to the Moving Picture Experts Group, MPEG-2 is also referred to as ISO/IEC 13818, and 13818-1 is also known as H.222, and 13818-2 is also known as H.262), HEVC (HEVC refers to High Efficiency Video Coding, also known as H.265 and MPEG-H Part 2), or VVC (Versatile Video Coding, a new standard being developed by JVET, the Joint Video Experts Team).
The input to the elements of system 1000 can be provided through various input devices as indicated in block 1130. Such input devices include, but are not limited to, (i) a radio frequency (RF) portion that receives an RF signal transmitted, for example, over the air by a broadcaster, (ii) a Component (COMP) input terminal (or a set of COMP input terminals), (iii) a Universal Serial Bus (USB) input terminal, and/or (iv) a High Definition Multimedia Interface (HDMI) input terminal. Other examples, not shown in
In various embodiments, the input devices of block 1130 have associated respective input processing elements as known in the art. For example, the RF portion can be associated with elements suitable for (i) selecting a desired frequency (also referred to as selecting a signal, or band-limiting a signal to a band of frequencies), (ii) downconverting the selected signal, (iii) band-limiting again to a narrower band of frequencies to select (for example) a signal frequency band which can be referred to as a channel in certain embodiments, (iv) demodulating the downconverted and band-limited signal, (v) performing error correction, and (vi) demultiplexing to select the desired stream of data packets. The RF portion of various embodiments includes one or more elements to perform these functions, for example, frequency selectors, signal selectors, band-limiters, channel selectors, filters, downconverters, demodulators, error correctors, and demultiplexers. The RF portion can include a tuner that performs various of these functions, including, for example, downconverting the received signal to a lower frequency (for example, an intermediate frequency or a near-baseband frequency) or to baseband. In one set-top box embodiment, the RF portion and its associated input processing element receives an RF signal transmitted over a wired (for example, cable) medium, and performs frequency selection by filtering, downconverting, and filtering again to a desired frequency band. Various embodiments rearrange the order of the above-described (and other) elements, remove some of these elements, and/or add other elements performing similar or different functions. Adding elements can include inserting elements in between existing elements, such as, for example, inserting amplifiers and an analog-to-digital converter. In various embodiments, the RF portion includes an antenna.
Additionally, the USB and/or HDMI terminals can include respective interface processors for connecting system 1000 to other electronic devices across USB and/or HDMI connections. It is to be understood that various aspects of input processing, for example, Reed-Solomon error correction, can be implemented, for example, within a separate input processing IC or within processor 1010 as necessary. Similarly, aspects of USB or HDMI interface processing can be implemented within separate interface ICs or within processor 1010 as necessary. The demodulated, error corrected, and demultiplexed stream is provided to various processing elements, including, for example, processor 1010, and encoder/decoder 1030 operating in combination with the memory and storage elements to process the datastream as necessary for presentation on an output device.
Various elements of system 1000 can be provided within an integrated housing, Within the integrated housing, the various elements can be interconnected and transmit data therebetween using suitable connection arrangement 1140, for example, an internal bus as known in the art, including the Inter-IC (I2C) bus, wiring, and printed circuit boards.
The system 1000 includes communication interface 1050 that enables communication with other devices via communication channel 1060. The communication interface 1050 can include, but is not limited to, a transceiver configured to transmit and to receive data over communication channel 1060. The communication interface 1050 can include, but is not limited to, a modem or network card and the communication channel 1060 can be implemented, for example, within a wired and/or a wireless medium.
Data is streamed, or otherwise provided, to the system 1000, in various embodiments, using a wireless network such as a Wi-Fi network, for example IEEE 802.11 (IEEE refers to the Institute of Electrical and Electronics Engineers). The Wi-Fi signal of these embodiments is received over the communications channel 1060 and the communications interface 1050 which are adapted for Wi-Fi communications. The communications channel 1060 of these embodiments is typically connected to an access point or router that provides access to external networks including the Internet for allowing streaming applications and other over-the-top communications. Other embodiments provide streamed data to the system 1000 using a set-top box that delivers the data over the HDMI connection of the input block 1130. Still other embodiments provide streamed data to the system 1000 using the RF connection of the input block 1130. As indicated above, various embodiments provide data in a non-streaming manner. Additionally, various embodiments use wireless networks other than Wi-Fi, for example a cellular network or a Bluetooth network.
The system 1000 can provide an output signal to various output devices, including a display 1100, speakers 1110, and other peripheral devices 1120. The display 1100 of various embodiments includes one or more of, for example, a touchscreen display, an organic light-emitting diode (OLED) display, a curved display, and/or a foldable display. The display 1100 can be for a television, a tablet, a laptop, a cell phone (mobile phone), or other device. The display 1100 can also be integrated with other components (for example, as in a smart phone), or separate (for example, an external monitor for a laptop). The other peripheral devices 1120 include, in various examples of embodiments, one or more of a stand-alone digital video disc (or digital versatile disc) (DVR, for both terms), a disk player, a stereo system, and/or a lighting system. Various embodiments use one or more peripheral devices 1120 that provide a function based on the output of the system 1000. For example, a disk player performs the function of playing the output of the system 1000.
In various embodiments, control signals are communicated between the system 1000 and the display 1100, speakers 1110, or other peripheral devices 1120 using signaling such as AV.Link, Consumer Electronics Control (CEC), or other communications protocols that enable device-to-device control with or without user intervention. The output devices can be communicatively coupled to system 1000 via dedicated connections through respective interfaces 1070, 1080, and 1090. Alternatively, the output devices can be connected to system 1000 using the communications channel 1060 via the communications interface 1050. The display 1100 and speakers 1110 can be integrated in a single unit with the other components of system 1000 in an electronic device such as, for example, a television. In various embodiments, the display interface 1070 includes a display driver, such as, for example, a timing controller (T Con) chip.
The display 1100 and speaker 1110 can alternatively be separate from one or more of the other components, for example, if the RF portion of input 1130 is part of a separate set-top box. In various embodiments in which the display 1100 and speakers 1110 are external components, the output signal can be provided via dedicated output connections, including, for example, HDMI ports, USB ports, or COMP outputs.
The embodiments can be carried out by computer software implemented by the processor 1010 or by hardware, or by a combination of hardware and software. As a non-limiting example, the embodiments can be implemented by one or more integrated circuits.
The memory 1020 can be of any type appropriate to the technical environment and can be implemented using any appropriate data storage technology, such as optical memory devices, magnetic memory devices, semiconductor-based memory devices, fixed memory, and removable memory, as non-limiting examples. The processor 1010 can be of any type appropriate to the technical environment, and can encompass one or more of microprocessors, general purpose computers, special purpose computers, and processors based on a multi-core architecture, as non-limiting examples.
The technical field of the invention is related to the quantization step of a video compression scheme.
Video coding systems can use quantization matrices in the dequantization process where coded block frequency-transformed coefficients are scaled by the current quantization step and further scaled by a quantization matrix (QM) as follows, applied to the example of a HEVC coding system:
d[x][y]=Clip3(coeffMin,coeffMax,((TransCoeffLevel[xTbY][yTbY][cIdx][x][y]*m[x][y]*levelScale[qP%6]«(qP/6))+(1«(bdShift−1)))»bdShift)
Where:
For example, HEVC uses the syntax illustrated in Table 1 to transmit quantization matrices.
In this context:
The chroma format can be specified by chroma_format_idc in SPS syntax for example as in HEVC or VVC, and illustrated in Table 2:
The use of quantization matrices similar to HEVC has been adopted in VVC draft 5 with some changes in syntax with extended QM prediction. In addition, compared to HEVC, VVC needs more quantization matrices due to a higher number of block sizes.
A QM can be identified by two parameters, matrixId and sizeId. The values of sizeId are illustrated in Table 3.
For block sizes greater than 8×8, only 8×8 coefficients+DC are transmitted. QM of the correct size is reconstructed using zero-hold interpolation. For example, for a 16×16 block, every coefficient is repeated twice in both directions, then the DC coefficient is replaced by the transmitted one.
For rectangular blocks, the size retained for QM selection (sizeId) is the larger dimension, i.e. maximum of width and height. For example, for a 4×16 block, a QM for 16×16 block size is selected. Then, the reconstructed 16×16 matrix is decimated vertically by a factor 4 to obtain the final 4×16 quantization matrix (i.e. 3 lines out of 4 are skipped).
For the following, we refer to QMs for a given family of block sizes (square or rectangular) of size-N, in relation to sizeId and the square block size it is used for: for example, for block sizes 16×16 or 16×4, the QMs are identified as size-16 (sizeId 4 in Table 3). The size-N notation is used to differentiate from exact block shape, and from the number of signaled QM coefficients (limited to 8×8, as shown in table 3).
A unique QM identifier is illustrated in table 4 where decimated chroma QMs (4:2:0) are specified and used, even for 4:4:4 picture encoding.
Unified matrixId
Y
INTRA
INTER
Cb
INTRA
INTER
Cr
INTRA
INTER
TU size
64
32
16
8
4
Signalled QM size
8 × 8 + DC
8 × 8
4 × 4
2 × 2
Block size: max(width,
64
32
16
8
4
2
height) (in 4:2:0 chroma
format)
Block size: max(width,
64
32
16
8
4
height) (in 4:4:4 chroma
format)
The unified matrixId is derived as follows: matrixId=N*sizeId+matrixTypeId, where N is the number of possible type identifiers, e.g., N=6. This is based on:
a size identifier which relates to CU size listed by decreasing block size (i.e. CU enclosing square shape, because only square-size matrices are transmitted) rather than block size. Note here for either luma or chroma, the size identifier is controlled by the luma block size, e.g., max(luma block width, luma block height). When luma and chroma tree are separated, for chroma, “CU size” would refer to the size of the block projected on the luma plane. This identifier is illustrated in Table 5:
a matrix type which first lists luma QMs, because they can be larger than chroma (e.g., in case of 4:2:0 chroma format), illustrated in Table 6:
With such technique, instead of transmitting QM coefficients, it is possible to predict the QM either from default values, or from any previously transmitted one.
This operation, named decimation, is described by the following equation:
ScalingMatrix[matrixId][x][y]=refScalingMatrix[i][j]
where refMatrixSize matches the size of refScalingMatrix (and thus the range of i and j variables).
This QM prediction process is part of the QM decoding process but could be deferred to the QM derivation process where the decimation for prediction purpose would be merged with the QM resize sub-process.
Back to table 4, one drawback is that when chroma format is 4:4:4 (chroma_format_idc==3 in SPS syntax), chroma QMs are not available in scaling list data syntax for size 32 or 64. In addition, when encoding in 4:4:4 chroma format, chroma QMs are signaled and used for every block size, but chroma QMs are intended for 4:2:0, thus are unduly subsampled for size 8 (4×4 chroma QMs) and 4 (2×2 chroma QMs), thus leading to lower quality of the resulting picture. Furthermore, chroma QMs are transmitted for size-2 although never used.
So far, scaling list data syntax is not depending on chroma format, to make it independently decodable: chroma_format_idc is signaled only in SPS, but scaling list data can be signaled in both SPS and PPS, and it is desired to keep PPS decoding independent of SPS. This means that scaling list data syntax can not make use of chroma_format_idc.
Embodiments described hereafter have been designed with the foregoing in mind. The encoder 100 of
In at least one embodiment, the chroma_format_idc is signaled as part of the QM syntax, as highlighted in italic bold font on grey background in the syntax extract of Table 7.
scaling list chroma_format_idc specifies the sampling resolution of chroma scaling matrices, in accordance with chroma format sampling structure. In at least one variant embodiment, the value of chroma_format_idc shall be in the range of 0 to 3, inclusive. It is a requirement of bitstream conformance that scaling_list_chroma_format_idc shall be equal to chroma_format_idc.
In at least one embodiment, the chroma_format_idc is signaled directly at the PPS (picture parameter set) level, as highlighted in italic bold font on grey background in the syntax extract of Table 8. This can be particularly interesting if chroma format is needed for other syntax elements out of QMs (as an example, in HEVC 2018, a monochrome_palette_flag is introduced in the PPS). That way, specific chroma information is not repeated for each syntax element that needs it, thus reducing the overall size of the encoded video.
pps_chroma_format_idc specifies the chroma sampling relative to the luma sampling as specified in clause 6.2. In at least one variant embodiment, the value of chroma_format_idc shall be in the range of 0 to 3, inclusive. It is a requirement of bitstream conformance that pps_chroma_format_idc shall be equal to chroma_format_idc.
Since syntax structure name may change between different coding standard, it may be referenced in this document as xxx chroma_format_idc but with the same meaning, independently of the (level and) name of the syntax structure that contains the QM syntax.
Use of Chroma Format for QMs
Changes to QM syntax to use chroma format is dependent on the specific QM syntax. The general idea is that
Example changes to signaled QM size depending on chroma format and matrixId are illustrated in italic bold font on grey background in the syntax Table 9:
Changes to signaled QM size
4:4:4 Chroma Format
Example changes to scaling list data syntax are are illustrated in italic bold font on grey background in the syntax Table 10:
Similar changes are required in semantics to derive the size of the reference matrix in case of prediction, and in QM derivation process to derive the correct QM size depending on matrixId, as shown below:
When chroma_format_idc equals 3, the variable log 2MatrixSize is derived as follows:
log 2MatrixSize=(matrixId<24)?3:2
otherwise, the variable log 2MatrixSize is derived as follows:
log 2MatrixSize=(matrixId<20)?3:(matrixId<26)?2:1
DC coefficient conditions also needs to be updated accordingly in the semantics and QM derivation process.
When in monochrome format (i.e. when xxx chroma_format_idc==0 or when a monochrome flag is set), signaling of chroma QMs can be skipped.
Different embodiments are proposed to cover the monochrome chroma format.
In at least one embodiment, it is proposed to:
In this embodiment, the flowchart is the same as illustrated in
QM index mapping for monochrome format in at least one
embodiment
In at least one embodiment, it is proposed to:
refMatrixId=matrixId−scaling list_pred matrixid delta*3
When in monochrome format, the step “monochroma format && is chroma QM?” is added to determine if the current QM matrixId is a chroma QM (chroma_format_idc==0 && (matrixId % 6)>1 for JVET 00223). If that condition is true, the step “Infer QM prediction mode & data” is added to predict said chroma QM from the preceding QM in decoding order. “Get number of coef.” may or may not depend on chroma format, depending on whether this modification is combined with 4:4:4 adaptation in previous section. Modifications to the former QM decoding process of VVC draft 5 or HEVC are very similar.
For this embodiment, example changes to scaling list data syntax are are illustrated in italic bold font on grey background in the syntax Table 12:
These principles are implemented both at the encoding device and at decoding device. Also, the bitstream generated to convey the video is also impacted since it may comprise information related to the chroma quantization matrix or not.
This application describes a variety of aspects, including tools, features, embodiments, models, approaches, etc. Many of these aspects are described with specificity and, at least to show the individual characteristics, are often described in a manner that may sound limiting. However, this is for purposes of clarity in description, and does not limit the application or scope of those aspects. Indeed, all of the different aspects can be combined and interchanged to provide further aspects. Moreover, the aspects can be combined and interchanged with aspects described in earlier filings as well.
The aspects described and contemplated in this application can be implemented in many different forms.
Various methods are described herein, and each of the methods comprises one or more steps or actions for achieving the described method. Unless a specific order of steps or actions is required for proper operation of the method, the order and/or use of specific steps and/or actions may be modified or combined.
Various methods and other aspects described in this application can be used to modify modules, for example, the motion compensation and motion estimation modules (170, 175, 275), of a video encoder 100 and decoder 200 as shown in
Various numeric values are used in the present application. The specific values are for example purposes and the aspects described are not limited to these specific values.
Various implementations involve decoding. “Decoding”, as used in this application, can encompass all or part of the processes performed, for example, on a received encoded sequence in order to produce a final output suitable for display. In various embodiments, such processes include one or more of the processes typically performed by a decoder. In various embodiments, such processes also, or alternatively, include processes performed by a decoder of various implementations described in this application.
As further examples, in one embodiment “decoding” refers only to entropy decoding, in another embodiment “decoding” refers only to differential decoding, and in another embodiment “decoding” refers to a combination of entropy decoding and differential decoding. Whether the phrase “decoding process” is intended to refer specifically to a subset of operations or generally to the broader decoding process will be clear based on the context of the specific descriptions and is believed to be well understood by those skilled in the art.
Various implementations involve encoding. In an analogous way to the above discussion about “decoding”, “encoding” as used in this application can encompass all or part of the processes performed, for example, on an input video sequence in order to produce an encoded bitstream. In various embodiments, such processes include one or more of the processes typically performed by an encoder. In various embodiments, such processes also, or alternatively, include processes performed by an encoder of various implementations described in this application.
As further examples, in one embodiment “encoding” refers only to entropy encoding, in another embodiment “encoding” refers only to differential encoding, and in another embodiment “encoding” refers to a combination of differential encoding and entropy encoding. Whether the phrase “encoding process” is intended to refer specifically to a subset of operations or generally to the broader encoding process will be clear based on the context of the specific descriptions and is believed to be well understood by those skilled in the art.
Note that the syntax elements as used herein, are descriptive terms. As such, they do not preclude the use of other syntax element names.
When a figure is presented as a flow diagram, it should be understood that it also provides a block diagram of a corresponding apparatus. Similarly, when a figure is presented as a block diagram, it should be understood that it also provides a flow diagram of a corresponding method/process.
Various embodiments refer to rate distortion optimization. In particular, during the encoding process, the balance or trade-off between the rate and distortion is usually considered, often given the constraints of computational complexity. The rate distortion optimization is usually formulated as minimizing a rate distortion function, which is a weighted sum of the rate and of the distortion. There are different approaches to solve the rate distortion optimization problem. For example, the approaches may be based on an extensive testing of all encoding options, including all considered modes or coding parameters values, with a complete evaluation of their coding cost and related distortion of the reconstructed signal after coding and decoding. Faster approaches may also be used, to save encoding complexity, in particular with computation of an approximated distortion based on the prediction or the prediction residual signal, not the reconstructed one. Mix of these two approaches can also be used, such as by using an approximated distortion for only some of the possible encoding options, and a complete distortion for other encoding options. Other approaches only evaluate a subset of the possible encoding options. More generally, many approaches employ any of a variety of techniques to perform the optimization, but the optimization is not necessarily a complete evaluation of both the coding cost and related distortion.
This application describes a variety of aspects, including tools, features, embodiments, models, approaches, etc. Many of these aspects are described with specificity and, at least to show the individual characteristics, are often described in a manner that may sound limiting. However, this is for purposes of clarity in description, and does not limit the application or scope of those aspects. Indeed, all of the different aspects can be combined and interchanged to provide further aspects. Moreover, the aspects can be combined and interchanged with aspects described in earlier filings as well.
The implementations and aspects described herein can be implemented in, for example, a method or a process, an apparatus, a software program, a data stream, or a signal. Even if only discussed in the context of a single form of implementation (for example, discussed only as a method), the implementation of features discussed can also be implemented in other forms (for example, an apparatus or program). An apparatus can be implemented in, for example, appropriate hardware, software, and firmware. The methods can be implemented in, for example, a processor, which refers to processing devices in general, including, for example, a computer, a microprocessor, an integrated circuit, or a programmable logic device. Processors also include communication devices, such as, for example, computers, tablets, smartphones, cell phones, portable/personal digital assistants, and other devices that facilitate communication of information between end-users.
Reference to “one embodiment” or “an embodiment” or “one implementation” or “an implementation”, as well as other variations thereof, means that a particular feature, structure, characteristic, and so forth described in connection with the embodiment is included in at least one embodiment. Thus, the appearances of the phrase “in one embodiment” or “in an embodiment” or “in one implementation” or “in an implementation”, as well any other variations, appearing in various places throughout this application are not necessarily all referring to the same embodiment.
Additionally, this application may refer to “determining” various pieces of information. Determining the information can include one or more of, for example, estimating the information, calculating the information, predicting the information, or retrieving the information from memory.
Further, this application may refer to “accessing” various pieces of information. Accessing the information can include one or more of, for example, receiving the information, retrieving the information (for example, from memory), storing the information, moving the information, copying the information, calculating the information, determining the information, predicting the information, or estimating the information.
Additionally, this application may refer to “receiving” various pieces of information. Receiving is, as with “accessing”, intended to be a broad term. Receiving the information can include one or more of, for example, accessing the information, or retrieving the information (for example, from memory). Further, “receiving” is typically involved, in one way or another, during operations such as, for example, storing the information, processing the information, transmitting the information, moving the information, copying the information, erasing the information, calculating the information, determining the information, predicting the information, or estimating the information.
In the present application, the terms “reconstructed” and “decoded” may be used interchangeably, the terms “pixel” and “sample” may be used interchangeably, the terms “image,” “picture”, “frame”, “slice” and “tiles” may be used interchangeably. Usually, but not necessarily, the term “reconstructed” is used at the encoder side while “decoded” is used at the decoder side.
It is to be appreciated that the use of any of the following “/”, “and/or”, and “at least one of”, for example, in the cases of “A/B”, “A and/or B” and “at least one of A and B”, is intended to encompass the selection of the first listed option (A) only, or the selection of the second listed option (B) only, or the selection of both options (A and B). As a further example, in the cases of “A, B, and/or C” and “at least one of A, B, and C”, such phrasing is intended to encompass the selection of the first listed option (A) only, or the selection of the second listed option (B) only, or the selection of the third listed option (C) only, or the selection of the first and the second listed options (A and B) only, or the selection of the first and third listed options (A and C) only, or the selection of the second and third listed options (B and C) only, or the selection of all three options (A and B and C). This may be extended, as is clear to one of ordinary skill in this and related arts, for as many items as are listed.
Also, as used herein, the word “signal” refers to, among other things, indicating something to a corresponding decoder. For example, in certain embodiments the encoder signals a particular one of an illumination compensation parameter. In this way, in an embodiment the same parameter is used at both the encoder side and the decoder side. Thus, for example, an encoder can transmit (explicit signaling) a particular parameter to the decoder so that the decoder can use the same particular parameter. Conversely, if the decoder already has the particular parameter as well as others, then signaling can be used without transmitting (implicit signaling) to simply allow the decoder to know and select the particular parameter. By avoiding transmission of any actual functions, a bit savings is realized in various embodiments. It is to be appreciated that signaling can be accomplished in a variety of ways. For example, one or more syntax elements, flags, and so forth are used to signal information to a corresponding decoder in various embodiments. While the preceding relates to the verb form of the word “signal”, the word “signal” can also be used herein as a noun.
As will be evident to one of ordinary skill in the art, implementations can produce a variety of signals formatted to carry information that can be, for example, stored or transmitted. The information can include, for example, instructions for performing a method, or data produced by one of the described implementations. For example, a signal can be formatted to carry the bitstream of a described embodiment. Such a signal can be formatted, for example, as an electromagnetic wave (for example, using a radio frequency portion of spectrum) or as a baseband signal. The formatting can include, for example, encoding a data stream and modulating a carrier with the encoded data stream. The information that the signal carries can be, for example, analog or digital information. The signal can be transmitted over a variety of different wired or wireless links, as is known. The signal can be stored on a processor-readable medium.
| Number | Date | Country | Kind |
|---|---|---|---|
| 19305903.7 | Jul 2019 | EP | regional |
This application is a U.S. National Stage Application under 35 U.S.C. 371 of International Application PCT/EP2020/067503, filed Jun. 23, 2020, which is incorporated herein by reference in its entirety. This application claims the benefit of European Patent Application No. 19305903, filed Jul. 2, 2019, which is incorporated herein by reference in its entirety.
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/EP2020/067503 | 6/23/2020 | WO |
