Patent Grant
7872518
Embodiments according to the invention relate to a circuit and a method for providing a desired voltage difference in dependence on a reference voltage.
For measurement, control, protection or other purposes it can be desirable to provide predetermined voltage differences.
Embodiments of the invention provide a circuit for providing a desired voltage difference in dependence on a reference signal, the circuit comprising: A first resistor; a second resistor; a regulation circuit configured to regulate a current flowing through the first resistor, such that a voltage difference across the first resistor is determined by the reference signal; and a current mirror, wherein the current mirror is configured to mirror the current flowing through the first resistor to obtain a mirrored current flowing through the second resistor, such that the desired voltage difference is obtained across the second resistor.
Further embodiments according to the invention create a method for providing a desired voltage difference in dependence on a reference signal, a circuit for detecting, whether a voltage difference between two voltages is below a desired voltage difference, and a protection circuit.
Embodiments of the circuits and method are described hereinafter, making reference to the appended drawings.
In the following, equal features or features providing the same or similar functionality are referred to by the same reference signs.
The term “voltage” can also be referred to as “potential” or “voltage potential” and the term “voltage difference” also as “potential difference” or “voltage potential difference”. In the following description, voltages are described with respect to a reference voltage.
Embodiments of the circuits may comprise transistors of any transistor technology, for example field-effect transistor technology (FET) or bipolar transistor technology. Therefore, the following technology-independent terms are used for describing the respective transistor terminals: “control terminal” designates a gate terminal or base terminal, “source terminal” designates a source terminal or emitter terminal, and “sink terminal” designates a drain terminal or a collector terminal.
The mirrored current I2 flowing through the second resistor is proportional to the current I1 flowing through the first resistor R1. Thus, by generating a current I1 dependent on the reference signal Sref, a desired voltage difference V2, which is proportional to the voltage difference V1 across the first resistor R1, is generated.
As shown in
Embodiments of the circuit 100 can therefore be used for measurement, protection or other purposes, where a desired voltage difference V2 is required, which is essentially independent of a voltage VDDP.
In the following, an embodiment of a circuit 100 for providing a desired voltage difference V2 is described in more detail based on
The circuit 200 further comprises a first conductor 242 for applying a first voltage VDD, a second conductor 244 for applying a second voltage VDDP and a third conductor 246 for applying a third voltage VGND. The potential of the third conductor may serve as a reference potential.
The regulation circuit 110 comprises a first input terminal 112, a second input terminal 114, and an output terminal 116. A reference voltage Vref can be applied to the first input terminal 112 as reference signal Sref. The second input terminal 114 is coupled to a node K2, which is arranged between the first transistor M2 and the first resistor R2, which are arranged and coupled in series on the first current path 210. The output terminal 116 of the regulation circuit 110 is coupled to a control terminal G of transistor M2 and to a control terminal G of transistor M3.
The regulation circuit 110 can, for example, be a comparator or an operational amplifier, wherein the first input terminal forms the non-inverting input terminal and the second input terminal 114 forms the inverting input terminal.
The first current path 210 comprises the first transistor M2 (e.g. a p-channel MOS-FET) and the first resistor R1. A load path of the transistor M2 and the first resistor R1 are coupled in series to each other, wherein the sink terminal D or drain terminal D (MOS-FET) of the transistor M2 is connected to one terminal of the first resistor R1, whereas the other terminal of resistor R1 is coupled to the third conductor for the third voltage VGND.
The second current path 220 comprises the second resistor R2 and the fourth transistor MS (e.g. a n-channel MOS-FET). A load path of the fourth transistor MS and the second resistor R2 are coupled in series on the second current path, wherein a sink terminal D or drain terminal D (MOS-FET) of the fourth transistor MS is connected to one terminal of the second resistor R2, and the other terminal of the second resistor R2 is coupled to the second conductor 244 for the second voltage VDDP.
The third or further current path 230 comprises the second transistor M3 (e.g. a p-channel MOS-FET) and the third transistor M4 (e.g. a n-channel MOS-FET). A load path of second transistor M3 and the third transistor M4 are connected in series to each other on the third current path, wherein a sink terminal or draine terminal D (MOS-FET) D of the second transistor M3 is connected to a sink terminal D or drain terminal D (MOS-FET) D of the third transistor M4 and to a control terminal G or gate terminal G (MOS-FET) of the third transistor M4, wherein the control terminal G is again coupled to a control terminal G or gate terminal G (MOS-FET) of the fourth transistor M4. In other words, the third and fourth transistors M4, M5 form a two-transistor current mirror, which forms a part of the four-transistor current mirror 120.
A source terminal S of the first transistor M2 and a source terminal S of the second transistor M3 are electrically coupled to each other and to the first conductor 242 for applying the first voltage VDD. A source terminal S of the third transistor M4, a source terminal S of the third transistor M4, a source terminal S of the fourth transistor M5 and the contact-terminal of the first resistor, which is not connected to the sink terminal of the first transistor M2, are connected to each other and to a third conductor 246 for applying a third voltage VGND, for example ground GND.
The regulation circuit 110 is configured to compare the voltages at the first and the second input terminal 112, 114, i.e. the reference voltage Vref and the voltage at node K2 and to provide an output voltage 116, or more general, an output signal, which depends on the difference between the voltage applied to the first input terminal 112 and to the voltage applied to the second input terminal 114. The regulation circuit 110 is configured to control the output voltage output at the output terminal and provided to the gate G of transistor M2, such that a difference between the voltages applied to the first input terminal 112 and the second input terminal 114 is reduced below a voltage difference threshold, which is typically specific to the particular regulation circuit used. In an ideal case, the regulation circuit 110 is configured to minimize the voltage difference between the two input terminals, such that the voltage at the second input terminal and at node K2 respectively is essentially equal to the reference voltage Vref. In other words, the voltage difference V1 across the first resistor R1 is regulated such that it essentially equals to the reference voltage Vref.
The output voltage of the regulation circuit 110 is applied to the control terminals G of the first transistor M2 and the second transistor M3. Thus, a third or further current I is generated by the second transistor M3, which flows through the third transistor M4 and which is proportional to the current I1 flowing through the first resistor R1, i.e. I=k23·I1, k23 being a proportionality factor.
The third transistor M4 and the fourth transistor MS form a two-transistor current mirror and are configured such that the mirrored current I2 flowing through the second resistor R2 is proportional to the current I flowing through the third transistor M4, i.e. I2=k45·I or I2=k23·k45·I1, k45 being the corresponding proportionality factor. The voltage drop across the second resistor is designated with V2. With V2=R2·I2 and V1=Vref=R1·I1, the equation for V2 can also written as V2=R2/R1·k23·k45·Vref, and in case R1 is a multiple of R2, i.e. R1=n·R2, it can also be written as V2=1/n·k23·k45·Vref.
Thus, the voltage difference V2 can be determined—at least approximately independent of a second voltage VDDP applied to the second resistor R2—based on the reference voltage Vref, the ratio n of the first resistance R1 and the second resistance R2 and the proportionality factors k23 and k45.
Thus, embodiments of the circuit for providing a desired voltage difference in dependence on a reference signal or a voltage, can be easily adjusted to provide different desired voltage differences, e.g. for the same reference voltage Vref by adjusting the resistance values of the first resistor R1 and the second resistor R2 or their respective resistance ratio n.
Furthermore, in embodiments of integrated circuits 100, 200 for providing a desired voltage difference in dependence on a reference voltage, wherein the integrated circuit 100, 200 comprises two integrated polycrystalline resistors R1 and R2, also referred to as poly-resistors or polysilicon resistors, the absolute values of the poly-resistors R1, R2 may vary due to production tolerances from one production lot to another, however they will vary in the same manner, and thus, the ratio n of the resistance values of the first and second integrated poly-resistors R1 and R2 can be controlled very precisely and kept at the desired value despite of the production variations. The precise control of the ratio of the resistance values allows also a precise control of the desired voltage difference V2. Therefore, embodiments of the circuit 100, 200 have reduced or even negligible dependency and also reduced or even negligible temperature dependency with regard to the desired voltage difference V2.
In further embodiments, the first integrated resistor R1 and the second integrated resistor R2 comprise the same layer structure and differ only in their dimensions to provide the different resistance values.
Further embodiments of the circuit 100, 200 comprise a bandgap reference circuit, which provides a very accurate reference voltage Vref, for example at 1.2 V, which can be connected to the first terminal 112 of the regulation circuit 110 to provide the reference voltage Vref. Such embodiments provide a further temperature independence as bandgap reference circuits provide the reference voltage almost independent with regard to their temperature, i.e. provide a temperature coefficient of almost 0.
In
In further embodiments, the first transistor M2 and the second transistor M3 may comprise the same structure or layer structure and only differ in their dimensions to provide different current levels in the first and third current paths (k23< >1) or may even comprise the same dimensions to provide the same current levels in the first and third current paths (k23=1). Similar, the third transistor M4 and the fourth transistor M5 may comprise the same structure or layout structure with regard to each other and may only differ in their dimensions to provide different current levels in the second and third current path 220, 230 (k45< >1) or may even comprise the same dimensions to provide the same current level for the second current path 220 and the third current path 230 (k45=1).
Embodiments of the circuit 200 may also be described alternatively as a circuit 200, wherein the current mirror 120 comprises a first current path 210′, a second current path 220′ and a third current path 230, wherein the first current path comprises a transistor M2 coupled to the first resistor R1 to provide the current I1 flowing through the first resistor R1, wherein the third current path 230 comprises a second transistor M3 and a third transistor M4, wherein the second current path 220′ comprises a fourth transistor M5 coupled to the second resistor to provide the mirrored current flowing through the second resistor, wherein the first transistor M2 and the second transistor M3 are configured, such that the current I flowing through the third current path is proportional to a current I1 flowing through the first resistor; and wherein the third transistor M4 and the fourth transistor M5 are configured, such that the mirrored current I2 flowing through the second resistor R2 is proportional to the current I flowing through the third current path.
Further embodiments of the circuit 200 comprise a regulation circuit 110, which is configured to regulate the current I1 flowing through the first resistor R1 by regulating a voltage applied to a control terminal G of the first transistor M2, and wherein the regulation circuit 110 is further configured to regulate a voltage applied to a control terminal G of the second transistor M3, and wherein a source terminal S of the first transistor M2 and a source terminal of the second transistor M3 are connected to each other.
Further embodiments of the circuit 200 comprise a regulation circuit, which is configured to compare a reference voltage Vref of the reference signal Sref and a voltage obtained from a node K2 arranged between the first transistor M2 and the first resistor R1, and to regulate the voltage applied to the control terminal G of the first transistor M2 based on the comparison, such that a difference between the reference voltage Vref and the voltage obtained from the node K2 is reduced below a given threshold.
The current provider 320 is configured to receive the reference signal Sref and to provide a regulated current I2 flowing through the voltage shift resistor R2 based on the reference signal Sref, wherein the current provider 320 is configured to regulate the regulated current I2, such that the desired voltage difference V2 across the voltage shift resistor R2 is determined by the reference signal Sref.
The detection circuit 330 comprises a first input terminal 332 and a second input terminal 334 and is configured to compare a voltage at a first voltage detection circuit input 332 with a voltage at the second voltage detection circuit input 334 to obtain a comparison result signal Sres, wherein the first voltage detection circuit input 332 is coupled to a first conductor 242 for a first voltage VDD of the two voltages, wherein the voltage shift resistor R2 is coupled between a second conductor 244 for a second voltage VDDP of the two voltages and the second voltage detection circuit input 334, such that the voltage at the second voltage detection circuit input 334 differs from the second voltage VDDP by the desired voltage difference V2, and wherein the detection circuit 330 is configured to provide the comparison result signal Sres, such that the comparison result signal indicates, whether the voltage difference “VDDP−VDD” between the second voltage VDDP and the first voltage VDD is below the desired voltage difference V2.
As shown in
For embodiments, where the comparison result signal Sres is a comparison result voltage Vres, which is defined as Vres=VK1−VDD, the comparison result voltage Vres will change its sign, from a positive sign to a negative sign, as soon as the difference between the second voltage VDDP and the first voltage VDD is smaller than the desired voltage difference V2, i.e. VDDP−VDD<V2.
Thus, embodiments of a circuit 300 provide an efficient means for detecting whether a voltage difference between a first voltage VDD and a second voltage VDDP is below a desired voltage difference V2, wherein the desired voltage difference V2 is provided by a regulated current I2 flowing through a voltage shift resistor R2 and the regulated current is determined based on a reference signal Sref or a reference voltage Vref.
As explained based on
Embodiments of the circuit 300 may comprise, for example, a band reference circuit as reference circuit 310 to provide a reference voltage Vref as reference signal Sref.
A more detailed embodiment of a circuit 400 for detecting whether a voltage difference between a first voltage and a second voltage is below a desired voltage difference is described based on
The detection circuit 330 comprises a comparator as detection circuit 330, the comparator comprising two identical transistors M6 and M7, wherein the two transistors M6 and M7 are connected in parallel to each other to a current source 336 and to a two-transistor current mirror 338 and a detection circuit output respectively comparator output 336. The gate of the transistor M7 forms the first detection circuit input or comparator input 332 and the gate of the transistor M6 forms the second detection circuit input or second comparator input 334.
As already explained based on the
At small drain-source-voltages (VDDP−VDD) the n-channel voltage regulation transistor M1 changes from the saturation region into the ohmic region and the control terminal G of the regulation transistor M1 is pumped up such that the voltage at the control terminal G is increased. In the ohmic region external voltage spikes couple almost unattenuated on the internal voltage domain with the consequence that circuit parts, for example the thin gate oxide, are destroyed, and/or voltage spikes change the functionality, which is a risk for security controllers. The circuit should, furthermore, cover only a minimum of the surface area and may not be switched off, which leads to the requirement of an extremely low current consumption, for example smaller than 1 μA.
Asymmetric comparators are temperature-dependent, process-dependent, dependent on the comparator current and, thus, have a large spread of voltage differences (see, for example, the overvoltage protection region 530′ in
Non-inverting operational amplifiers generate output voltages which are larger than the internal voltage VDD. Therefore, the operational amplifier has to be connected to an external voltage supply. This leads to a large area consumption, e.g. due to the high voltage elements, and to a susceptance to failure with regard to the external voltage supply. Furthermore, an electrostatic discharge (ESD) protection is required.
Resistance or voltage dividers connected to an external voltage supply in combination with a comparator lead to large resistance areas due to the requirement of ultra-lower power supply.
The lower part of
The terms “internal” and “external” are used from the point of view of the “internal voltage domain” 242, and shall only indicate that typically the external voltage domain 244 comprises a higher voltage VDDP than the internal voltage domain 242 comprising a voltage VDD, or in other words, the external voltage domain 244 acts as power supply to the internal voltage domain 242.
The protection circuit 600 comprises, similar to the circuit 300 of
As can be seen from
Further embodiments comprise a series transistor regulation circuit, which is configured to reduce the voltage applied to the control terminal or to reduce the pumping of the control terminal G of the series transistor M1 such that the series transistor is operated in its saturation region in case the voltage difference between the second voltage VDDP and the first voltage VDD is below the desired voltage difference V2, or when the series transistor is about to change into the ohmic region.
The desired voltage V2 can be set essentially independent of the external voltage VDDP, and precisely and essentially independent from production or temperature variations. Thus, embodiments of the protection circuit 600 provide an efficient means for protecting the first voltage domain VDD from current spikes as they allow for a very precise and production/temperature independent monitoring of the voltage difference between the second voltage VDDP and the first voltage VDD.
A more detailed embodiment of a protection circuit 700 is described based on
The series transistor regulation circuit comprises an input terminal 612, which is coupled to the output terminal 336 of the comparator 330 to receive the comparison result voltage Vres, and comprises an output terminal 614, which is coupled to the control terminal G of the series transistor M1 to regulate the series transistor M1.
As already discussed based on
Embodiments of the protection circuit 600, 700 provide a protection circuit, which protects the first or internal voltage domain 242 from, for example, current spikes, by precisely detecting, when the voltage difference between the second or external voltage domain 244 and the first or internal voltage domain 242 is below the desired voltage V2, wherein V2 defines the overvoltage protection area 530, as shown in
Describing the protection circuit 700 in other words, a current I1 is generated across an integrated poly-resistor R1 using a high precision bandgap reference circuit 310 and a comparator 110. Absolute spreads of the resistance values of the poly-resistor lead to absolute spreads with regard to the current value of current I1. The current I1 is mirrored using the transistors M2-M5. With regard to the second or external voltage VDDP a high precision voltage drop is generated over a second integrated poly-resistor R2, wherein the resistance value of the poly-resistor R1 is a multiple of the resistance value of the poly-resistor R2, wherein the integrated poly-resistor R2 comprises the same spreads with regard to the resistance value, because the spreads of the resistance values of the resistors compensate each other. In other words, the absolute value of the poly-resistors R1 and R2 is very imprecise, however the ratio is very precise. Thus, a very precise voltage difference, for example 50 mV with regard to the second or external voltage VDDP can be generated.
The comparator 330 comprising two identical input transistors M6, M7 assesses the voltage at node K1. The comparison result signal Sres causes measures like, for example, pump stop or reducing the gate voltage of the gate of the series transistor M1, which prevents a change of the series transistor M1 into the ohmic region.
Protection circuits 600, 700 using a bandgap reference circuit 310 depend solely on the bandgap reference voltage, for example 1.2 V, but not from any other further integrated spreading component, which would be inevitable imprecise. Unavoidable variations of the absolute values of the resistors R1 and R2 compensate each other due to the circuit technology as already described. The bandgap reference provides a very precise absolute reference value on silicon. The whole comparison and protection circuit references only to the first or internal voltage domain. Therefore, a very precise setting of a voltage difference V2 with regard to the second or external voltage VDDP can be obtained.
Such bandgap reference voltage circuits are implemented anyway in many common integrated circuits. Also—derived thereof—the generation of a reference current I1 using an operational amplifier and a first resistor R1 is common to many integrated circuits. Therefore, the circuit part comprising the regulation circuit 110, the first transistor M2 and the first resistor R1 to generate the reference current I1 do not necessarily have to be implemented additionally but may simply be used as part of embodiments of the circuit 100, 200, 300, and 400 and of embodiments of the protection circuit 600 and 700. Thus, the generation of the reference voltage Vref, the regulation circuit 110, the first transistor M2 and the first resistor R1 are not relevant for the total current/area balance.
Embodiments of the circuit show no or at least a reduced temperature dependency, process dependency and no or at least a reduced dependency on the comparator current. Additionally, embodiments of the circuits are extremely area-saving and current-saving.
The embodiment 700 can also be referred to as a high precision, area- and current-saving voltage level detection circuit for overvoltage protection of integrated circuits with n-channel-series transistor, which do not comprise any external components.
It should be noted that embodiments of a circuit 300, 400 for detecting whether a voltage difference between a first voltage and a second voltage is below a desired voltage difference can comprise embodiments of circuits 100, 200 for providing a desired voltage difference. Furthermore, embodiments of a protection circuit 600, 700 can comprise circuits 300, 400 for detecting whether a voltage difference between a first voltage and a second voltage is below a desired voltage difference.
Although
Regulating 810 a current I1 flowing through a first resistor R1, such that the voltage difference V1 across the first resistor R1 is determined by the reference signal Sref.
Mirroring 820 the current I1 flowing through the first resistor R1 to obtain a mirrored current I2 flowing through a second resistor R2, such that a desired voltage difference V2 is obtained across the second resistor R2.
In further embodiments of the method 800 for providing a desired voltage difference V2, the mirroring of the current comprises: Operating a first transistor M2 regulating the current I1 flowing through the first resistor R1; operating a second transistor M3 providing a further current, such that the further current is proportional to the current I1 flowing through the first resistor; and operating a third transistor M4 and a fourth transistor M5, such that the mirrored current I2 flowing through the second resistor R2 is proportional to the further current.
In further embodiments of a method of providing a desired voltage difference, the regulating comprises: Regulating the current flowing through the first resistor R1 by regulating a voltage applied to a control terminal G of the first transistor M2, and regulating a voltage applied to a control terminal G of the second transistor M3, wherein a source terminal S of the first transistor M2 and a source terminal S of the second transistor M3 are connected to each other.
Providing 910 a reference signal Sref.
Providing 920 a regulated current flowing through the voltage shift resistor R2 based on the reference signal Sref, wherein the regulated current I2 is regulated such that the desired voltage difference V2 across the voltage shift resistor R2 is determined by the reference signal Sref.
Comparing 930 the first voltage VDD of the two voltages with a voltage, which differs from the second voltage VDDP of the two voltages by the desired voltage difference V2.
Providing 940 a comparison result signal Sres, such that the comparison result signal Sres indicates, whether the voltage difference between the second voltage VDDP and the first voltage VDD is below the desired voltage difference V2.
When the foregoing has been particularly shown and described with reference to particular embodiments thereof, it will be understood by those skilled in the art that various other changes in the form and details may be made without departing from the spirit and scope thereof. It is to be understood that various changes may be made in adapting to different embodiments without departing from the broader concept disclosed herein and comprehend by the claims that follows.
| Number | Name | Date | Kind |
|---|---|---|---|
| 5059888 | Van Tuijl et al. | Oct 1991 | A |
| 6573768 | Hwang | Jun 2003 | B2 |
| 7502719 | Moraveji | Mar 2009 | B2 |
| 20020050854 | Zha et al. | May 2002 | A1 |
| 20080007321 | Castaldo et al. | Jan 2008 | A1 |
| Number | Date | Country | |
|---|---|---|---|
| 20100026377 A1 | Feb 2010 | US |
