This application claims the priority of Korean Patent Application No. 2004-89693, filed on Nov. 5, 2004 in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.
1. Field of the Invention
Example embodiments of the present invention relate generally to a circuit and method thereof, and more particularly to a circuit for reducing impulse noise and method thereof.
2. Description of the Related Art
An orthogonal frequency division multiplexing (OFDM) technique may be an example of a multiple carrier modulation (MCM) technique. The OFDM technique may be applied in the field of digital transmission (e.g., digital audio broadcasting (DAB), digital television, wireless local area networks (WLANs), wireless asynchronous transfer mode (WATM) systems, etc.).
In the OFDM technique, data for transmission may be divided into a plurality of segments. Each of the plurality of segments may be modulated and transmitted in parallel. However, the above-described OFDM technique may require complex circuitry. Other conventional types of digital signal processing techniques may include Fast Fourier Transform (FFT) and Inverse FFT (IFFT).
The OFDM technique may be similar to a frequency division multiplexing (FDM) technique. However, in the OFDM technique, each of a plurality of subcarriers may be transmitted in the orthogonal direction with respect to other subcarriers, thereby achieving an increased data transmission efficiency when data is transmitted at higher speeds. Various techniques (e.g., OFDM/time division multiple access (OFDM/TDMA), OFDM/code division multiple access (OFDM/CDMA), etc.) may use the OFDM technique to transmit data at higher speeds.
A MCM signal received with the OFDM technique may experience noise incurred between a transmitter and a receiver. OFDM systems may be less sensitive to noise (e.g., impulse noise interference) as compared to single-carrier systems. Further, the duration of an OFDM symbol may be longer as compared to that of a single-carrier system symbol. Thus, the impulse noise energy may be dispersed throughout each of the OFDM sub-carriers within the symbol duration.
The impulse noise interference may negatively affect the performance of the OFDM system (e.g., a digital video broadcasting-terrestrial (DVB-T) system using 64 quadrature amplitude modulation (QAM)).
A conventional method for reducing impulse noise in OFDM systems may include time-domain clipping.
The clipping system 100 may perform clipping in an analog domain (e.g, before an analog signal may be transformed into a digital signal). The clipping system 100 may perform clipping with a fixed threshold clipping value. The required amount of clipping may be determined by measuring the power of a signal received from the ADC 130 and adjusting an amplitude gain of the received signal.
The power measuring unit 140 may measure the power of the signal received from the ADC 130 and may provide the measurement to the threshold calculator 150. The threshold calculator 150 may adjust the amplitude gain of the received signal by controlling the variable gain amplifier 110. The signal with the adjusted amplitude may be received by the clipping unit 120. The clipping unit 120 may clip the signal with the adjusted amplitude. The clipping level at the clipping unit 120 may approximate the peak amplitude of an OFDM signal.
If the amplitude of impulse noise is higher than the mean power of OFDM signals, the clipping method described above with respect to
The comparator 302 may output a first logic level (e.g., a higher logic level or a logic “1”) when the absolute value is greater than the threshold value C. Alternatively, the comparator 302 may output the second logic level when the absolute value is less than the threshold value C. A selector 303 may output the second logic level when the comparator 302 outputs the first logic level. Alternatively, the selector 303 may output the received OFDM signal Sk when the comparator 302 outputs the second logic level. The output of the selector 303 (e.g., the second logic level, the OFDM signal Sk, etc.) may be transmitted to an OFDM demodulator 304.
Thus, the clipping system 300 may output the second logic level in place of the OFDM signal Sk and may transmit the second logic level to the OFDM demodulator 304 when the absolute value of the OFDM signal Sk is greater than the threshold value C. Alternatively, when the absolute value of the OFDM signal Sk is less than the threshold value C, the clipping system 300 may transmit the OFDM signal Sk to the OFDM demodulator 304.
When the absolute value of the OFDM signal Sk is greater than the threshold value C, the OFDM signal Sk may include impulse noise. Thus, the above described method of inserting the second logic level in place of the OFDM signal Sk when the OFDM signal Sk is greater than the threshold value C may reduce the level of received noise within the OFDM signal Sk.
The determination of the threshold value C may affect the performance of a receiver executing the clipping method as described above with respect to
The performance of the receiver may also be affected by the characteristics of an automatic gain control (AGC) scheme (e.g., VGA 110 as shown in
The threshold value C may be set to a higher level (e.g., higher than a desired level) in order to avoid the above-described problem and reduce degradation of the received OFDM signals. For example, the threshold value C may bet set to be 15 dB higher than the average OFDM signal level. However, setting the threshold values to the higher level may increase an amount of noise in the received signals.
An example embodiment of the present invention is directed to a circuit, including a noise measuring unit comparing an absolute value of a first signal sample with absolute values of a plurality of second signal samples and generating a rank value based on the results of the comparison.
Another example embodiment of the present invention is directed to a method of reducing impulse noise, including delaying a received signal to generate a plurality of delayed signals, calculating the absolute value of each of the plurality of delayed signals, comparing the calculated absolute amplitude of a first of the plurality of delayed signals with the calculated absolute amplitude of at least one of the other plurality of delayed signals and setting an output based on the comparison.
The example embodiments of the present invention will become more apparent by describing in detail example embodiments thereof with reference to the attached drawings in which:
Hereinafter, example embodiments of the present invention will be described in detail with reference to the accompanying drawings.
In the Figures, the same reference numerals are used to denote the same elements throughout the drawings.
In the example embodiment of
The received signal will hereinafter be referred to as including at least one of an OFDM signal and a code division multiplexing (CDM) signal. However, it is understood that, in other example embodiments, the received signal may include any type of signal capable of modulation. Likewise, the circuit 400 may be configured to process OFDM signals, CDM signals and/or other types of signals.
In the example embodiment of
In the example embodiment of
In the example embodiment of FIG, 4, circuit 400 may use the rank of a signal sample Sk to detect signal samples affected by impulse noise. The circuit 400 may compute a rank value R(Sk) of the signal sample Sk as given by
where h(x)=1 . . . x>0=0 . . . x≦0
In the example embodiment of
The delay line 440 may include a plurality of delayers 401/402/403/410/411/412 connected in series. Each of the delayers 401/402/403/410/411/412 may delay the signal sample Skin and may output the delayed result. As shown in
In an example, an output of the delayer 403 may be located near the center of the delay line 440. The output may be the signal sample Sk. The signal sample Skin may be a base-band signal including a value (e.g., a real number or a complex number) received from an analog-to-digital converter (ADC) (not shown).
In the example embodiment of
The comparing unit 460 may compare the absolute value of the signal sample Sk (e.g., from the absolute calculator 423) with the absolute values received from the absolute calculators 404/405/406/413/414/415 at a plurality of comparators 407/408/409/416/417/418, respectively. The comparators 407/408/409/416/417/418 may output a first logic level (e.g., a higher logic level or logic “1”) when the absolute value of the signal sample Sk is higher than the compared output from the absolute value calculator 450 (e.g., from each of the absolute calculators 404/405/406/413/414/415). Otherwise, the comparators (407/408/409/416/417/418) may output a second logic level (e.g., a lower logic level or logic “0”).
The adder 419 may receive the results of each of the comparisons of the comparing unit 460 (e.g., the outputs of each of the comparators 407/408/409/416/417/418). The adder 419 may combine the received comparison results from the comparing unit 460 and may output the rank value R(Sk) (e.g., the number of comparators outputting the first logic level).
The absolute calculating unit 450 may not calculate absolute values of K (e.g., where K may be a natural number) outputs of the delayer 403 obtained before the signal sample Sk is generated and K outputs of the delayer 410 obtained after the signal sample Sk is generated. Impulse noise may influence a series of signal samples (e.g., consecutive or neighboring signal samples), and the impulse noise influence may not be limited to a single signal sample. Thus, by not calculating absolute values for K signal samples received before and/or after the signal sample Sk, an efficiency of the circuit 400 may increase (e.g., because signals with a higher probability of having a higher impulse noise levels may not require the calculation).
In an example, if all of the signal samples adjacent (e.g., neighboring or in close proximity) to the signal sample Sk are affected by impulse noise, the amplitudes of the affected signal samples may be higher as compared to the amplitude of the signal sample Sk. In this example, as shown in
The rank value R(Sk) of the signal sample Sk may be compared with the threshold T. If the rank value R(Sk) is higher than a threshold T, the amplitude of the signal sample Sk may be replaced with the second logic level. Alternatively, if the rank value R(Sk) is less than the threshold T, the signal sample Sk may be output.
The above-described example comparison and selection of one of the second logic level and the signal sample Sk may be performed by the threshold comparator 420 and the selector 421. The threshold comparator 420 may compare the rank value R(Sk) and the threshold T and may generate a selection signal (e.g., the result of the comparison). The threshold T may be a reference value used to clip noise in a received signal. The threshold T may be set to a higher value (e.g., a level sufficient to reject impulse noise without degrading the integrity of received signal samples).
The selection signal received from the threshold comparator 420 may be set to the first logic level (e.g., one of a higher and lower logic level) when the rank value R(Sk) is greater than the threshold T. The selection signal received from the threshold comparator 420 may be set to the second logic level (when the rank value R(Sk) is less than the threshold T. The selector 421 may output either the signal sample Sk or the second logic level based on the selection signal. If the selection signal is at the first logic level, the selector 421 may output the second logic level. If the selection signal is at the second logic level, the selector 421 may output the signal sample Sk.
The output of the selector 421 (e.g., one of the signal sample Sk and the second logic level) may be sent to the demodulator 422. The demodulator 422 may decode the received output from the selector 421 and may generate a bit stream. The demodulator 422 may be any well-known demodulator (e.g., an OFDM demodulator, a CDM demodulator, etc.).
In the example embodiment of
In the example embodiment of
In the example embodiment of
The clipping controller 670 may compare the rank value R(Sk) of the signal sample Sk with the first threshold T1. The clipping controller 670 may output the signal sample Sk if the rank value R(Sk) is less than the first threshold T1. Alternatively, the clipping controller 670 may output the second logic level when the rank value R(Sk) is greater than the first threshold T1. The clipping controller 670 may include a threshold comparator 628, an OR operation unit 639 and a selector 621.
The threshold comparator 628 may compare the rank value R(Sk) with the first threshold T1. The threshold comparator 628 may generate a selection signal based on the comparison result. The OR operation unit 639 may perform an OR operation on the selection signal and a plurality of sub selection signals. The selector 621 may output the one of the signal sample Sk and the second logic level in response to the output from the OR operation unit 639.
The selection signal may be set to the first logic level (e.g., one of a higher logic level and a lower logic level) if the rank value R(Sk) is higher than the first threshold T1. If the selection signal is at the first logic level, the selector 621 may output the second logic level. Alternatively, the selection signal may be set to the second logic level (e.g., one of a higher logic level and a lower logic level) if the rank value R(Sk) is less than the first threshold T1. If the selection signal is at the second logic level, the selector 621 may output the signal sample Sk. If at least one of the plurality of sub selection signals is at the first logic level, the selector 621 may output the second logic level.
In the example embodiment of
The sub clipping controllers 675, 680, and 685 may be connected in series with the clipping controller 670. Each of the sub clipping controllers 675, 680 and 685 may output the signal sample from their respective preceding element (e.g., the clipping controller 670, the sub clipping controller 675, or the sub clipping controller 680) of the sub clipping controllers 675, 680 and 685, respectively, if the sum of the rank value received from the preceding element and a value obtained by delaying the rank value is less than the threshold value T2. Alternatively, if the above-described conditions are not met, the sub clipping controllers 675, 680 and/or 685 may output the second logic level.
In the example embodiment of
The first sub delayers 635, 636 and 637 may delay the rank values output from the clipping controller 670, the sub clipping controller 675, and the sub clipping controller 680, respectively. The sub adders 629, 631, and 633 may combine the rank values received outputs from the clipping controller 670, the sub clipping controller 675, and the sub clipping controller 680, respectively, and the outputs received from the first delayers 635, 636, and 637, respectively.
The sub threshold comparators 630, 632, and 634 may compare outputs received from the sub adders 629, 631 and 633 and their corresponding thresholds T2, T3, and T4, respectively, thereby generating a sub selection signal for each of the sub threshold comparators 630, 632 and 634. The sub OR operation unit 640 may perform an OR operation on the sub selection signal received from the sub clipping controller 675 and the sub selection signal received from the sub clipping controller 680. The sub OR operation unit 641 may perform an OR operation on the sub selection signal received from the sub clipping controller 680 and the sub selection signal received from the sub clipping controller 685.
The second sub delayers 622, 624 and 626 may delay the outputs of the selector 621 (from the clipping controller 670), the sub selector 623 (from the sub clipping controller 675), and the sub selector 625 (from the sub clipping controller 680), respectively, and may output the delayed outputs. The sub selectors 623, 625, and 627 may output one of the outputs of the second sub delayers 622, 624 and 626 and the second logic level based on the outputs (e.g., selection signals) received from the sub OR operation units 640 and 641.
The sub selection signal may be set to the first logic level if the outputs of the sub adders 629, 631 and 633 are higher than their corresponding thresholds T2, T3, and T4, respectively. Otherwise, the sub selection signal may be set to the second logic level. If the sub selection signal is set to the second logic level, the sub selectors 623, 625, and 627 and the selector 621 may output the second logic level. Alternatively, if the sub selection signal is at the first logic level, the sub selectors 623, 625, and 627 may output the outputs received from the second sub delayers 622, 624 and 626, respectively.
As described above and shown in
However, the number of sub clipping controllers included within the circuit 600 according to other example embodiments of the present invention is not limited to the above-described and illustrated numbers. Rather, the number of clipping controller and sub clipping controllers may scale (e.g., based on application specific requirements).
In another example embodiment of the present invention, the thresholds T1-T4 may be set so as to satisfy the relationship as given by
While the above-described example embodiments and associated figures have been described and illustrated with respect to hardware implementations, it will be appreciated that, in other example embodiments, the above-described functionality may be achieved with other methodologies (e.g., a software system).
The example embodiments of the present invention being thus described, it will be obvious that the same may be varied in many ways. For example, it is understood that the above-described first and second logic levels may correspond to higher and lower logic levels, respectively, or, alternatively, to lower and higher logic levels, respectively. Further, it is understood that the first and second logic levels may correspond to analog voltages (e.g, in the analog domain) or numeric representations (e.g., “0” or “1”) (e.g., in the digital domain).
Such variations are not to be regarded as departure from the spirit and scope of the example embodiments of the present invention, and all such modifications as would be obvious to one skilled in the art are intended to be included within the scope of the following claims.
Number | Date | Country | Kind |
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10-2004-0089693 | Nov 2004 | KR | national |