The present invention will be better understood from a reading of the following detailed description, taken in conjunction with the accompanying drawing figures, in which like reference characters designate like elements, and in which:
In general, the present invention includes a method and circuit for regulating an output voltage of an electronic circuit. The present invention includes a hybrid voltage regulator comprising a linear regulator, a switching regulator, and a selector circuit for choosing whether the linear regulator, the switching regulator, or both are active. In accordance with one embodiment of the present invention, the linear regulator regulates the output voltage when the hybrid voltage regulator provides power for a small load current, e.g. a load current of less than approximately 2 milliamps (mA). When the load current rapidly increases to a level greater than or equal to a predetermined level, e.g. approximately 20 mA, the selector circuit enables or switches on the switching regulator. Because of the rapid increase in load current, the output voltage VOUT may droop to a level that can cause erroneous signal processing such as, for example, resetting a microprocessor. Thus, the linear regulator remains enabled to provide additional load current. Once the switching regulator has provided sufficient current to reestablish output voltage regulation to within some tolerance of its nominal value, e.g., a tolerance ranging from approximately 1% to approximately 5% of the nominal output voltage, the linear regulator is disabled or deactivated. The nominal value is a predetermined output voltage level. An advantage of the present invention is that the linear regulator provides current while the switching regulator ramps up to its nominal output current, thereby preventing the output voltage VOUT from dropping to a level that might cause erroneous signal processing.
Linear regulator 14 has an input 52 coupled for receiving a source of operating potential such as, for example, VCC, an input 54 coupled for receiving a source of operating potential such as, for example, VSS, and an output 56 connected to output node 28 and to output capacitor 76. Linear regulator 14 and switching regulator 16 share output capacitor 76. Linear regulator 14 has a current sense section (not shown) coupled to an output 58 for transmitting a current sense signal ILINEAR. Output 58 is connected to input 20 of selector circuit 12 and serves as a sensing output. Linear regulator 14 further includes an input 44 coupled to output 34 of selector circuit 12 for receiving an enable signal EN_LIN.
Switching regulator 16 comprises a controller 60, a switching circuit 61, an inductor 74, a current sense section for sensing load current ILOAD, and an output 75 connected to output node 28 and to output capacitor 76. It should be understood that typically inductor 74 is a discrete element coupled to switching circuit 61. However, this is not a limitation of the present invention and controller 60, switching circuit 61, and inductor 74 may be integrated on a single semiconductor substrate. Controller 60 has an input 57 coupled for receiving a source of operating potential such as, for example, VCC, an input 59 coupled for receiving a source of operating potential such as, for example, VSS, and outputs 68 and 70 connected to switching circuit 61. Control outputs 68 and 70 are labeled Q and QBAR, respectively, within controller 60. Controller 60 has an input 46 connected to output 36 of selector circuit 12 for receiving an enable signal EN_SWI and a current sense section (not shown) coupled to an output 63 for transmitting a current sense signal ISWITCH to selector circuit 12. Output 63 is connected to input 22 of selector circuit 12 and serves as a sensing output.
In accordance with one embodiment, switching circuit 61 comprises a pair of switching field effect transistors (“FETs”) 62 and 64, wherein each FET has a gate, a source, and a drain. Control output 68 of controller 60 is connected to the gate of switching transistor 62 and complementary control output 70 of controller 60 is connected to the gate of switching transistor 64. The source of switching transistor 64 is coupled for receiving a source of operating potential such as, for example, VSS, and the drain of switching transistor 64 is connected to the source of switching transistor 62 at node 65. The drain of switching transistor 62 is coupled for receiving a source of operating potential such as, for example, VCC. It should be understood that the circuit implementation of switching circuit 61 is not a limitation of the present invention. For example, switching circuit 61 may be comprised of a P-channel FET and a diode in place of FETs 62 and 64, respectively. Briefly referring to
Referring again to
A load 78 is coupled between output node 28 and a source of operating potential such as, for example, VSS and carries a current ILOAD. Load 78 is in parallel with output capacitor 76.
Upshift comparator 102 cooperates with downshift comparator 104 and a transition current reference generator 106 to form a comparator network 100, which is a portion of selector circuit 12. Upshift comparator 102 has a non-inverting input that serves as current sense input 20 and an inverting input 103 coupled to current reference generator 106. Downshift comparator 104 has an inverting input that serves as current sense input 22 and a non-inverting input 107 connected to current reference generator 106. Upshift comparator 102 and downshift comparator 104 control whether linear regulator 14 or switching regulator 16 is enabled. Current reference 106 provides a reference signal IREF1, to inverting input 103 of upshift comparator 102 and a reference signal IREF2 to non-inverting input 107 of downshift comparator 104. Reference current signal IREF1 is greater than reference current signal IREF2. When current sense signal ILINEAR is greater than reference current signal IREF1, switching or PWM regulator 16 is enabled and linear regulator 14 is disabled. When current sense signal ISWITCH is less than reference current signal IREF2, linear regulator 14 is enabled and switching regulator 16 is disabled. In accordance with this embodiment, the comparison is made based on currents such as, for example, sense currents ILINEAR and ISWITCH being greater than or less than a predetermined reference value. It should be understood that the comparison is not limited to being the comparison of currents but can be that of other types of signals.
In a system such as, for example, an automobile, operation typically begins in a key-off operating mode. In this operating mode, the load current ILOAD drawn from the battery is low or light, i.e., less than approximately 2 mA and typically less than approximately 100 microamps (μA). Load current ILOAD is low because any sub-systems receiving power from the battery are operating in low current standby mode. Examples of these sub-systems include modules such as keyless entry RF receivers, keyless start/passive access (transponder) systems, security systems, and the like. It should be noted that the systems listed are merely exemplary systems and the list is not a limitation of the present invention. For the sake of explanation, in the key-off operating mode, linear regulator 14 is assumed to be on or activated and switching regulator 16 is assumed to be off or deactivated. The current sense section of linear regulator 14 provides a current sense signal ILINEAR to input 20 of selector circuit 12 that is less than reference current signal IREF1. In this operating mode, switching regulator 16 is disabled or deactivated, provides substantially zero current to the load, and current sense signal ISWITCH is less than reference current signal IREF2. It should be understood that while switching regulator 16 is disabled or deactivated a leakage current may flow, but the leakage current is much smaller than the current that flows when switching regulator 16 is activated. For this description the leakage current can be considered to be zero. In response to current signal ILINEAR being less than reference current signal IREF1, comparator 102 causes control logic circuit 84 to generate an enable signal at output 34 which enables linear regulator 14 and a disable signal at output 36 which disables switching regulator 16. The output responses for this configuration are illustrated between times t0 and t1 of
Linear regulator 14 remains enabled and switching regulator 16 remains disabled until the system, e.g., the automobile, enters a key-on operating mode. In the key-on operating mode, load current ILOAD increases to a high enough level that the current sense section of linear regulator 14 provides a current sense signal ILINEAR to input 20 of selector circuit 12 that is greater than reference current signal IREF1. In response to current sense signal ILINEAR being greater than current reference signal IREF1, the output signal of comparator 102 changes state. This output signal appears at input 86 of control logic circuit 84 causing it to generate enable signal EN_SWI, which is transmitted from output 36 to switching regulator 16, thereby, enabling switching regulator 16.
The increase in load current ILOAD in cooperation with the effective series resistance of output capacitor 76 generates a negative voltage pulse that is transmitted to voltage sense input 26 of selector circuit 12. The negative voltage pulse causes output voltage VOUT that appears at input 26 to become lower than reference voltage VREF. Comparator 80 generates an assist signal ASSIST which prevents enable signal EN_LIN from going low. Assist signal ASSIST is also referred to as a linear control signal or a linear assist signal. Linear regulator 14 remains on while switching regulator 16 powers up, keeping output voltage VOUT from drooping by more than a lower specification limit as shown between times t1 and t4 in
At time t2, regulators 14 and 16 provide a summed current greater than load current ILOAD, thus recharging output capacitor 76 and beginning to return output voltage VOUT to regulation.
At time t3, output voltage VOUT exceeds the ASSIST threshold voltage, turning off assist signal ASSIST, which results in linear regulator 14 turning off. This leaves switching regulator 16 as the provider of current to the load. Because linear regulator 14 is off, it does not supply or provide any current to the load. As discussed hereinbefore, any leakage current from a regulator is sufficiently low that it is considered to be zero current.
At time t4, voltage regulator 10 has returned to equilibrium, i.e., switching regulator 16 is providing a load current of sufficient magnitude that the output voltage VOUT at output node 28 has stabilized, and output voltage VOUT is regulated at its nominal voltage so that the change in output voltage ΔVOUT substantially equals zero.
When the automobile returns to the key-off operating mode, load current ILOAD decreases to a low level, e.g., less than approximately 2 mA, which is detected by comparator 104 causing linear regulator 14 to turn on and switching regulator 16 to turn off. Linear regulator 14 then provides load current ILOAD.
By now it should be appreciated that a hybrid regulator circuit and method for improving load transient response in a regulated output voltage have been provided. In accordance with an embodiment of the present invention, the linear regulator circuit temporarily remains active or enabled while the switching regulator circuit is ramping up. This allows the linear regulator circuit to provide a sufficient amount of current to prevent the regulated output voltage from drooping or sagging to a level that may cause other circuitry to erroneously change state. An advantage of the present invention is that the linear and switching voltage regulators are switched on and off automatically in accordance with the load current levels, thereby increasing the speed of regulation.
It should be understood that voltage regulator 10 is not limited to automotive applications but may be used in other power applications.
Although certain preferred embodiments and methods have been disclosed herein, it will be apparent from the foregoing disclosure to those skilled in the art that variations and modifications of such embodiments and methods may be made without departing from the spirit and scope of the invention. For example, an output current sense resistor may be coupled between switching circuit 61 and VCC or between inductor 74 and output node 28 to implement the switching regulator current sense function. Although regulator 14 is described as a linear regulator and regulator 16 is described as a switching regulator, regulators 14 and 16 can both be linear regulators or they can both be switching regulators. Further, it should be noted that the word “when” is taken to mean at the time an event occurs and while the event is occurring unless stated otherwise. It is intended that the invention shall be limited only to the extent required by the appended claims and the rules and principles of applicable law.