Circuit arrangement for feeding a load

Description

BACKGROUND OF THE INVENTION

The invention relates to a circuit arrangement for feeding a load, which is equipped with

input terminals which are to be connected to a supply voltage source,

a power converter for generating a current through the load from a supply voltage supplied by the supply voltage source,

a control circuit for controlling the root-mean-square (rms) value of an operating parameter, comprising

a first circuit for generating a first signal that is a measure of the actual rms value of the operating parameter,

a second circuit for generating a second signal that is a measure of the desired rms value of the operating parameter,

a third circuit that is coupled to the first and the second circuit for generating a third signal that is dependent on the first and the second signal, and for influencing the operating state of the circuit arrangement in dependence on the third signal.

Such a circuit arrangement is known. The first signal is frequently generated by successively rectifying and averaging the signal that represents the operating parameter. As regards sinusoidal signals, it applies that Vrms=1.111 * Vavg, where Vrms is the rms value of the signal and Vavg is the average value, so that said operation yields a reliable rms value for sinusoidal signals. However, if said operation is applied to a signal that deviates substantially from a sine-shaped signal, the result of the operation may also deviate substantially from the actual rms value of the signal. To determine the rms value of such a non-sinusoidal signal use can be made of a “true rms sensor”. Such a “true rms sensor” however is a complicated circuit comprising many (active) components, as a result of which said circuit is also comparatively expensive.

SUMMARY OF THE INVENTION

It is an object of the invention to provide a circuit arrangement wherein the rms value of an operating parameter can be determined by means of comparatively simple means and regulated so as to obtain a desired level.

To achieve this, a circuit arrangement as mentioned in the opening paragraph is characterized in accordance with the invention in that the first circuit is equipped with

a fourth circuit for generating a fourth signal that is a measure of the actual average value of the operating parameter,

a fifth circuit for generating a fifth signal that is a measure of the actual maximum amplitude of the operating parameter,

a sixth circuit for generating a signal that is a linear combination of the third signal and the fourth signal.

It has been found that the rms value generated by the first circuit of a circuit arrangement in accordance with the invention is substantially equal to the actual rms value of the operating parameter, even if the form of the operating parameter as a function of time deviates substantially from the sine shape. By virtue thereof, also the rms value of the operating parameter is accurately regulated so as to obtain the desired value. The fourth circuit and the fifth circuit can be obtained using comparatively simple electronics, so that these circuits are also comparatively inexpensive. The same applies to the sixth circuit.

Good results were achieved using embodiments of a circuit arrangement in accordance with the invention wherein the load is a lamp, and the operating parameter is selected among the group consisting of the lamp current, the lamp voltage and the power consumed by the lamp.

Good results were also achieved using embodiments of a circuit arrangement in accordance with the invention wherein the sixth circuit generates a signal of the general formula

A*OPavg+B*OPmax,

wherein OPavg and OPmax are the value of the fourth signal and the value of the fifth signal, respectively, and wherein

0<

A<

1

and

0<

B<

1.

More particularly, good results were achieved for embodiments wherein

0.76<

A<

0.93

and

0.12<

B<

0.19.

These and other aspects of the invention are apparent from and will be elucidated with reference to the embodiment(s) described hereinafter.

BRIEF DESCRIPTION OF THE DRAWING

In the drawings:

FIG. 1

shows an example of a circuit arrangement in accordance with the invention to which a lamp is connected, and

FIG. 2

shows different embodiments of a part of the circuit arrangement shown in FIG.

1

.

DESCRIPTION OF THE PREFERRED EMBODIMENT(S)

In

FIG. 1

, K

5

and K

6

are input terminals that are to be connected to the poles of a supply voltage source. Input terminals K

5

and K

6

are connected to respective inputs of the circuit part GM that forms a rectifier in the form of a diode bridge. A first output K

1

of circuit part GM is connected to a second output K

2

by means of a capacitor C

1

and by means of a series arrangement of switching element S

1

and switching element S

2

. A control electrode of switching element S

1

is connected to a first output of circuit part Sc

1

. A control electrode of switching element S

2

is connected to a second output of circuit part Sc

1

. Circuit part Sc

1

is a control circuit for generating a control signal for rendering the switching elements S

1

and S

2

alternately conducting and non-conducting at a frequency f. Switching element S

2

is shunted by a series arrangement of coil L

1

, lamp terminal K

3

, lamp LA, lamp terminal K

4

and capacitor C

2

. The lamp LA is shunted by capacitor C

3

. Circuit parts GM and Sc

1

, switching elements S

1

and S

2

, coil L

1

, lamp terminals K

3

and K

4

and capacitors C

2

and C

3

jointly form a power converter for generating a current from a supply voltage supplied by the supply voltage source, which current flows through the load formed by the lamp LA. An input of circuit part Sc

1

is coupled to an output of circuit part III. A first input of circuit part III is connected to an output of circuit part II. A further input of circuit part III is connected to an output of circuit part I. An input of circuit part I is coupled to the lamp LA. In

FIG. 1

, this coupling is indicated by means of a dashed line. Circuit part I forms a first circuit for generating a first signal that is a measure of the rms value of an operating parameter which, in this example, is a lamp quantity. Circuit part I comprises circuit parts IV, V and VI which are coupled with each other. Circuit part IV forms a fourth circuit for generating a fourth signal that is a measure of the actual average value of the operating parameter. Circuit part V forms a fifth circuit for generating a fifth signal that is a measure of the actual maximum amplitude of the operating parameter. Circuit part VI forms a sixth circuit for generating a signal that is a linear combination of the third signal and the fourth signal. For this reason, respective inputs of circuit part VI are coupled to an output of circuit part IV and an output of circuit part V. Circuit part II forms a second circuit for generating a second signal that is a measure of the desired rms value of the operating parameter. Circuit part III forms a third circuit for generating a third signal that depends on the first signal and the second signal, and for influencing the operating state of the circuit arrangement in dependence upon the third signal. Circuit part I, II and III jointly form a control circuit for controlling the rms value of the operating parameter.

Next, a description is given of the operation of the circuit arrangement shown in FIG.

1

.

If the input terminals K

5

and K

6

are connected to a supply voltage source such as the electric power mains supplying a low-frequency AC voltage, this low-frequency AC voltage is rectified by the circuit part GM and a substantially constant DC voltage is present across capacitor C

1

. The circuit part Sc

1

renders the switching elements S

1

and S

2

alternately conducting and non-conducting at a frequency f. As a result, a substantially square-wave voltage of frequency f is present at a junction point of the two switching elements, and an alternating current of frequency f flows through the lamp. The circuit part I generates the first signal that is a measure of the rms value of a lamp quantity such as the lamp current, lamp voltage or lamp power. The first signal is formed via the circuit part VI as a linear combination of the fourth signal generated by circuit part IV and the fifth signal generated by circuit part V. More particularly, the first signal is equal to 0.845*OPavg+0.155*OPpk, where OPavg and OPpk form, respectively, the fourth signal and the fifth signal. The circuit part II generates a second signal that is a measure of the desired rms value of the lamp quantity. The circuit part III generates a third signal from the first and the second signal. This third signal is used to influence the operating state of the circuit arrangement via the frequency and/or the duty cycle of the control signal in such a manner that the rms value of the lamp quantity at any moment in time is substantially equal to the desired value. This can be achieved, for example, via the frequency and/or duty cycle of the control signal. It is also possible to regulate the conduction time of the switching elements or the voltage across capacitor C

1

by means of means that are not shown in FIG.

1

.

FIG. 2A

shows an embodiment of the circuit part I of the circuit arrangement shown in

FIG. 1

wherein the lamp quantity forming the operating parameter is the lamp voltage. K

2

and K

7

are terminals between which a signal is present during operation of the circuit arrangement shown in

FIG. 1

, which signal is a measure of the actual value of the lamp voltage. This can be achieved, for example, by arranging the primary winding of a transformer equipped with a primary winding and a secondary winding over the lamp and connecting the terminals K

2

and K

7

to respective ends of the secondary winding. Terminals K

7

and K

2

are interconnected by means of a series arrangement of diode D

1

, ohmic resistor R

1

and capacitor C

5

. The series arrangement of diode D

1

and ohmic resistor R

1

is shunted by a series arrangement of diode D

2

and ohmic resistor R

4

. A junction point of diode D

1

and ohmic resistor R

1

is connected to terminal K

2

by means of ohmic resistor R

3

. Ohmic resistor R

3

is shunted by capacitor C

4

. A junction point of diode D

2

and ohmic resistor R

4

is connected to terminal K

2

by means of ohmic resistor R

2

. A junction point of ohmic resistor R

1

, ohmic resistor R

4

and capacitor C

5

forms terminal K

8

. During operation of the circuit arrangement shown in

FIG. 1

, the first signal is present between terminal K

8

and terminal K

2

. Diode D

2

, ohmic resistors R

2

and R

4

, and capacitor C

5

jointly form the circuit part IV. Diode D

1

, capacitors C

4

and C

5

and ohmic resistors R

3

and R

1

jointly form the circuit part V. The circuit VI is formed by the junction point of ohmic resistor R

1

, ohmic resistor R

4

and capacitor C

5

.

Next, a description is given of the operation of the example shown in FIG.

2

A.

If a signal that is a measure of the actual lamp voltage is present between the terminals K

7

and K

2

, then the circuit part IV generates a fourth signal that is a measure of the actual average value of the lamp voltage. Circuit part V generates a signal that is a measure of the actual maximum value of the amplitude of the lamp voltage. Circuit part VI generates the first signal that is a linear combination of the first and the second signal: A*OPavg+B*OPpk, where OPavg forms the fourth signal and OPpk forms the fifth signal. The values of the constants A and B are determined by the resistance values of the ohmic resistors R

1

, R

2

, R

3

and R

4

. The first signal is formed by the voltage across capacitor C

5

.

FIG. 2B

shows an example of circuit part I, wherein the operating parameter whose rms value is controlled is the lamp current. K

9

and K

10

are terminals forming the ends of the primary winding of a transformer T

1

. During operation of the circuit arrangement shown in

FIG. 1

, a signal that is a measure of the actual value of the lamp current is present between the terminals K

9

and K

10

. This can be achieved, for example, by arranging the transformer and the lamp so as to be in series. Respective ends of a secondary winding of the transformer T

1

are connected to respective inputs of a diode bridge formed by diodes D

1

-D

4

. A first output of the diode bridge is connected to a second output by means of ohmic resistor R

2

and by means of a series arrangement of diode D

5

and capacitor C

4

. Capacitor C

4

is shunted by ohmic resistor R

3

and by a series arrangement of ohmic resistor R

1

and capacitor C

5

. Ohmic resistor R

2

is shunted by a series arrangement of ohmic resistor R

4

and capacitor C

5

. A junction point of ohmic resistor R

4

and capacitor C

5

forms a terminal K

8

. During operation of the circuit arrangement, the first signal is present between terminal K

8

and terminal K

2

in the form of the voltage across capacitor C

5

. Circuit part IV is formed by transformer T

1

, the diode bridge, ohmic resistors R

4

and R

2

and capacitor C

5

. Circuit part V is formed by transformer T

1

, the diode bridge, diode D

5

, ohmic resistors R

3

and R

1

and capacitors C

4

and C

5

. Circuit part VI is formed by the junction point of ohmic resistor R

1

, ohmic resistor R

4

and capacitor C

5

.

The operation of the example shown in

FIG. 2

corresponds to the operation of the example shown in FIG.

2

A and will not be separately described herein. Also in this example, the values of the constants A and B are determined by the resistance values of the ohmic resistors R

1

, R

2

, R

3

and R

4

.

FIG. 2C

shows a further embodiment of the circuit part I, in which the operating parameter whose rms value is controlled is the lamp voltage. K

2

and K

7

are terminals between which, during operation of the circuit arrangement shown in

FIG. 1

, a signal is present that is a measure of the actual value of the lamp voltage. This can be achieved, for example, by arranging the primary winding of a transformer equipped with a primary and a secondary winding over the lamp and connecting terminals K

2

and K

7

to respective ends of the secondary winding. Terminals K

7

and K

2

are connected together by means of a series arrangement of capacitor C

3

, ohmic resistor R

6

and diode D

1

. Diode D

1

is shunted by a series arrangement of diode D

2

and ohmic resistor R

2

. A junction point of diode D

2

and ohmic resistor R

2

is connected to terminal K

2

by means of a series arrangement of diode D

5

and capacitor C

4

. Diode D

5

is shunted by a series arrangement of ohmic resistor R

4

and ohmic resistor R

1

. Capacitor C

4

is shunted by ohmic resistor R

3

. A junction point of ohmic resistor R

4

and ohmic resistor R

1

forms a terminal K

8

. Terminal K

8

is connected to terminal K

2

by means of a capacitor C

5

. During operation of the circuit arrangement, the first signal is present between terminals K

8

and K

2

in the form of the voltage across capacitor C

5

. Capacitor C

3

, ohmic resistors R

6

and R

2

, and diodes D

1

and D

2

form a single-phase rectifier that, during operation, rectifies the signal present between terminals K

7

and K

2

. This rectifier and ohmic resistors R

4

, R

1

and R

3

, and capacitor C

5

jointly form the circuit part IV. The circuit part V is formed by the rectifier in combination with diode D

5

, capacitors C

4

and C

5

and ohmic resistors R

1

and R

3

. Circuit part VI is formed by the junction point of ohmic resistor R

4

, ohmic resistor R

1

and capacitor C

5

.

The operation of the example shown in

FIG. 2C

corresponds to the operation of the examples shown in FIG.

2

A and FIG.

2

B and will not be separately described herein. Also in this example, the values of the constants A and B are determined by the resistance values of the ohmic resistors R

1

, R

2

, R

3

and R

4

.

FIG. 2D

forms a fourth example of circuit part I, which corresponds substantially to the example shown in FIG.

2

C. In the example shown in

FIG. 2D

, ohmic resistor R

6

is arranged in series with diode D

1

. The series arrangement of diode D

1

and ohmic resistor R

6

is shunted by a capacitor C

6

. For the rest, the structure of the example shown in

FIG. 2D

corresponds to that of the example shown in FIG.

2

C. Capacitor C

4

and capacitor C

3

jointly form a capacitive divider. The resistance value of ohmic resistor R

6

is chosen to be substantially equal to that of ohmic resistor R

2

. As a result, diode D

1

and diode D

2

carry substantially equal currents and a DC offset due to a difference in diode threshold voltages does not develop.

The operation of the example shown in

FIG. 2D

corresponds to the operation of the examples shown in

FIG. 2A

, FIG.

2

B and FIG.

2

C and will not be separately described herein.

Claims

1. A circuit arrangement for feeding a load, which is equipped withinput terminals for connection to a supply voltage source, a power converter for generating a current through the load from a supply voltage supplied by the supply voltage source, a control circuit for controlling the rms value of an operating parameter to achieve a desired rms value comprising a first circuit for generating a first signal that is a measure of the rms value of the operating parameter, a second circuit for generating a second signal that is a measure of the desired rms value of the operating parameter, a third circuit that is coupled to the first and the second circuit for generating a third signal that is dependent on the first and the second signal, and for influencing the operating state of the circuit arrangement in dependence on the third signal, characterized in that the first circuit is equipped with a fourth circuit for generating a fourth signal that is a measure of the average value of the operating parameter, a fifth circuit for generating a fifth signal that is a measure of the maximum amplitude of the operating parameter, a sixth circuit for generating a signal that is a linear combination of the third signal and the fourth signal.
2. The circuit arrangement as claimed in claim 1, wherein the load is a lamp, and the operating parameter is selected among the group consisting of the lamp current and the lamp voltage.
3. The circuit arrangement as claimed in claim 1, wherein the sixth circuit generates a signal of the general formulaA*OPavg+B*OPmax, wherein OPavg and OPmax are the value of the fourth signal and the value of the fifth signal, respectively, and wherein0<A<1 and0<B<1.
4. The circuit arrangement as claimed in claim 3, wherein0.76<A<0.93 and0.12<B<0.19.

Priority Claims (1)

Number	Date	Country	Kind
01203231	Aug 2001	EP

US Referenced Citations (8)

Number	Name	Date	Kind
3434053	McKee	Mar 1969	A
5075602	Overgoor et al.	Dec 1991	A
5450268	Phillips et al.	Sep 1995	A
5670849	Melai	Sep 1997	A
6078147	Arts et al.	Jun 2000	A
6376997	Aendekerk	Apr 2002	B1
6522089	Duong et al.	Feb 2003	B1
6545432	Konopka	Apr 2003	B2

Foreign Referenced Citations (1)

Number	Date	Country
0605052	Jun 1994	EP

Circuit arrangement for feeding a load

Information

Patent Number

Date Filed

Date Issued

Inventors

Original Assignees

Examiners

CPC

US Classifications

Field of Search

US

International Classifications

Abstract

Description

Claims

Priority Claims (1)

US Referenced Citations (8)

Foreign Referenced Citations (1)