The invention relates to a circuit arrangement having at least two activatable communication interfaces.
In many areas of engineering, special interface standards have now been developed so that electronic devices can communicate with one another. In this context, the V.24 standard or the RS232 standard for connecting printers and external devices to a computer are known, for example, from computer technology.
Another standard which is now very widespread is the USB standard, which allows devices to communicate with one another at high transmission rates using serial data transmission.
In the area of chip card technology, the interface based on ISO 7816, which is subsequently referred to as ISO for short, is widespread. This is used for a very wide variety of contact-based chip cards, for example for telephone cards, which have been known for a long time, widely used health insurance cards or else cash cards, which are being used to an increasing extent.
In the field of chip card technology, the USB standard is likewise known for data interchange, but this has not been used for data interchange between a chip card and a reader to date, since the readers usually only support the ISO 7816 standard.
One known solution to allow chip cards to be operated with ISO and USB interfaces is to use contacts C4 and C5 from the eight-contact chip card contact based on ISO 7816, which are reserved for additional services, for the D+ and D− lines based on the USB standard. In the case of a six-contact ISO connection, contacts C3 and C7 are provided for the USB data lines D+ and D−.
It is also known practice to use an additional pin for changing over between communication standards or to identify the signal levels on the dedicated interface lines (particularly D+/D− in the case of USB).
The invention provides a circuit arrangement having at least two activatable communication interfaces and also a method for activating and operating a communication interface in such a circuit arrangement, wherein operation on the basis of at least two standards is possible with little outlay and with a high level of flexibility.
A circuit arrangement in an embodiment of the invention has at least two communication interfaces, a clock input, a frequency divider, and a frequency comparator configured to compare a frequency applied to the clock input with a reference frequency, and to output a comparison signal, wherein based on the comparison signal, the circuit arrangement is configured to divide the frequency applied to the clock input and to activate a communication interface of the at least two communication interfaces.
In a method for activating a communication interface in a circuit arrangement having at least two communication interfaces, a clock input, a frequency divider and a frequency comparator according to an embodiment of the invention, the method includes comparing, by the frequency comparator, a frequency applied to the clock input with a reference frequency, activating one of the at least two communication interfaces based on the result of the comparison, and dividing the frequency applied to the clock input based on the result of the comparison.
In addition, the frequency comparator in the circuit arrangement may have a counter which is part of a phase-coupled control loop. The counter can be used in the phase-coupled control loop as a frequency divider. By way of example, provision may be made for the counter to be used as a frequency divider in a first mode of operation, in which the control loop produces a clock for operating the circuit arrangement, and to be used as a counter for the frequency comparison in a second mode of operation, in which a communication interface is activated.
In another advantageous refinement, the phase-coupled control loop has an adjustable oscillator which is used in a freewheeling state as a time base used for the comparison. In this case too, two modes of operation may be provided, wherein in one the oscillator is used as part of the phase-coupled control loop and in the other the oscillator is used in a freewheeling state as a time base.
Advantageously, the frequency comparator in the circuit arrangement is in a form such that it can take the applied frequency at the clock input as a basis for identifying at least two frequency ranges or for distinguishing which of at least two frequency ranges contains the frequency of a clock applied to the clock input.
Another feature of the circuit arrangement is that the frequency comparator is in a form such that the frequency ranges to be identified can be set as desired.
In this case, a communication interface in the circuit arrangement may advantageously be based on a USB standard (both standard USB and interchip USB).
Another communication interface in the circuit arrangement may advantageously be based on the ISO/IEC 7816 standard.
The communication interfaces may have common connections for making contact. This allows the number of connections needed to be reduced.
The block diagram in
The circuit arrangement in
The input side of the frequency comparator 1 is connected to an output of the VCO 5 and to the clock input 6. The output of the frequency comparator 1 is connected to a control input of the multiplexer 2 and to the data input of the interface register 3.
In addition, the output of the VCO 5 is connected to the reset input of the interface register 3 via the delay circuit 4. In addition, the VCO 5 delivers a signal VCO-valid, which indicates whether the VCO frequency has been reached and is stable, to respective reset inputs of the delay circuit 4, of the interface register 3 and of the delay circuit 1. The effect achieved by this is that the delay circuit 4, the interface register 3 and the frequency comparator 1 cannot operate until the VCO frequency has been reached and is stable.
The clock input 6 is connected to one input of the multiplexer 2 directly and to another input of the multiplexer 2 via the frequency divider 8, which has a division ratio of eight. The output of the multiplexer 2 is connected to the clock output 7.
The VCO 5 is used as the internal time base in order to measure the frequency applied to the clock input 6. If the frequency applied to the clock input 6 exceeds a particular value then the circuit arrangement identifies that a USB interface or a USB frequency is involved. Otherwise, it is assumed that an ISO clock or an ISO interface is involved.
If a USB frequency is assumed, the frequency at the clock input 6 is divided by eight by means of the frequency divider 8, and if an ISO frequency is assumed, the frequency applied to the clock input 6 externally is maintained. To this end, when a USB frequency is assumed, the multiplexer 2 is used to select the frequency divided by the frequency divider 8 and forward it to the clock output 7. When an ISO frequency is assumed, the frequency is forwarded undivided.
As soon as the signal VCO-valid indicates a stable VCO frequency following start-up, the frequency comparator 1 takes the frequency of the clock signal from the VCO 5 and the frequency of a clock applied to the clock input 6 as a basis for producing a comparison result at the data input of the interface register 3. In addition, the delay circuit 4 produces a time-delayed signal at the clock input of the interface register 3 a certain time afterwards, so that the comparison result is transferred to the interface register 3 after a time delay.
The output of the interface register 3 produces the comparison result, which indicates whether the USB interface or the ISO interface needs to be activated. Since the frequency at the clock input 6 can assume different values and the circuit arrangement should be operated only up to a certain frequency, the standard path provided for a clock applied to the clock input 6 is the path via the frequency divider 8.
The delay circuit 4 produces the time-delayed signal only once, so that the interface register 3 can adopt the comparison result only once and is then unable to change over again until the next reset or the next start-up.
Number | Date | Country | Kind |
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10 2007 035 808.5 | Jul 2007 | DE | national |