Patent Application
20050047045
1. Field of the Invention
The invention relates to circuit breakers including a trip unit, and more specifically, to circuit breaker trip units including plural current/time protection functions.
2. Background Information
Circuit breakers and, in particular, circuit breakers of the molded case variety, are well known in the art. See, for example, U.S. Pat. No. 5,341,191.
Circuit breakers are used to protect electrical circuitry from damage due to an overcurrent condition, such as an overload condition or a relatively high level short circuit or fault condition. Molded case circuit breakers typically include a pair of separable contacts per phase. The separable contacts may be operated either manually by way of a handle disposed on the outside of the case or automatically in response to an overcurrent condition. Typically, such circuit breakers include an operating mechanism, which is designed to rapidly open and close the separable contacts, and a trip unit, which senses overcurrent conditions in an automatic mode of operation. Upon sensing an overcurrent condition, the trip unit trips the operating mechanism to a trip state, which moves the separable contacts to their open position.
Industrial circuit breakers often use a circuit breaker frame, which houses a trip unit. See, for example, U.S. Pat. Nos. 5,910,760; and 6,144,271. The trip unit may be modular and may be replaced, in order to alter the electrical properties of the circuit breaker.
It is well known to employ trip units which utilize a microprocessor to detect various types of overcurrent trip conditions and to provide various protection functions, such as, for example, a long delay trip, a short delay trip, an instantaneous trip, and/or a ground fault trip. The long delay trip function protects the load served by the protected electrical system from overloads and/or overcurrents. The short delay trip function can be used to coordinate tripping of downstream circuit breakers in a hierarchy of circuit breakers. The instantaneous trip function protects the electrical conductors to which the circuit breaker is connected from damaging overcurrent conditions, such as short circuits. As implied, the ground fault trip function protects the electrical system from faults to ground.
The earliest electronic trip unit circuit designs utilized discrete components such as transistors, resistors and capacitors.
More recently, designs, such as disclosed in U.S. Pat. Nos. 4,428,022; and 5,525,985, have included microprocessors, which provide improved performance and flexibility. These digital systems sample the current waveforms periodically to generate a digital representation of the current. The microprocessor uses the samples to execute algorithms, which implement one or more current protection curves.
Each circuit breaker is designed for a specific maximum continuous current. This current rating may be set by a suitable selection mechanism, such as by a rotary switch or by selection of a resistor (e.g., a “rating plug”) which converts a current to a voltage for use by the trip unit. In some instances, a single circuit breaker frame may be easily adapted for installations which call for a range of maximum continuous currents, up to the design limits of the frame, through use of the selection mechanism by which the current rating of the device can be established. Typically, the pick-up currents for the various protection functions have been selectable multiples or fractions of this current rating. Thus, instantaneous protection trips the device any time the current reaches a selected multiple of the rated current, such as, for example, ten times the rated current. Pick-up for short delay protection is a lesser multiple of the rated current, while pick-up current for long delay protection may be a fraction of the rated current.
Typically, the short delay trip is only generated when the short delay pick-up current is exceeded for a short delay time interval, although, in some applications, an inverse time function is also used for short delay protection.
If the current/time characteristic of a circuit interrupter is plotted on a logarithmic scale with current on the abscissa and time on the ordinate, then the pick-up currents appear as vertical line segments, and the I2t characteristic (wherein “I” is the value of current and “t” is the time-to-trip) of the long delay, and if used for the short delay, appear as straight diagonal lines.
Typically, switches set the parameters of the various protection functions. See, for example, U.S. Pat. Nos. 4,752,853; and 5,367,427.
U.S. Pat. No. 5,490,086 discloses a circuit breaker including an electronic trip unit having a plurality of limit set inputs, such as rotary switches or potentiometers, which allow corresponding variables, such as long time delay, short time pick-up, short time delay and instantaneous pick-up to be adjusted. The trip unit also has a ground fault monitor module. A ground fault pick-up is divided into three levels: “Lo”, which is defined as 20 percent of frame rating; “Hi”, which is defined as the frame rating or 1200 amps, whichever is less; and “Med”, which is defined as the average of “Lo” and “Hi”. A ground fault delay is divided into three fixed times: 0.1, 0.3 and 0.5 seconds. An additional monitoring option has a 1200 amp pick-up and a 0.5 second delay. A rotary switch of the ground fault monitor module has ten positions. The switch is read by program code in an EPROM to determine the user selected ground fault pick-up and delay options. The user selects a Lo, Med or Hi ground fault pick-up level, by way of the rotary switch, when selecting the ground fault delay. The tenth position (MAX) indicates that the user has selected the 1200 amp pick-up and a 0.5 second delay.
Known prior trip units employ individual selector switches for various individual time functions. For example, one rotary switch is employed to select the short delay time, and another rotary switch is employed to select the ground fault time.
There is a need, therefore, for a circuit breaker having a trip unit that may be more readily configured to provide various trip functions.
There is also the need for a circuit breaker and a circuit breaker trip unit that reduce manufacturing cost.
There is room for improvement in circuit breakers and in circuit breaker trip units.
These needs and others are met by the present invention which provides a trip unit selector switch having a plurality of positions. Each of those positions selects a first time value for a first predetermined current/time condition and, also, selects a second time value for a different second predetermined current/time condition.
As one aspect of the invention, a trip unit for a circuit interrupter for an electrical circuit comprises: a sensor adapted to sense a current flowing in the electrical circuit and to provide a signal representative of the current; and a processor comprising a memory, a selector switch, and a routine evaluating the sensed current with respect to a plurality of predetermined current/time conditions and responsively generating a trip signal, the selector switch having a plurality of positions, with each of the positions selecting a first time value for a first one of the predetermined current/time conditions and selecting a second time value for a different second one of the predetermined current/time conditions.
The trip unit may include a plurality of styles, with one of the styles including both the first one of the predetermined current/time conditions and the different second one of the predetermined current/time conditions. The memory of the processor may include a configuration value. The routine of the processor may read the configuration value from the memory and responsively select a corresponding one of the styles of the trip unit.
The trip unit may include a plurality of styles, with one of the styles including both the first one of the predetermined current/time conditions and the different second one of the predetermined current/time conditions. The memory of the processor may be preconfigured to include one of the styles of the trip unit.
A count of the plurality of styles of the trip unit may be four, with a first one of the styles including both the first one of the predetermined current/time conditions and the different second one of the predetermined current/time conditions, with a second one of the styles including the first one of the predetermined current/time conditions, with a third one of the styles including the different second one of the predetermined current/time conditions, and with a fourth one of the styles including none of the first one of the predetermined current/time conditions and none of the different second one of the predetermined current/time conditions.
The routine may ignore the selector switch for the fourth one of the styles, which includes none of the first one of the predetermined current/time conditions and none of the different second one of the predetermined current/time conditions.
The first one of the predetermined current/time conditions may be a short delay protection function, and the different second one of the predetermined current/time conditions may be a ground fault protection function. The first time value may be selected by the selector switch from a first plurality of short delay times. The second time value may be selected by the selector switch from a second plurality of ground fault times.
As another aspect of the invention, a circuit breaker for an electrical circuit comprises: at least one set of separable contacts; an operating mechanism for moving the separable contacts between an open position and a closed position; and a trip unit comprising: a sensor adapted to sense a current flowing in the electrical circuit and to provide a signal representative of the current, and a processor comprising a memory, a selector switch, and a routine evaluating the sensed current with respect to a plurality of predetermined current/time conditions and responsively generating a trip signal, the selector switch having a plurality of positions, with each of the positions selecting a first time value for a first one of the predetermined current/time conditions and selecting a second time value for a different second one of the predetermined current/time conditions.
As another aspect of the invention, a method of selecting a plurality of time values for a trip unit comprises: employing a trip unit including a plurality of predetermined current/time conditions; employing a first time value for a first one of the predetermined current/time conditions; employing a second time value for a different second one of the predetermined current/time conditions; and employing a single selector switch having a plurality of positions, with each of the positions electing the first time value and selecting the second time value.
The method may further comprise employing the trip unit including a plurality of styles; employing one of the styles including both the first one of the predetermined current/time conditions and the different second one of the predetermined current/time conditions; configuring a memory to include a configuration value representing a corresponding one of the styles of the trip unit; and reading the configuration value from the memory and responsively selecting the corresponding one of the styles of the trip unit.
The method may comprise employing the trip unit including a plurality of styles; employing one of the styles including both the first one of the predetermined current/time conditions and the different second one of the predetermined current/time conditions; configuring a memory to include only one of the styles of the trip unit; and employing the only one of the styles including both the first one of the predetermined current/time conditions and the different second one of the predetermined current/time conditions.
The method may comprise employing at least one of short delay protection and ground fault protection; employing with the short delay protection a short delay time which is selected by the single selector switch from the group comprising a first time, a second time and a third time; employing with the ground fault protection a ground fault time which is selected by the single selector switch from the group comprising a fourth time, a fifth time and a sixth time; and employing the single selector switch having nine positions which correspond to the first time and the fourth time, the first time and the fifth time, the first time and the sixth time, the second time and the fourth time, the second time and the fifth time, the second time and the sixth time, the third time and the fourth time, the third time and the fifth time, and the third time and the sixth time.
A full understanding of the invention can be gained from the following description of the preferred embodiments when read in conjunction with the accompanying drawings in which:
The electronic trip unit 9 generates the trip signal 10 in response to the specified overcurrent conditions. This trip signal 10 actuates a trip device 15, which opens sets of separable contacts 17A, 17B and 17C, to interrupt current through the corresponding phase conductors of the electrical system 1.
The circuit breaker 5 provides several conventional modes of protection of the types previously discussed. In particular, long delay and instantaneous protection are provided. Short delay and/or ground fault protection may also be provided. These various protection functions can be more fully understood by reference to
An override protection function is represented in
A second or upper portion 23 of the current/time characteristic 19 above the override portion 21 provides the time delayed trip functions. A first section 25 of this upper portion 23 of the current/time characteristic 19 provides the short delay trip function. The vertical line segment 27 is the short delay pick-up (SDPU). As can be seen from
A second section 33 of the upper portion 23 of the current/time characteristic 19 provides the long delay protection. The long delay pick-up (LDPU) is represented by the vertical line segment 35. Commonly, the long delay trip function is provided with an inverse time function represented by the diagonal line segment 37. Typically, I2t inverse time functions are used for the long delay and, if used, the short delay trip functions. However, other inverse time functions such as It or I4t may be employed. These other inverse time functions would provide a different slope to the diagonal line segments 31 and 37.
The long delay time (LDT) 39 establishes the point 41 on the current/time characteristic 19. The current at point 41, which must persist for the long delay time 39, in order to generate the long delay trip may be, for example, six times the long delay pick-up current.
Referring again to
As shown in
Various combinations of protection functions can be provided by the circuit breaker 5, for example, long delay and instantaneous protection or long delay and short delay protection may be provided. Ground fault protection may or may not be included.
While the present invention is illustrated and described in conjunction with the circuit breaker 5 and trip unit 9 for a three-phase electrical system, the invention is not limited thereto and is applicable to other circuit breakers and trip units for use with single phase or polyphase electrical systems.
As is discussed below in connection with
Referring to
The LSIG style 9A of
When configured as an LSI style 9C of
Finally, in the LS style 9D of
Alternatively, in the event that the selector switch 51 is employed (e.g., thereby providing uniformity of design and manufacture between the various styles 9A-9D) (not shown), then it is simply ignored by the μP firmware in the memory (M) 63 of
The exemplary single selector switch 51, which is employed for zero, one or two time functions, saves space and cost.
The LS style 9D of
The LSI style 9C of
The LSG style 9B of
The LSIG style 9A of
Next, at 85, it is determined which of the four trip unit product styles 9A-9D of
A suitable configuration value (CV) 87 (e.g., “0”, “1”, “2”, “3”; “002”, “012, 102, “112”) may be provided from any suitable input (not shown) (e.g., a set of jumpers; a selector switch; a location, such as a byte, in configuration memory). Then, based upon that value 87, execution resumes with table 85A for the LSIG style 9A (e.g., for value “0”) in which there are adjustments for both SDT 29 and GFT 55, table 85B for the LSG style 9B (e.g., for value “1”) in which there is no adjustment for SDT 29, table 85C for the LSI style 9C (e.g., for value “2”) in which there is no adjustment for GFT 55, or table 85D for the LS style 9D (e.g., for value “3”) in which there are no adjustments for SDT 29 and GFT 55. Hence, the μP memory 63 includes the configuration value 87, and the switch read subroutine 66, which reads that configuration value 87 from the memory 63 and responsively selects a corresponding one of the tables 85A-85D.
Although the configuration value (CV) 87 is disclosed, different μP firmware may, alternatively, be employed in the memory (M) 63 for each of the different styles 9A-9D. Thus, the μP memory 63 may be preconfigured to include one of the trip unit styles 9A-9D.
Each of the tables 85A,85B,85C,85D associates the position value 83 of step 75 with the selected short delay time (SDT) 29 and the selected ground fault time (GFT) 55. For example, regardless of the position value 83, table 85D does not employ any value for the SDT 29 and the GFT 55, since those times are not needed by the LS style 9D. Table 85C also does not employ any value for the GFT 55, since that time is not needed by the LSI style 9C. Table 85B also does not employ any value for the SDT 29, since that time is not needed by the LSG style 9B. Based upon the position value 83, table 85A determines the values for both the SDT 29 and the GFT 55 for the LSIG style 9A as shown in
After step 85, execution resumes at 88, where the microprocessor 11 reads the switch 53 to determine the ground fault pick-up (GFPU) current. Although two values are read by steps 73 and 88, for the styles 9B-9D that do not employ one or both of those values, the particular setting(s) are thereafter simply ignored. Finally, at 89, the subroutine 66 returns.
As shown in
Although a nine-position rotary selector switch 51 is disclosed, the invention is applicable to a wide range of suitable selector switches (e.g., a BCD switch; a DIP switch) having any suitable count of positions, with each of those positions selecting a first time value and selecting a second time value.
Although three time values (e.g., instantaneous, 120 ms, 300 ms) are disclosed for the SDT values and for the GFT values, the invention is applicable to a wide range of counts of time values and a wide range of time values for a wide range of current/time protection functions. For example, different counts of time values for each of the SDT and GFT values may be employed. Also, different time values for each of the SDT and GFT values may be employed.
Although a three-phase circuit breaker 5 and trip unit 9 are disclosed, the invention is applicable to other types of circuit breakers and trip units including those used in AC systems operating at various frequencies and having any number of phases (e.g., one, two, three or more); to larger or smaller circuit breakers, such as subminiature or commercial circuit breakers; and to a wide range of circuit breaker applications, such as, for example, residential, commercial, industrial, aircraft, and aerospace. As further non-limiting examples, AC (e.g., 110-120, 220, 480-600 VACRMS) operation including a wide range of frequencies (e.g., 50, 60, 120, 400 Hz) are possible.
While the exemplary microprocessor 11 is shown, the invention is applicable to a wide range of processors (e.g., without limitation, microcomputers; other microprocessor-based computers; central processing units (CPUs)).
The exemplary single rotary selector switch 51 reduces the manufacturing cost of the trip unit 9. This trip unit may be readily configured to provide combinations of both SDT 29 and GFT 55 time values for each position of that selector switch.
While specific embodiments of the invention have been described in detail, it will be appreciated by those skilled in the art that various modifications and alternatives to those details could be developed in light of the overall teachings of the disclosure. Accordingly, the particular arrangements disclosed are meant to be illustrative only and not limiting as to the scope of the invention which is to be given the full breadth of the claims appended and any and all equivalents thereof.
