Claims
- 1. A circuit configuration for producing exponential predistortion for a variable amplifier, comprising:a first controlled current path having a first diode; a second controlled current path having a second diode and connected in parallel with said first controlled current path, controlled currents of said controlled current paths including a common-mode current component for setting an operating point of said first and second diodes and a differential current component for providing a small-signal drive; and a differential amplifier containing a first transistor having a control input connected to said first diode, and a second transistor having a control input connected to said second diode, a ratio of effective transistor areas of said second transistor and said first transistor is equal to a ratio of effective diode areas of said second diode and said first diode, said first diode having a given effective diode area being different from a given effective diode area of said second diode.
- 2. The circuit configuration according to claim 1, wherein said differential amplifier includes a first differential amplifier, and a second voltage controlled differential amplifier provided for controlling currents in said first and second controlled current paths, said second voltage controlled differential amplifier has a first output connected to said first diode and a second output connected to said second diode.
- 3. The circuit configuration according to claim 2, further comprising a resistor, and said second voltage controlled differential amplifier has two bipolar transistors with emitter connections connected to one another for producing negative feedback through said resistor.
- 4. The circuit configuration according to claim 1, wherein the ratio of said effective transistor areas of said second transistor and said first transistor, and the ratio of said effective diode areas of said second diode and said first diode with respect to one another are in each case set by connecting at least two identical components in parallel.
- 5. The circuit configuration according to claim 4, wherein:said first diode contains two diodes connected in parallel each having equivalent areas equal to a given area of said second diode, thus resulting in an area ratio C of 1:2; and said first transistor contains two transistors connected in parallel each having equivalent areas equal to a given area of said second transistor, thus resulting in the area ratio C of 1:2.
- 6. The circuit configuration according to claim 4, wherein:said first diode contains three diodes connected in parallel and each has an equivalent area equal to a given area of said second diode, thus producing an area ratio C of 1:3; and said first transistor contains three transistors connected in parallel and each has an equivalent area equal to a given area of said second transistor, thus producing the area ratio C of 1:3.
- 7. The circuit configuration according to claim 2, wherein:said first transistor of said first differential amplifier is connected by said control input directly to said first diode; and said second transistor of said first differential amplifier is connected by said control input directly to said second diode.
- 8. The circuit configuration according to claim 2,wherein said first transistor has a controlled path; wherein said second transistor has a controlled path; and further comprising load diodes, a first of said load diodes disposed in a third current path and a second of said load diodes disposed in a fourth current path, said third and fourth load paths being controlled by said first differential amplifier, said third current path including said controlled path of said first transistor and said fourth current path including said controlled path of said second transistor.
- 9. The circuit configuration according to claim 8, further comprising:an electrical load; a current balance circuit having control inputs and an output side, said first differential amplifier having an output side connected to said current balance circuit, said control inputs of said current balance circuit connected to said load diodes, and said output side of said current balance circuit connected to said electrical load.
- 10. The circuit configuration according to claim 1, wherein the circuit configuration is configured using bipolar circuit technology.
Priority Claims (1)
Number |
Date |
Country |
Kind |
101 06 388 |
Feb 2001 |
DE |
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CROSS-REFERENCE TO RELATED APPLICATION
This application is a continuation of copending International Application No. PCT/DE02/00328, filed Jan. 30, 2002, which designated the United States and was not published in English.
US Referenced Citations (4)
Foreign Referenced Citations (3)
Number |
Date |
Country |
0 444 361 |
Sep 1991 |
EP |
2 323 728 |
Sep 1998 |
GB |
9507574 |
Mar 1995 |
WO |
Continuations (1)
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Number |
Date |
Country |
Parent |
PCT/DE02/00328 |
Jan 2002 |
US |
Child |
10/639400 |
|
US |