Claims
- 1. A circuit configuration for the frequency conversion of an oscillator frequency into a carrier frequency, comprising:
a circuit node for receiving a signal having the oscillator frequency; a mixer having a first input, a second input, and an output; a first signal path coupling said circuit node and said first input of said mixer for transmitting the signal with the oscillator frequency unchanged in the signal's frequency; a second signal path containing a frequency divider having:
an input side coupled to said circuit node; and an output side coupled to said second input of said mixer; and said frequency divider providing an output signal at said output side having a quarter of a frequency of an oscillator signal present at said input side.
- 2. The circuit configuration according to claim 1, wherein said frequency divider is two frequency dividers formed as flip-flops disposed one behind another in a signal flow direction and respectively providing at their output a signal with half a frequency of a signal present at their input.
- 3. The circuit configuration according to claim 1, wherein said second signal path contains a low-pass filter.
- 4. The circuit configuration according to claim 1, wherein said second signal path contains a low-pass filter disposed downstream of said frequency divider in a signal flow direction.
- 5. The circuit configuration according to claim 2, wherein said second signal path contains a low-pass filter.
- 6. The circuit configuration according to claim 2, wherein said second signal path contains a low-pass filter disposed downstream of said two dividers in a signal flow direction.
- 7. The circuit configuration according to claim 1, further comprising an amplifier connected to said output of said mixer.
- 8. The circuit configuration according to claim 1, further comprising an amplifier connected to said output of said mixer for rejecting a higher beat frequency obtained by addition of frequencies of respective signals present at said first and second inputs of said mixer.
- 9. The circuit configuration according to claim 1, further comprising an oscillator coupled to said circuit node and providing the oscillator frequency.
Priority Claims (1)
Number |
Date |
Country |
Kind |
101 22 919.4 |
May 2001 |
DE |
|
CROSS-REFERENCE TO RELATED APPLICATION
[0001] This application is a continuation of copending International Application No. PCT/DE02/01698, filed May 10, 2002, which designated the United States and was not published in English.
Continuations (1)
|
Number |
Date |
Country |
Parent |
PCT/DE02/01698 |
May 2002 |
US |
Child |
10706780 |
Nov 2003 |
US |