The present disclosure relates to circuit devices in which coil components are mounted.
Noise countermeasures using a filter circuit are included in electronic devices. A filter circuit used for noise countermeasures, such as an EMI (electro-magnetic interference) removal filter, passes a necessary component of a current flowing through a conductor and eliminates an unnecessary component. Such a filter circuit includes a capacitor that is a capacitance element. It is thus known that a noise suppression effect is reduced by an equivalent series inductance (ESL) that is a parasitic inductance of the capacitor.
A technique is known for canceling out an equivalent series inductance ESL of a capacitor by a negative inductance generated by magnetic coupling between two coils and achieving the noise reduction effect of a filter circuit in a wider band (for example, Japanese Unexamined Patent Application Publication No. 2001-160728).
In the case where a circuit using a capacitor is installed in a vehicle, a redundant circuit configuration in which two capacitors are connected in series is provided in some cases for preventing the circuit from being short-circuited even if the capacitor included in the circuit fails. Accordingly, in the case where a filter circuit is installed in a vehicle, a redundant circuit configuration needs to be also applied to the filter circuit (for example, Japanese Unexamined Patent Application Publication No. 2004-022561).
However, in the case where the parasitic inductance of a capacitor is canceled out by a negative inductance generated by magnetic coupling between two coils when there is a wiring line of another capacitor other than the capacitor that generates the parasitic inductance, the parasitic inductance may change under the influence of the wiring line. Furthermore, it is difficult to understand in advance how noise occurs and it is therefore difficult to specify the parasitic inductance of a capacitor under the conditions that the number of capacitors mounted in a filter circuit and the arrangement of the capacitors are determined in advance.
Example embodiments of the present invention provide circuit devices with each of which changes in parasitic inductance of a capacitor can be reduced or prevented.
A circuit device according to an example embodiment of the present disclosure includes a substrate on which a wiring pattern is provided and a coil component mounted on the substrate. The coil component includes a first coil and a second coil that are magnetically coupled to each other. A first end of the first coil is connected to an input terminal, a second end of the first coil and a first end of the second coil are connected to an intermediate terminal, and a second end of the second coil is connected to an output terminal. The wiring pattern includes a first wiring line connected to the input terminal, a second wiring line connected to the output terminal, a third wiring line on which at least one or more capacitors are mounted in series and which electrically connects the intermediate terminal and a ground electrode, and a fourth wiring line on which an electrode provided to mount at least one or more capacitors in series is provided and which electrically connects the first wiring line or the second wiring line to a ground electrode. A distance between a first current path on which a current flows from the coil component to a ground electrode via the third wiring line and a second current path on which a current flows from the first wiring line or the second wiring line to a ground electrode via the fourth wiring line on which a capacitor is mounted at an electrode is not constant.
According to an example embodiment of the present disclosure, a structure is provided where a third wiring line and a fourth wiring line are not parallel to each other. Accordingly, the change in the parasitic inductance of a capacitor can be reduced or prevented.
The above and other elements, features, steps, characteristics and advantages of the present invention will become more apparent from the following detailed description of the example embodiments with reference to the attached drawings.
A circuit device according to the first example embodiment will be described below.
In the circuit device 100, the wiring pattern of the power supply line 70 is provided on the surface of a substrate 60 and the coil component 1 is mounted in series to the power supply line 70. The power supply line 70 includes a first wiring line 70a connected to an input terminal 4a of the coil component 1 and a second wiring line 70b connected to an output terminal 4b of the coil component 1.
The substrate 60 is provided by laminating a plurality of insulating layers and is made of, for example, low-temperature co-fired ceramics or a glass epoxy resin. Wiring patterns, such as the first wiring line 70a and the second wiring line 70b, the coil component 1, electrode patterns provided to mount components, such as the capacitors C1 and C2 and capacitors C3 and C4, are formed on the surface of the substrate 60 and are each made of a metal material, such as Cu, Ag, or Al that is generally used as an electrode material.
In the circuit device 100, the two capacitors C1 and C2 are connected in series to an intermediate terminal 4c of the coil component 1. On the substrate 60, the wiring pattern of a third wiring line 71 is provided as a wiring line to mount the capacitors C1 and C2. The third wiring line 71 electrically connects the intermediate terminal 4c between the two coils included in the coil component 1 and a ground electrode 71a with the capacitors C1 and C2 mounted thereon. In the circuit device 100, the two capacitors C3 and C4 are connected in series between the second wiring line 70b near the coil component 1 and a ground electrode 72a. On the substrate 60, the wiring pattern of a fourth wiring line 72 is provided as a wiring line to mount the capacitors C3 and C4. The fourth wiring line 72 electrically connects the second wiring line 70b and the ground electrode 72a with the capacitors C3 and C4 mounted thereon. The fourth wiring line 72 may be provided on the first wiring line 70a instead of the second wiring line 70b. A ground electrode is an electrode electrically connected to a ground potential and is provided of, for example, a conductive via electrically connected to a ground potential placed in the inner layer of the substrate 60. The third wiring line 71 and the fourth wiring line 72 are wiring lines to provide the electric connection from a coil component, the first wiring line 70a, and the second wiring line 70b to the ground electrodes 71a and 72a via capacitors and are each represented as a group of a plurality of wiring lines.
The fourth wiring line 72 linearly extends from the second wiring line 70b to the ground electrode 72a as illustrated in
The coil component 1 includes the input terminal 4a, the output terminal 4b, the intermediate terminal 4c, a coil L1 (first coil), and a coil L2 (second coil).
The capacitors C1 and C2 are connected in series between the input terminal 4a and the ground electrode 71a as illustrated in
Each of the capacitors C1 to C4 may be not only a multilayer ceramic capacitor made of BaTiO3 (barium titanate) as a main component but also a multilayer ceramic capacitor made of another material as a main component or a capacitor of another type, such as an aluminum electrolytic capacitor, which is not a multilayer ceramic capacitor.
The capacitors C1 and C2 connected to the coil component 1 includes an inductor L3 as a parasitic inductance (equivalent series inductance (ESL)). Accordingly, the circuit device 100 is equivalent to a circuit configuration in which the inductor L3 is connected in series to the capacitors C1 and C2 as illustrated in
The coils L1 and L2 are connected to the intermediate terminal 4c as well as the capacitors C1 and C2. The coils L1 and L2 are magnetically coupled to each other and generate a negative inductance component (mutual inductance M). With the negative inductance component, the parasitic inductance (the inductor L3) of the capacitors C1 and C2 can be canceled out, and an apparent inductance component of the capacitors C1 and C2 can be reduced.
The circuit device 100 including the capacitors C1 and C2 and the coils L1 and L2 can improve a noise reduction effect in a high frequency band by canceling out the parasitic inductance of the capacitors C1 and C2 by a negative inductance component generated by the mutual inductance M between the coils L1 and L2. The coil component 1 includes the coil L1 (the first coil) and the coil L2 (the second coil) that are transformer coils and are provided in a laminate body such that respective coil surfaces face each other in a lamination direction, and is mounted such that the respective coil surfaces are parallel or substantially parallel to the surface of the substrate 60. The configuration of the coil component 1 will be described with reference to a drawing.
As illustrated in
The side surfaces of the laminate body 3 include a first side surface (a side surface on which the input terminal 4a (a first external electrode) is provided) and a second side surface (a side surface on which the output terminal 4b (a second external electrode) is provided) on the long side and a third side surface (a side surface on which the intermediate terminal 4c (a third external electrode) is provided) and a fourth side surface (a side surface on which a terminal 4d is provided) on the short side.
In the coil component 1, the multiple wiring patterns 10 of the coils L1 and L2 are placed inside the laminate body 3. A portion of the multiple wiring patterns 10 defines the coil L1, and the remaining portion of them forms the coil L2. That is, the multiple wiring patterns 10 have a common portion of the coils L1 and L2, and the variations of magnetic coupling between the coils L1 and L2 can therefore be reduced or prevented.
An end portion 11 of the wiring pattern 10 in the uppermost layer, which is one of the multiple wiring patterns 10, is electrically connected to the input terminal 4a. An end portion 21 of the wiring pattern 10 in the lowermost layer, which is one of the multiple wiring patterns 10, is electrically connected to the output terminal 4b. An end portion 31 of the wiring pattern 10 in the middle layer, which is one of the multiple wiring patterns 10, is electrically connected to the intermediate terminal 4c. In the coil component 1 having the configuration illustrated in
Next, the change in a parasitic inductance in the circuit device 100 will be described.
As illustrated in
The increase in the degree of magnetic coupling between the third wiring line 71A and the fourth wiring line 72 leads to the increase in the parasitic inductance of the capacitors C1 and C2, and the parasitic inductance cannot therefore be sufficiently canceled out by the mutual inductance M of the coil component 1 in the circuit device 300.
On the other hand, the third wiring line 71 provided to mount the capacitors C1 and C2 is U-shaped in the circuit device 100 as illustrated in
Since the degree of magnetic coupling between the portion where the capacitor C1 is mounted and the portion where the capacitor C2 is mounted decreases, the degree of magnetic coupling between the third wiring line 71 and the fourth wiring line 72 also decreases. That is, by making the third wiring line 71 U-shaped, the third wiring line 71 is less susceptible to the magnetic coupling with the fourth wiring line 72 and the amount of change in the parasitic inductance of the capacitors C1 and C2 can be reduced.
The shape of the third wiring line 71 is a U-shape in which the capacitor C1 is mounted on one of the long sides and the capacitor C2 is mounted on the other one of them as illustrated in
On the U-shaped third wiring line 71, the capacitors C1 and C2 are mounted parallel or substantially parallel to each other. Accordingly, the capacitors C1 and C2 can be mounted in the same direction and be easily mounted on the substrate 60. The first current path (the path of the third wiring line 71) connected to the coil component 1 and the second current path (the path of the fourth wiring line 72) connected to the second wiring line 70b are parallel or substantially parallel to each other. However, the first current path (the path of the third wiring line 71) bends at right angles in the middle. The angle at which the path bends does not necessarily have to be a right angle.
The strength of the magnetic coupling between the third wiring line and the fourth wiring line depends on the distance between these wiring lines. In the graph illustrated in
In the case where the distance between the linear third wiring line 71A and the fourth wiring line 72 is short (e.g., approximately 1 mm) in the circuit device 300, the parasitic inductance of the capacitors C1 and C2 is higher than that in the configuration of a circuit device not including the fourth wiring line 72 by approximately 0.23 nH, for example. Also in the case where the distance between the third wiring line 71A and the fourth wiring line 72 is approximately 4 mm, the parasitic inductance of the capacitors C1 and C2 is higher than that in the configuration by approximately 0.11 nH, for example.
In the case where the distance between the U-shaped third wiring line 71 and the fourth wiring line 72 is short (e.g., approximately 1 mm) in the circuit device 100, the parasitic inductance of the capacitors C1 and C2 changes only by approximately 0.03 nH as compared with the configuration of a circuit device not including the fourth wiring line 72, for example. Also in the case where the distance between the third wiring line 71 and the fourth wiring line 72 is approximately 4 mm, the parasitic inductance of the capacitors C1 and C2 changes only by approximately 0.02 nH, for example.
As is apparent from
In the circuit device 100, the third wiring line 71 connected to the coil component 1 has a U-shape and is therefore less susceptible to the magnetic coupling with the fourth wiring line 72. However, there is a case where the capacitors C3 and C4 are not mounted depending on conditions where noise occurs.
In the case where the circuit device 100 does not include the capacitors C3 and C4 as illustrated in
As described above, the circuit device 100 according to the first example embodiment includes the substrate 60 on which a wiring pattern is provided and the coil component 1 mounted on the substrate 60. The coil component 1 includes the coils L1 and L2 that are magnetically coupled to each other. A first end of the coil L1 is connected to the input terminal 4a. A second end of the coil L1 and the first end of the coil L2 are connected to the intermediate terminal 4c. The second end of the coil L2 is connected to the output terminal 4b. The wiring pattern includes the first wiring line 70a connected to the input terminal 4a of the coil component 1, the second wiring line 70b connected to the output terminal 4b of the coil component 1, the third wiring line 71 on which the capacitors C1 and C2 are mounted in series and which connects the intermediate terminal 4c between the coils L1 and L2 and the ground electrode 71a, and the fourth wiring line 72 on which an electrode provided to mount the capacitors C3 and C4 in series is provided and which connects the first wiring line 70a or the second wiring line 70b to the ground electrode 72a. The circuit device 100 includes a portion where the third wiring line 71 and the fourth wiring line 72 are not parallel to each other.
Since the circuit device 100 according to the first example embodiment includes a portion where the third wiring line 71 and the fourth wiring line 72 are not parallel to each other, the effect of magnetic coupling with the fourth wiring line 72 upon the third wiring line 71 can be reduced and the change in the parasitic inductance of the capacitors C1 and C2 can be reduced or prevented.
It is desired that two or more capacitors be mounted on each of the third wiring line 71 and the fourth wiring line 72. A redundant circuit configuration can therefore be provided with which a short circuit does not occur even if one capacitor fails.
It is desired that a distance at which the gap between the third wiring line 71 and the fourth wiring line 72 is shortest be four times or less than a wiring line width of the third wiring line 71 or the fourth wiring line 72. The circuit device 100 including a portion where the third wiring line 71 and the fourth wiring line 72 are not parallel to each other can therefore effectively reduce the effect of magnetic coupling with the fourth wiring line 72 upon the third wiring line 71.
It is desired that the third wiring line 71 or the fourth wiring line 72 be U-shaped. The effect of magnetic coupling with the fourth wiring line 72 upon the third wiring line 71 can therefore be further reduced. Furthermore, a portion where capacitors are mounted can be made compact.
In the case where two or more capacitors are mounted on the U-shaped third wiring line 71, it is desired that the capacitors be mounted at respective positions where the capacitors are parallel or substantially parallel to each other. The capacitors C1 and C2 can therefore be mounted in the same direction and be easily mounted on the substrate 60.
The shape of the third wiring line 71 is a U-shape as described with reference to
In the circuit device 100A, a third wiring line 71B provided to mount the capacitors C1 and C2 does not have a U-shape but an L-shape bending once from the intermediate terminal 4c and reaching the ground electrode 71a. The L-shaped third wiring line 71B includes a portion not parallel to the fourth wiring line 72, and the effect of magnetic coupling with the fourth wiring line 72 upon the third wiring line 71B can therefore be reduced.
It is desired that the mounting direction of the capacitor C1 (a first capacitor) nearest to the coil component 1 of the capacitors mounted on the L-shaped third wiring line 71B and the mounting direction of the capacitor C3 (a second capacitor) nearest to the coil component 1 of the capacitors mounted on the fourth wiring line 72 be parallel or substantially parallel to each other. By making the third wiring line 71B L-shaped in the circuit device 100A, the effect of magnetic coupling with the fourth wiring line 72 upon the third wiring line 71B can be effectively reduced.
The fourth wiring line 72 connected to the second wiring line 70b is provided in the circuit device 100 as described with reference to
In the circuit device 100B, the wiring pattern of a fifth wiring line 73 is provided on the substrate 60 as a wiring line provided to mount capacitors C5 and C6. The fifth wiring line 73 electrically connects the first wiring line 70a and a ground electrode 73a with the capacitors C5 and C6 mounted thereon. As illustrated in
It is desired that the wiring pattern further include the fifth wiring line 73 on which an electrode provided to mount the capacitors C5 and C6 is provided, which connects the ground electrode 73a and the first wiring line 70a or the second wiring line 70b different from the wiring line connected to the fourth wiring line 72, and which includes a portion where the third wiring line 71 and the fifth wiring line 73 are not parallel to each other.
Since the circuit device 100B includes a portion where the third wiring line 71 and the fifth wiring line 73 are not parallel to each other, the effect of magnetic coupling with the fifth wiring line 73 upon the third wiring line 71 can be reduced and the change in the parasitic inductance of the capacitors C1 and C2 can be reduced or prevented.
It is desired that at least one or more capacitors be mounted at an electrode provided on the fifth wiring line 73. The fifth wiring line 73 on which a capacitor is mounted is magnetically coupled to the third wiring line 71. Accordingly, by causing the circuit device 100B to include a portion where the third wiring line 71 and the fifth wiring line 73 are not parallel to each other, the effect of magnetic coupling with the fifth wiring line 73 upon the third wiring line 71 can be effectively reduced.
It is desired that two or more capacitors be mounted on each of the third wiring line 71 and the fifth wiring line 73. A redundant circuit configuration can therefore be provided with which a short circuit does not occur even if one capacitor fails.
The multiple fourth wiring lines and the multiple fifth wiring lines may be provided in the circuit device 100B as illustrated in
The shape of the fourth wiring line 72 is a linear shape as described with reference to
In the circuit device 100C1 illustrated in
In the circuit device 100C1, the third wiring line 71 and the fourth wiring line 72A bend in the same direction. That is, the first current path (the path of the third wiring line 71) and the second current path (the path of the fourth wiring line 72A) have the same shape and each have at least one or more bending points. Current flow directions are opposite in the portion of the third wiring line 71 where the capacitor C1 is present and the portion of the fourth wiring line 72A where the capacitor C4 is present. That is, since the directions of currents flowing through wiring lines in close proximity are opposite in the circuit device 100C1, the parasitic inductance of the capacitors C1 and C2 can be further reduced.
In the circuit device 100C2 illustrated in
In the circuit device 100C2, the third wiring line 71 and the fourth wiring line 72A1 bend in the different directions. That is, the distance between the first current path (the path of the third wiring line 71) and the second current path (the path of the fourth wiring line 72A1) is not constant and both of them have a U-shape.
In the case where the fifth wiring line is provided in the circuit devices 100C1 and 100C2, the fifth wiring line may also have a U-shape. The circuit devices 100C1 and 100C2 can therefore further reduce the effect of magnetic coupling with the fifth wiring line upon the third wiring line 71.
The two capacitors C1 and C2 are mounted on the L-shaped third wiring line 71B and the two capacitors C3 and C4 are mounted on the linear fourth wiring line 72 in the circuit device 100A illustrated in
In the circuit device 100D1 illustrated in
In the circuit device 100D2 illustrated in
In the case where the fifth wiring line is provided in the circuit devices 100D1 and 100D2, the fifth wiring line may also have a L-shape. The circuit devices 100D1 and 100D2 can therefore further reduce the effect of magnetic coupling with the fifth wiring line upon the third wiring line 71.
The third wiring line 71 connected to the intermediate terminal 4c bends in the circuit device 100 according to the first example embodiment, and the circuit device 100 therefore includes a portion not parallel to the fourth wiring line 72. The third wiring line does not bend and the fourth wiring line bends in a circuit device according to the second example embodiment, and the circuit device therefore includes a portion where the fourth wiring line is not parallel to the third wiring line.
In the circuit device 200, the wiring pattern of the power supply line 70 is provided on the surface of the substrate 60 and the coil component 1 is mounted in series to the power supply line 70. The power supply line 70 includes the first wiring line 70a connected to the input terminal 4a of the coil component 1 and the second wiring line 70b connected to the output terminal 4b of the coil component 1.
In the circuit device 200, the two capacitors C1 and C2 are connected in series to the intermediate terminal 4c of the coil component 1. The wiring pattern of the third wiring line 71A is provided on the substrate 60 as a wiring line provided to mount the capacitors C1 and C2. The third wiring line 71A electrically connects the intermediate terminal 4c between the two coils included in the coil component 1 and the ground electrode 71a with the capacitors C1 and C2 mounted thereon. In the circuit device 200, the two capacitors C3 and C4 are connected in series to the second wiring line 70b near the coil component 1. The wiring pattern of the fourth wiring line 72A is provided on the substrate 60 as a wiring line provided to mount the capacitors C3 and C4. The fourth wiring line 72A electrically connects the second wiring line 70b and the ground electrode 72a with the capacitors C3 and C4 mounted thereon. The fourth wiring line 72A may be provided on the first wiring line 70a instead of the second wiring line 70b.
As illustrated in
The third wiring line 71A has a linear shape and the fourth wiring line 72A has a U-shape in the circuit device 200 according to the second example embodiment as described above, and the circuit device 200 therefore includes a portion where the third wiring line 71A and the fourth wiring line 72A are not parallel to each other.
Since the circuit device 200 according to the second example embodiment includes the portion where the third wiring line 71A and the fourth wiring line 72A are not parallel to each other, the effect of magnetic coupling with the fourth wiring line 72A upon the third wiring line 71A can be reduced and the change in the parasitic inductance of the capacitors C1 and C2 can be reduced or prevented.
It is desired that at least one or more capacitors be mounted at an electrode provided on the fourth wiring line 72A. It is also desired that two or more capacitors be mounted on each of the third wiring line 71A and the fourth wiring line 72A.
The shape of the fourth wiring line 72A is a U-shape as described with reference to
In the circuit device 200A, the fourth wiring line 72B provided to mount the capacitors C3 and C4 does not have a U-shape but an L-shape bending once from the second wiring line 70b and reaching the ground electrode 72a. The L-shaped fourth wiring line 72B includes a portion not parallel to the third wiring line 71A, and the effect of magnetic coupling with the fourth wiring line 72B upon the third wiring line 71A can therefore be reduced.
It is desired that the mounting direction of the capacitor C3 nearest to the coil component 1 of the capacitors mounted on the L-shaped fourth wiring line 72B and the mounting direction of the capacitor C1 nearest to the coil component 1 of the capacitors mounted on the third wiring line 71A be parallel or substantially parallel to each other. By making the fourth wiring line 72B L-shaped in the circuit device 200A, the effect of magnetic coupling with the fourth wiring line 72B upon the third wiring line 71A can be effectively reduced.
The fourth wiring line 72A connected to the second wiring line 70b is provided in the circuit device 200 as described with reference to
In the circuit device 200B, the wiring pattern of a fifth wiring line 73A is provided on the substrate 60 as a wiring line provided to mount capacitors C5 and C6. The fifth wiring line 73A electrically connects the first wiring line 70a and the ground electrode 73a with the capacitors C5 and C6 mounted thereon. As illustrated in
It is desired that the wiring pattern further include the fifth wiring line 73A on which an electrode provided to mount the capacitors C5 and C6 is provided, which connects the ground electrode 73a and the first wiring line 70a or the second wiring line 70b different from the wiring line connected to the fourth wiring line 72A, and which includes a portion where the third wiring line 71A and the fifth wiring line 73A are not parallel to each other.
The fourth wiring line 72A and the fifth wiring line 73A bend in the same direction in
Since the circuit device 200B has the portion where the third wiring line 71A and the fifth wiring line 73A are not parallel to each other, the effect of magnetic coupling with the fifth wiring line 73A upon the third wiring line 71A can be reduced and the change in the parasitic inductance of the capacitors C1 and C2 can be reduced or prevented.
It is desired that at least one or more capacitors be mounted at an electrode provided on the fifth wiring line 73A. The fifth wiring line 73A on which a capacitor is mounted is magnetically coupled to the third wiring line 71A. Accordingly, by causing the circuit device 200B to include a portion where the third wiring line 71A and the fifth wiring line 73A are not parallel to each other, the effect of magnetic coupling with the fifth wiring line 73A upon the third wiring line 71A can be effectively reduced.
It is desired that two or more capacitors be mounted on each of the third wiring line 71A and the fifth wiring line 73A. A redundant circuit configuration can therefore be provided with which a short circuit does not occur even if one capacitor fails.
The multiple fourth wiring lines and the multiple fifth wiring lines may be provided in the circuit device 200B as illustrated in
The shape of the fifth wiring line 73A is a U-shape as described with reference to
In the circuit devices 100, 100A to 100D1, 100D2, 200, and 200A to 200B, it is desired that at least one of the first current path (the path of the third wiring line 71) connected to the coil component 1 or the second current path (the path of the fifth wiring line 73 or the fourth wiring line 72) connected to the first wiring line 70a or the second wiring line 70b bend in the middle for reduction or prevention of the change in the parasitic inductance of a capacitor as described above. In particular, since a capacitor is mounted on the first current path (the path of the third wiring line 71) without fail, it is desired that the first current path (the path of the third wiring line 71) bend in the middle (the U-shaped third wiring line 71 and the L-shaped third wiring line 71B).
While example embodiments of the present invention have been described above, it is to be understood that variations and modifications will be apparent to those skilled in the art without departing from the scope and spirit of the present invention. The scope of the present invention, therefore, is to be determined solely by the following claims.
Number | Date | Country | Kind |
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2021-189637 | Nov 2021 | JP | national |
This application claims the benefit of priority to Japanese Patent Application No. 2021-189637 filed on Nov. 22, 2021 and is a Continuation Application of PCT Application No. PCT/JP2022/041328 filed on Nov. 7, 2022. The entire contents of each application are hereby incorporated herein by reference.
Number | Date | Country | |
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Parent | PCT/JP2022/041328 | Nov 2022 | WO |
Child | 18663139 | US |