This application claims priority under 35 U.S.C. §119(a) to a Korean Patent Application filed in the Korean Intellectual Property Office on May 19, 2009, and assigned Serial No. 10-2009-0043344, the entire disclosure of which is incorporated herein by reference.
1. Field of the Invention
The present invention generally relates to a circuit for a direct gate drive current reference source, and more particularly, to a design of a direct gate drive current reference source circuit providing a reference current to all blocks of a Radio Frequency (RF) transceiver Integrated Circuit (IC) for an RF communication terminal.
2. Description of the Related Art
Generally, a Zero Temperature Coefficient (ZTC) current reference generation source which outputs a current of constant magnitude without being influenced by temperature, a Proportional To Absolute Temperature (PTAT) current source which outputs a current proportional to absolute temperature, and a Counter To Absolute Temperature (CTAT) current source which outputs a current complementary temperature to absolute are used for a reference bias circuit (e.g., bandgap circuit). However, each type of application block requires different current characteristics with respect to temperature according to type. The foregoing current sources are selectively used according to current characteristics requested by respective application blocks.
A conventional ZTC current source using a bandgap reference voltage generation core generates a current of a ZTC through an operational amplifier (OP-AMP) based voltage-current conversion circuit using a voltage output from the bandgap reference voltage generation core. The conventional OP-AMP based voltage-current conversion circuit is shown in
Further, a conventional PTAT current source generates a current using temperature proportional characteristics of a current generated by applying a base-emitter voltage difference of two bipolar devices having different densities to a resistor. The conventional PTAT current source is shown in
Both the current source circuit of
A device manufactured by implementing a resistor in a silicon wafer using Sub-Micron Silicon Process technology can have a component deviation to a maximum 20%. The ZTC current source, the PTAT current source, and the CTAT current source providing a bias reference current to each block of an RF transceiver IC may also have an error of a significant size when a process of reducing a component deviation is not performed. Accordingly, in a field requiring precision device manufacture, an additional process for reducing the component deviation should be performed, thereby increasing the cost and time.
Accordingly, it is necessary to provide a current reference source capable of providing a reference current to all kinds of core function blocks without the need to use a resistor.
The present invention has been made in view of the above problems, and provides a current reference source such as a ZTC current source, a PTAT current source, or a CTAT current source, but without a resistor.
In accordance with an aspect of the present invention, a direct gate drive current reference source circuit includes a reference voltage generation core outputting a reference voltage of constant magnitude; and a transistor directly receiving the reference voltage from the reference voltage generation core, wherein a resistor is not provided between the transistor and a ground.
In accordance with another aspect of the present invention, a direct gate drive variable slope current reference source circuit includes a reference voltage generation core outputting a reference voltage of constant magnitude; at least two transistors receiving the reference voltage from the reference voltage generation core; and at least two switches respectively connected to the at least two transistors to be closed or open according to a control signal, wherein the at least two transistors have different sizes and are connected to each other in parallel.
In accordance with another aspect of the present invention, a direct gate drive zero temperature coefficient current reference source circuit includes a first reference voltage generation core that outputs a first reference voltage of constant magnitude; a second reference voltage generation core that outputs a second reference voltage of constant magnitude; a first transistor that receives the first reference voltage from the first reference voltage generation core; and a second transistor that receives the first reference voltage from the second reference voltage generation core, wherein the first transistor and the second transistor are connected to each other in parallel, the first reference voltage is equal to or greater than a preset voltage, and the second reference voltage is less than the preset voltage.
In accordance with another aspect of the present invention, a current reference source circuit includes a variable slope current source that outputs a current proportional or inversely proportional to temperature according to a select signal; and an offset current source that offsets the current output from the variable slope current source to be a constant nominal current, wherein the variable slope current source and the offset current source are connected to each other in series.
Since the current reference source does not use a resistor when generating a current, a component deviation which otherwise inevitably occurs during a silicon wafer manufacturing process may be improved. Further, since a separate process for reducing the component deviation is not necessary, unlike conventional systems, the cost and manufacturing time due to the generation of a current source may be reduced. In addition, since the present invention is designed without a resistor, a silicon layout area may be reduced.
The objects, features and advantages of the present invention will be more apparent from the following detailed description in conjunction with the accompanying drawings, in which:
Exemplary embodiments of the present invention are described with reference to the accompanying drawings in detail. The same reference numbers are used throughout the drawings to refer to the same or like parts. Detailed descriptions of well-known functions and structures incorporated herein may be omitted to avoid obscuring the subject matter of the present invention.
Accordingly, a current is generated between the resistor R0130 and a transistor 140, according to Equation (1).
In this case, because the resistor R0 used for the ZTC current source does not have a different cancellation factor allowing deviation compensation, the ZTC current source designed using the resistor R0 has an abnormal component deviation unless layout matching is performed.
As illustrated in Equation (2), the resistor R1210 is included in the PTAT current source. As in
Consequently, there is a demand for a method that may design a ZTC current source, a PTAT current source, and a CTAT current source without using a resistor.
The following is a description of a direct gate drive current reference source having both functions of a PTAT current source and a CTAT current source without using a resistor according to a first embodiment of the present invention.
The direct gate drive current reference source according to an embodiment of the present invention includes a reference voltage generation core 310 and a transistor 320. A reference voltage generated by the reference voltage generation core 310 is directly input to the transistor 320, which is referred to as a direct gate drive method in this embodiment. Further, a resistor is not provided between the transistor 320 and a ground. Hereinafter, it is assumed that the reference voltage generation core is a bandgap reference voltage generation core.
The bandgap reference voltage generation core 310 is a circuit outputting a constant voltage independent of variations in temperature, supply voltage, and manufacturing process change. In an embodiment of the present invention, the bandgap reference voltage generation core 310 supplies an output reference voltage as a drive voltage of the transistor 320.
The transistor 320 receives a voltage output from the band gap reference voltage generation core 310 as a drive voltage to generate a current. In an embodiment of the present invention, the transistor 320 is preferably a metal-oxide semiconductor field effect transistor (MOS-FET). A drain-to-source current is determined in the MOS-FET 320 when operating in a saturation region by Equation (3).
In Equation (3) for the drain-to-source current, factors influenced by temperature are a threshold voltage Vth and a mobility μ. The influences of the threshold voltage Vth and the mobility p due to temperature variables may be expressed by Equation (4).
wherein a coefficient value k of the threshold voltage has a typical value of 2.5 mV/K, and a temperature coefficient m of the mobility μ has a typical value of 1.5. Accordingly, when the temperature is increased by 100 degrees Celsius, the threshold voltage Vth is reduced by 0.25 and the mobility μ is reduced by approximately 35%.
In this case, when a current generated in the drain-to-source is observed after a voltage is applied to a gate-to-source of the MOS-FET, a resulting change is obtained according to the magnitude of gate-to-source voltage in temperature characteristics.
Namely, when the gate-to-source voltage is equal to or greater than 0.75V, a reduced amount of current due to a mobility reduction is larger than an increased amount of the current due to a reduction of a threshold voltage according to an increase in temperature. Accordingly, the total drain-source current has a tendency to be reduced according to the increase temperature. That is, the drain-source current has a negative temperature coefficient characteristic inversely proportional to the temperature increase.
Meanwhile, when the gate-to-source voltage is less than 0.75V, an increased amount of current due to a reduced threshold voltage is larger than a reduced amount of current due to a mobility reduction according to a temperature increase. Accordingly, the total drain-source current has a tendency to increase according to the temperature increase. That is, the drain-source current has a positive temperature coefficient characteristic proportional to the temperature increase.
In summary, the direct gate drive current reference source shown in
Accordingly, the direct gate drive current reference source of the present invention can be used as the PTAT current source or the CTAT current source by changing the magnitude of a voltage applied to the gate-to-source. Further, since the direct gate drive current reference source of the present invention does not use a resistor, it reduces component deviation of a current source without layout matching, thereby providing a highly stable reference current.
In
In the meantime, referring to
The following is a description of a direct gate drive current reference source having a variable slope without using a resistor according to a second embodiment.
Degradation due to temperature rise may be changed in all application block types of an RF transceiver IC of the present invention. For example, the degradation degree due to the same rise of temperature will differ in an amplifier, a mixer, an oscillator, and the like. Consequently, to equally compensate for such different degradations due to the same rise of temperature, it is necessary to provide current of different magnitudes. As a result, it is necessary to design a variable slope current source generating a current having different slopes with variations in temperature.
In order to implement the direct gate drive variable slope current source, two methods may be considered. A first method is to generate a drain-source current by changing gate-to-source voltage. In a second method, a plurality of MOS-FETS having different sizes are arranged in parallel, and only necessary FETS are turned-on to sum currents flowing through respective sources-drains, thereby obtaining a variable slop characteristic.
Referring to
In the direct gate drive variable slope current reference source shown in
Moreover, the plurality of transistors 510 to 550 may be respectively connected to switches 510A to 510A, and can be turned-on and turned-off according to a switch control signal.
If only the switch SW1510A is turned-on, a current I0 flowing through the transistor 560 is identical with a current I1 flowing through the first transistor 510. Further, if only the switch SW2510B is turned-on, the current I0 flowing through the transistor 560 is identical with a current I2 flowing through the second transistor 520. In this way, when a plurality of transistors having a different size are connected to each other in parallel, and respective transistors are turned-on or turned-off, a current reference source having a slope of a desired magnitude can be generated.
Meanwhile, it is possible to simultaneously turn-on switch SW1510A and switch SW25108. In this case, the current I0 flowing through the transistor 560 is identical with a sum (I1+I2) of the current I1 flowing through the transistor 510 and the current I2 flowing through the transistor 520. Upon using the foregoing method, a current reference source having various slopes may be generated.
In
It may be appreciated in
Here, a current generated by the direct gate drive variable slope current source may be expressed by Equation (5).
I
DSPTAT
=M×(TmI0+I0) (5)
where M is a Device Size Scale Factor (DSSF), which can be determined according to the size of a transistor 560 in a mirror circuit.
In the meantime,
It may be appreciated in
Namely, a direct gate drive variable slope current source in this case operates as a CTAT current source.
Here, a current generated by the direct gate drive variable slope current source may be expressed by Equation (6).
I
DSCTAT
=N×(T−kI0+I0) (6)
where N is the DSSP, which can be determined according to the size of a transistor in a mirror circuit.
The following is a description of a direct gate drive current reference source with a ZTC without using a resistor according to a third embodiment.
In the direct gate drive ZTC current source of the present invention, two MOS-FETS having different sizes are arranged in parallel, and voltages having different magnitudes are applied to gate-source of respective transistors.
In detail, in the direct gate drive ZTC current source 801, a first transistor 810 to which a first reference voltage 830 is applied and a second transistor 820 to which a second reference voltage 840 is applied are arranged in parallel, and current generated in each respective transistors are summed to generate a current having a ZTC characteristic. The current generated in the direct gate drive ZTC current source is a sum (I1+I2) of the current I1 flowing through the first transistor 810 and the current I2 flowing through the second transistor 820.
Meanwhile, one of the first reference voltage 830 and the second reference voltage 840 is set to be greater than or equal to 0.75V, and the other is set to be less than 0.75V. A transistor connected to a reference voltage equal to or greater than 0.75V generates a current inversely proportional to temperature, whereas a transistor connected to a reference voltage less than 0.75V generates a current proportional to temperature. Accordingly, the currents are summed to generate a current having a certain magnitude.
Referring to
Here, the characteristic of current generated by the direct gate drive ZTC current source can be expressed by Equation (7).
where, α can be determined to make a temperature coefficient of zero in a specific temperature (i.e., room temperature) in such a manner that a variation amount of a becomes zero in response to temperature by adjusting current scale factors M and N.
The following is a description of a direct gate drive current reference source having a ZTC and a constant nominal current according to a fourth embodiment. Here, the nominal current means a current generated in a device in a specific temperature.
In a characteristic of the direct gate drive variable slope current source expressed by Equation (5) or Equation (6) of the second embodiment, as the size of a transistor changes, a slope (M×Tm or N×T−k) varies, and simultaneously a scale (M×I0 or N×I0) is also achieved for the magnitude of the nominal current. Accordingly, the fourth embodiment provides a direct gate drive variable slope current source in which a nominal current is fixed in a specific temperature and only the slope of a current variation has a variable characteristic.
To do this, if the scaled nominal current (M×I0 or N×I0) expressed in Equation (5) or Equation (6) is offset by the magnitude of (M−1)×I0 or (N−1)×I0, a constant nominal current I0 may be maintained. A procedure of offsetting a current of specific magnitude may be performed by the direct gate drive ZTC current source according to the third embodiment.
Namely, a gain of a ZTC current source obtained by Equation 7 is re-scaled, so that an current is identical with (M−1)×I0 or (N−1)×I0 ([N′×α×I0=(M−1)×I0 or (N−1)×I0). Next, if the re-scaled gain of the ZTC current source is subtracted from Equation (5) or Equation (6), the current may be expressed by Equation (8).
Equation (8) indicates that a temperature slope is scaled (M×Tm or N×T−k), but a nominal current is constant (I0) in the direct gate drive variable slope current source.
Referring to
The direct gate drive variable slope current source shown in
Accordingly, among a current M×(TmI0+I0) generated by the PTAT current source 1010, since a current (M−1)×I0 is provided to the ZTC current source 1030, and remaining currents M×(TmI0+I0) flow through the load 1040, the direct gate drive variable slope current source shown in
The variable slope current source 1101 of
In
Although exemplary embodiments of the present invention have been described in detail hereinabove, it should be clearly understood that many variations and modifications of the basic inventive concepts herein taught which may appear to those skilled in the present art will still fall within the spirit and scope of the present invention, as defined in the appended claims.
Number | Date | Country | Kind |
---|---|---|---|
10-2009-0043344 | May 2009 | KR | national |