Accurate and stable reference voltages, in other words mostly independent of temperature, but also power supply voltages, are essential circuits for analog integrated circuits. In fact, the operational characteristics of active analog circuits are determined by the values of the reference voltages that they use. This is particularly the case for analog-digital or digital-analog conversion circuits whose resolution is directly linked to the stability of the reference voltage used in performing the conversion.
Today, various techniques exist for generating a stable reference voltage. As an example, reference could be made to the reference voltage generation circuits based on the principle of the bandgap energy, commonly denoted by those skilled in the art as bandgap reference circuits.
As can be seen in
The resistors R1 and R2 are identical. As previously indicated, and by reason of the presence of the operational amplifier A, the currents flowing in the branches B1 and B2 are identical. The voltage equality between the nodes N1 and N2 imposes that:
in which:
K denotes Boltzmann's constant
q is the charge on an electron
T is the operating temperature of the circuit in degrees K, and
IS1 and IS2 respectively denote the saturation currents of the diodes D1 and D2.
This equation implies that:
in which α is the ratio of the areas of the diodes D1 and D2.
The reference voltage delivered by this circuit is therefore given by the equation:
where Vd2 denotes the voltage across the terminals of the diode D2.
This equation (3) shows that the reference voltage may be considered as made up of the sum of two terms. One is proportional to temperature, whereas the diode voltage Vd2 is inversely proportional to it. By judiciously choosing the ratio R2/R3, a reference voltage that is virtually independent of temperature can be obtained.
However, as is known, in CMOS technology, diodes are fabricated using a base-emitter junction of a bipolar transistor. Such a transistor has a low gain. In addition, the collector is referenced to the circuit substrate. Thus, it will be understood that this type of circuit exhibits a certain number of major drawbacks, notably owing to the fact that, in the case where the substrate is affected by low- or high-frequency stray currents, these stray currents can propagate as far as the output of the circuit and affect the reference voltage level. In any case, the reference voltage is defined with respect to the substrate voltage, such that any voltage variation within the substrate results in a corresponding variation in the reference voltage.
This drawback can be redhibitory when it is desired to control a display screen of the LCD (Liquid Crystal Display) type in which the analog signals of the red, green and blue inputs are transformed into digital signals which are subsequently processed by algorithms designed for addressing the LCD matrices. The synchronization is effected using line synchronization pulses, either on a rising edge or on a falling edge. This pulse is relatively distorted, but the synchronization triggering must occur on very reproducible levels, whatever the temperature or the variations in power supply voltage. Moreover, the digital CMOS circuits used to control the LCD display screen tend to generate significant switching noise on the substrate. The synchronization is therefore effected by using hysteresis comparators with thresholds that are as independent as possible both of temperature and of the supply voltages.
In view of the above, there is a need to provide a reference voltage that is independent of temperature, but also of the voltage of the substrate on which the reference voltage generation circuit is built.
The subject of the invention is therefore a circuit for generating a reference voltage that is independent of temperature, which is built on a substrate according to a CMOS technology, and which comprises a first stage for generating a first current proportional to temperature and a second stage for generating a second current inversely proportional to temperature, and means for summing the first and second currents in a resistor connected to a voltage distinct from and electrically independent of the ground of the first and second stages, formed by the voltage of the substrate on which the circuit is built.
In one embodiment, the first stage comprises two parallel circuit branches in which the same current flows, a first circuit branch comprising a first diode and a second circuit branch comprising a second diode and a resistor connected in series.
For example, the first and second diodes are each formed by a base-emitter junction of a bipolar transistor.
According to another feature of the invention, the circuit also comprises a current mirror circuit that imposes the same current in each of the branches.
The branches respectively comprise a first and a second MOS transistor that are identical, one being connected between the current mirror and the first diode and the other between the current mirror and the resistor so as to impose an identical potential difference between, on the one hand, the first diode and, on the other, the second diode and the resistor, the first current proportional to temperature being formed by the current imposed in the resistor by the effect of the voltage variations proportional to temperature across the terminals of the second diode.
According to yet another feature of the invention, the diodes have different active areas.
Regarding the second stage, this comprises feedback means for controlling the voltage across the terminals of a third resistor with respect to a voltage across the terminals of a third diode relative to the substrate voltage, the second current inversely proportional to temperature being formed by the current flowing through the resistor.
For example, the first and the second currents are sampled by means of a current mirror circuit.
In one embodiment, this circuit additionally comprises a starter circuit.
In accordance with an embodiment of the invention, a circuit comprises a current mirror circuit including a first and second branches connected between a reference voltage and a substrate voltage and through which substantially identical currents flow, each first and second branch including a diode, the diodes having differing area coefficients, the current mirror circuit producing a first output current which is a copy of the current mirror branch current, a current source circuit including first and second branches connected between the reference voltage and the substrate voltage, the first branch including a diode and the second branch including a resistor, the current source circuit generating a current in the second branch that is dependent on a voltage across the diode and a value of the resistor, the current source circuit producing a second output current which is a copy of the second branch current, and a summing circuit to sum the first and second output currents.
In accordance with another embodiment, a circuit fabricated on a semiconductor substrate comprises a first circuit coupled between a supply voltage and a substrate voltage, the first circuit operable to produce a first output current proportional to temperature and independent of the supply voltage and substrate voltage, a second circuit coupled between the supply voltage and substrate voltage, the first circuit operable to produce a second output current inversely proportional to temperature and independent of the supply voltage and substrate voltage, and a summing circuit to sum the first and second output currents
A more complete understanding of the method and apparatus of the present invention may be acquired by reference to the following Detailed Description when taken in conjunction with the accompanying Drawings wherein:
In
First of all, with reference to
This first circuit is based on the use of two diodes, with different area coefficients and which then have a given area ratio a, through which identical currents flow. As an equivalent variant, two different currents could be made to flow through the diodes having the same area coefficient.
As can be seen in
These transistors Q1 and Q2 are respectively built into two branches B′1 and B′2 of the circuit which runs between a power supply voltage Vdd and the substrate. They are associated with a current mirror circuit formed by the association of two MOS transistors M2 and M3, whose source is supplied by the voltage Vdd, the gate of one of the transistors being connected to the gate of the other transistor. These transistors are identical and thus exhibit identical voltages Vgs.
In addition, the gates of the transistors M2 and M3 are connected to the drain of the transistor M3.
Thanks to this arrangement, and in particular to the equality of the voltages Vgs, the currents I flowing in the branches B′1 and B′2 are identical.
Furthermore, each branch B′1 and B′2 has third and fourth identical MOS transistors M4 and M5 whose gates are connected together. The drain of the third transistor M4 is connected to the drain of the transistor M2 of the current mirror and the source of this transistor M4 is connected to the emitter of the transistor Q1.
As regards the other branch B′2, the drain of the fourth transistor M5 is connected to the drain of the second transistor M3 of the current mirror circuit, whereas a resistor R4 is interposed between the source of the transistor M5 and the emitter of the transistor Q2.
Finally, it can be seen in
This circuit operates in the following manner.
The transistors M4 and M5 are identical such that the voltage Vgs4 between the gate and the source of the transistor M4 is equal to the voltage Vgs5 between the gate and the source of the transistor M5.
The following equation can therefore be written:
VBEQ1+VSub=VBEQ2+R4I+VSub (4)
in which VBEQ1 and VBEQ2 denote the base-emitter voltages of the transistors Q1 and Q2, respectively.
Therefore:
where ISQ1 and ISQ2 denote the saturation currents of the diodes formed by transistors Q1 and Q2, respectively.
The current I1 copied is therefore:
Thus, it can be seen that, thanks to this circuit, neither the voltage Vdd nor the substrate voltage appears in the equation (6) describing the current I1.
However, the circuit shown in
With reference to
This circuit also comprises two branches B″1 and B″2 which run between a voltage source Vdd and the substrate voltage Vsub.
The first branch B″1 comprises a current source 12, which supplies a third bipolar pnp transistor Q3 whose base and collector are connected to the substrate potential Vsub and whose emitter is supplied by the current source 12.
Regarding the second branch B″2, this comprises a p-type MOS transistor M7 whose source is supplied by the voltage Vdd and whose drain is set at the potential Vsub via a resistor R5. An operational amplifier Al, whose inverting and non-inverting terminals are respectively connected to the emitter of the transistor Q3 and to the drain of the MOS transistor M7 and whose output is connected to the gate of this transistor M7, imposes that the emitter voltage of the transistor Q3 and the drain voltage of the transistor M7 be equal.
Lastly, an MOS transistor M8, whose source is set at the potential Vdd, whose gate is connected to the gate of the transistor M7 and whose drain is connected to a separate voltage, preferably ground, different from the substrate onto which the generation circuit according to the invention is built, via a resistor R6, allows the current flowing in the second branch D′2 to be copied. This separate voltage or ground originates for example from the external decoupling of the circuit and is only used for the connection to ground of this portion of the circuit. It is not therefore subject to the interference linked to the presence of the stray currents. It can also be seen from
This circuit operates in the following manner.
As previously indicated, the emitter voltage VBEQ3 of the transistor Q3 is equal to the drain voltage of the transistor M7. This can therefore be written as:
VBEQ3+Vsub=R5I3+Vsub (7)
in which I3 denotes the current flowing in the second branch B″2.
Therefore:
This current I3 is inversely proportional to temperature and independent of the power supply voltage Vdd and of the substrate voltage Vsub.
Therefore, in order to obtain a reference voltage that is temperature stable and independent of the substrate voltage, it suffices to simply sum the currents I1, originating from the first stage, and the current I2, delivered by the second stage at a node N3. This is carried out at the drain of the transistor M8. Thus, a reference voltage Vref that is temperature stable and independent of the power supply voltage Vdd and of the substrate voltage Vsub is recovered at the output, across the terminals of the resistor R6. This voltage thus constitutes a floating reference voltage.
It will be noted that it is also possible to decouple the output with a capacitor of relatively high value in order to keep a suitable efficiency at high frequency where coupling occurs via stray capacitances.
It will finally be noted that the voltage obtained presents a high output impedance. If a low output impedance is desired, a follower amplifier will be added onto the output.
Although preferred embodiments of the method and apparatus of the present invention have been illustrated in the accompanying Drawings and described in the foregoing Detailed Description, it will be understood that the invention is not limited to the embodiments disclosed, but is capable of numerous rearrangements, modifications and substitutions without departing from the spirit of the invention as set forth and defined by the following claims.
Number | Date | Country | Kind |
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05 01233 | Feb 2005 | FR | national |