The present application is the national stage entry of International Patent Application No. PCT/EP2019/056149, filed on Mar. 12, 2019, which claims benefit of priority of European Patent Application No. 18165049.0 filed on Mar. 29, 2018, all of which are hereby incorporated by reference in their entirety for all purposes.
The present disclosure relates to an electronic circuit. Specifically, the present disclosure relates to an electronic circuit for a temperature compensated measurement of the resistance of a resistive element.
The measurement of the unknown resistance of a resistive element is a widely used operation in electronic systems. Flow meters and, in particular, gas sensor measurement systems to measure the concentration of a specific gas or specific gases are often based on the measurement of the resistance of a resistive element. Resistance measurement often employs the determination of a current flow through the pn-junction of a bipolar diode or the emitter-base path of a bipolar transistor. However, the current through the diode depends on temperature.
Conventional circuits for the measurement of a resistance therefore use a temperature sensor on board and compensate the measured value with the value from the temperature sensor. The compensation may be calculated numerically requiring a numerical processor. The conventional approach adds additional complexity to the system for the temperature sensor and the processor.
There is a need for a circuit for a temperature compensated measurement of the unknown resistance of a resistive element that is less complex, has high accuracy and allows a fast measurement.
According to an embodiment, a circuit for measuring a resistance comprises: a resistive element having a resistance to be measured; a sensor circuit to generate a differential voltage dependent on the resistance of the resistive element, the sensor circuit comprising: a first and a second path each including a diode element and an output terminal, one of the first and second paths including the resistive element; a reference circuit to generate a differential reference voltage, the reference circuit comprising: a first and a second path each including a current source and a diode element, the current sources configured to supply a substantially different current; a first and a second output terminal, the first output terminal configured to selectively supply a voltage from one of the first and second paths of the reference circuit and the second output terminal configured to selectively supply a voltage from the other one of the first and second paths of the reference circuit; a sigma-delta converter circuit comprising a first stage and a downstream connected second stage, the first stage comprising: a first and a second capacitor and an integration element, the first capacitor selectively coupled to one of the output terminals of the sensor circuit and the second capacitor coupled to one of the first and second output terminals of the reference circuit; and the second stage comprising an output terminal configured to provide a bitstream dependent on the resistance to be measured.
By way of explanation, it is well-known that the voltage VBE across the pn-junction of a bipolar diode that may be a transistor of which base and collector are short-circuited is (equation 1):
The voltage VBE depends from the emitter current IE and is logarithmic so that the dynamic range of the measurement is enlarged by the logarithmic compression. The term KT/q represents the temperature dependency.
If a known voltage is forced across an unknown resistance RX, the resulting current flows through the bipolar transistor of which the base emitter voltage VBE1 is (equation 2):
If the same principle is applied to a known reference resistance RREF, a second voltage can obtained as follows (equation 3):
The circuit according to an embodiment of this disclosure uses the voltage difference ΔVBE=ΔVBE1−ΔVBE2. Also according to an embodiment of this disclosure, the circuit uses the difference ΔVBE_REF generated by two currents of known ratio, N=I1/I2 or I1=N*I2, wherein the currents I1, I2 run through two identical transistors (equation 4):
The ratio between ΔVBE/ΔVBE_REF does not depend from temperature so that the unknown resistance RX can be obtained as follows (equation 5):
resulting in (equation 6):
RX=RREF·e−x·ln(N)
The circuit according to an embodiment of the present disclosure uses a sigma-delta converter such as a sigma-delta analog-to-digital modulator or converter that has a specific input structure to convert the ratio between two voltages such as ΔVBE and ΔVBE_REF to a digital word. In this case only one analog-to-digital (ADC) conversion is required which inherently performs the required division of differential base emitter voltages in the input stage of the sigma-delta converter. As an effect of the present circuit, the temperature dependence is removed from the signal processing as can be gathered from the above equations. The ADC conversion through the sigma-delta converter provides a digital output signal that is directly temperature-compensated. As a result, temperature sensors and the use of their output signals become obsolete. The calculation is fast as a numerical processing of a temperature signal is obsolete. The sigma-delta ADC delivers the value X (equation 5) from which the value RX of the unknown resistance can be calculated according to equation 6. The voltage differences ΔVBE and ΔVBE_REF as well as the value X are logarithmically compressed so that the dynamic range of the measurement is enlarged.
According to an embodiment, a circuit for measuring an unknown resistance of a resistive element includes a sensor circuit portion, a reference circuit portion and a sigma-delta converter circuit portion.
The sensor circuit portion generates a differential voltage that depends on the unknown resistance of the resistive element, in that the sensor circuit comprises a first and a second path each including a diode element such as the base emitter path of a bipolar transistor. The bipolar transistors should be identical or have at least a known area ratio. The differential voltage at the emitters of the transistors of both paths is the differential voltage ΔVBE that depends from the unknown resistance of the resistive element.
The reference circuit includes first and second paths that each include a current source, however, of substantially different current driving capability. The current sources may be MOS transistors that generate currents of a ratio of N=I1/I2 or I1=N*I2. This may be obtained by suitably dimensioning the widths of the gates of the transistors at a ratio such as 1:N. In practice, the current sources can be the output paths of a current mirror circuit that has a reference current source in the input path. The substantially different current sources of the reference circuit provide the currents to two base emitter paths of two identical reference transistors. Instead of identical transistors, it is possible to use transistors that have a known area ratio. As a result, a voltage ΔVBE_REF at the emitters of the bipolar transistors depends from the known ratio N of the currents.
The differential output voltages ΔVBE and ΔVBE_REF from the sensor circuit and the reference circuit, resp., are supplied to the input stage of a sigma-delta converter. Specifically, the ΔVBE and ΔVBE_REF voltages are applied to corresponding first and second capacitors at the input stage of the sigma-delta converter. The charging and discharging operations during the clockwise operation of the sigma-delta analog-to-digital (ADC) converter performs a division of ΔVBE/ΔVBE_REF, as explained in more detail herein below.
The charges on the first and second capacitors of the input stage of the sigma-delta ADC are supplied to an integration capacitor according to the well-known operational concept of a sigma-delta modulator. The second stage of the sigma-delta ADC comprises at least a comparator to generate a digital bitstream from the integration operation. One or more additional stages that each comprise an additional integrator can be included in the sigma-delta ADC. At the output of the sigma-delta ADC, a digital bitstream is generated that is representative of the term ΔVBE/ΔVBE_REF and therefore representative of the resistance RX of the unknown resistor. The sigma-delta ADC's structure according to an embodiment of the present disclosure allows a direct conversion of the ratio between ΔVBE and ΔVBE_REF which increases the efficiency of the measurement process and reduces the conversion time. An extra temperature sensor is not required. The direct conversion of the voltage ratios leads to an increase in the sample rate. Because only one conversion is performed, the current consumption of the circuit is low what is important for a measurement circuit such as a gas measurement circuit measuring the concentration of a gas. The accuracy is increased when compared to conventional circuits because no extra temperature measurement and its use in a numerical calculation is necessary.
In more detail, the sensor circuit includes two paths each including a p-channel MOS transistor and a feedback loop between the source and the gate of the transistor. The feedback loop includes an amplifier.
The reference circuit, in more detail, includes switches that cross-connect the two current paths so that the input stage of the sigma-delta ADC is driven according to the output of the sigma-delta converter with a polarity that makes the overall feedback stable. Whenever the bitstream changes polarity, the cross-connection between the first and second paths of the reference circuit is switched to the complementary state.
As an alternative to a switchable cross-connect directly included in the first and second paths of the reference circuit, the output signals at the emitters of the bipolar transistors of the first and second paths of the reference circuit can be routed through a cross-connect circuit.
At the input stage of the sigma-delta ADC, in more detail, the first capacitor connected to output terminals of the first and second paths of the sensor circuit comprises respective switches that are controlled by phase shifted control signals so that the switches are enabled alternately. Furthermore, the first and second capacitors of the input stage of the sigma-delta ADC are connected to the integration capacitor by a switch and to a common mode voltage through another switch. These switches are also controlled by the phase shifted control signals so that they are enabled alternately. The sigma-delta ADC includes an integration capacitor connected between the input and the output of an amplifier. The output node of the amplifier is forwarded to a downstream connected second stage of the sigma-delta ADC that includes a comparator to generate the output bitstream. At least one other integration element may also be included in the second stage.
The sigma-delta ADC is configured to operate in fully differential fashion. The sigma-delta ADC comprises another signal branch that includes an identical structure concerning the capacitors and the switches connected upstream the integration element, while the amplifier of the integration element performs the complementary operation for that signal branch.
It is to be understood that both the foregoing general description and the following detailed description are merely exemplary, and are intended to provide an overview or framework to understand the nature and character of the claims. The accompanying drawings are included to provide a further understanding and are incorporated in, and constitute a part of, this description. The drawings illustrate one or more embodiments, and together with the description serve to explain principles and operation of the various embodiments.
In the drawings:
The present disclosure will now be described more fully hereinafter with reference to the accompanying drawings showing embodiments of the disclosure. The disclosure may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that the disclosure will fully convey the scope of the disclosure to those skilled in the art. The drawings are not necessarily drawn to scale but are configured to clearly illustrate the disclosure. The same elements in different figures of the drawings are denoted by the same reference signs.
Turning now to
The right-hand sided second path of the ΔVBE sensor includes a resistor 220 of known, fixed resistance. All the other elements such as p-channel MOS transistor 221, amplifier 222 and bipolar transistor 223 correspond to the elements of the first path. Specifically, transistors 213 and 223 are identical transistors or have known area ratio. The ΔVBE output voltage is obtained at output terminals connected to the emitter terminals of the transistors 213, 223. The sensor circuit forces a known voltage across the unknown sensor resistor 210 and the reference resistor 220. The currents flowing through said resistors are routed through the bipolar transistors 213, 223. The emitter base voltages are output to the sigma-delta converter 130.
Turning now to
Turning now to
In
As shown in
Turning now to
As an example, the charge transferred by capacitor C2P can be calculated as follows:
In Phase P1 its charge is
Q1=C2P(VBE1−VCM).
In Phase P2 the charge is
Q2=C2P(VBE2−VCM),
considering that the integrator inputs always go back to VCM after a transient.
The difference in charge can only flow to the integrator capacitor CINTP:
ΔQ=C2P(VBE2−VBE1)
This incremental charge changes the voltage across the capacitor CINTP by:
ΔV=C2P(VBE2−VBE1)/CINTP
As a result, the whole cycle is equivalent to adding
K*(VBE2−VBE1) to the integrator output voltage OUTP,
wherein K is the capacitor ratio
K=C2P/CINTP.
The same considerations can be done for the negative branch of the differential circuit, and the corresponding output voltage of the integrator OUTN will be changed by
−K*(VBE2−VBE1).
The charge transfer is symmetric with respect to the common mode voltage VCM. The branch connected to VBE3 works in the same way, considering that VBE3 changes its value between phase P1 and P2. The negative branch supplied with VBE4 is symmetric with respect to VBE3 branch and transfers opposite charges to the integrator, as explained before.
Turning now to
It is to be noted that a sigma-delta ADC is a well understood circuit in digital signal processing, wherein the design of the input stage and its connection to the sensor circuit 110 and the reference circuit 120 is adapted to the principles of the present disclosure.
A dynamic element matching circuit can be included in the reference generation circuit 120 (not shown in
The present disclosure describes a circuit that directly converts a voltage difference dependent from an unknown resistance of a resistive element to a digital value that can be processed by a downstream connected digital computation circuit. The measurement operates over a wide range as a logarithmic compression is performed. By using a sigma-delta converter having a suitably configured input stage an immediate division between the voltage difference depending from the unknown resistance and a reference voltage difference is performed in a very efficient way. Using the division, the output value is inherently temperature-compensated. The conversion according to the herein disclosed circuits is time and energy efficient compared to conventional solutions while it achieves higher accuracy of the measurement.
It will be apparent to those skilled in the art that various modifications and variations can be made without departing from the spirit or scope of the disclosure as laid down in the appended claims. Since modifications, combinations, sub-combinations and variations of the disclosed embodiments incorporating the spirt and substance of the disclosure may occur to the persons skilled in the art, the disclosure should be construed to include everything within the scope of the appended claims.
Number | Date | Country | Kind |
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18165049 | Mar 2018 | EP | regional |
Filing Document | Filing Date | Country | Kind |
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PCT/EP2019/056149 | 3/12/2019 | WO |
Publishing Document | Publishing Date | Country | Kind |
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WO2019/185347 | 10/3/2019 | WO | A |
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Number | Date | Country | |
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20210011066 A1 | Jan 2021 | US |