Patent Application
20240413761
Not applicable.
The present invention relates in general to power switching applications. In particular, the present invention relates to reducing or eliminating current and voltage transients and the negative effects of current and voltage transients in power switching applications.
Reverse recovery charge is a challenge in all power switching applications, for example, motor control, solenoid control, or power management. Reverse recovery charge is stored at the junction of the body diode of a switch in a power switching application when the body diode is being forward biased. This charge increases as the forward bias current increases. Ideally, when a forward biased diode is suddenly put into reverse bias there will be no current flow in the reverse bias. However, with reverse recovery charged stored, when the forward biased diode is suddenly put into the reverse bias there will be a reverse current flow which will be a function of the charge that was stored when operating in the forward bias. The current and voltage transients caused by this reverse recovery charge cause a number of problems in power switching applications.
The following embodiments reduce or eliminate current or voltage transients in the switching circuit by actively monitoring the SW pin located between the switching transistor and the synchronous rectifier. The circuits use closed loop feedback to control level transistion(s) for the synchronous rectifier gate. The active feedback may include a voltage, a rate of change of voltage, a current, a rate of change of current or a combination thereof, all at the SW pin. The circuit does not require, but may use, signals from or monitoring of the switching transistor. Moreover, the circuit does not require, but may include, a time delay circuit. As a result, the circuits and methods described herein reduce current losses from break before make, gate to drain capacitance, reverse recovery charge (Qrr) and gate bounce. The methods and circuits also help prevent ringing.
In one embodiment of the present disclosure, a method for controlling a synchronous rectifier is provided. The synchronous rectifier is turned OFF by driving a gate of the synchronous rectifier to one or more first voltages that are non-zero. One or more values of a drain or a source of the synchronous rectifier are monitored. The gate of the synchronous rectifier is driven to a second voltage that is less than the one or more first voltages whenever the one or more values of the drain or the source of the synchronous rectifier pass above or below one or more threshold values.
In one aspect, a switching circuit includes the synchronous rectifier connected to a switching transistor, and the method further includes reducing or eliminating current or voltage transients in the switching circuit. In another aspect, the method further includes selecting the one or more first voltages or the second voltage. In another aspect, the one or more first voltages are less than a threshold voltage of the synchronous rectifier. In another aspect, the one or more first voltages include a set of descending stair-step values, or a set of descending values forming a ramp or a curve. In another aspect, the one or more values can be a voltage, a change in the voltage, a current, a change in the current, or a combination of the voltage, the change in the voltage, the current or the change in the current of the drain or the source of the synchronous rectifier. In another aspect, the method further includes adjusting the one or more threshold values or a delay in driving the gate of the synchronous rectifier to the second voltage using a predictive feedback process. In another aspect, the predictive feedback process samples and stores the one or more values of the gate, the drain or the source of the synchronous rectifier, and uses the stored values of the gate, the drain or the source of the synchronous rectifier to adjust the one or more threshold values. In another aspect, the predictive feedback process samples and stores the one or more values of the gate, the drain or the source of the synchronous rectifier and a switching transistor connected to the synchronous rectifier, and uses the stored values of the gate, the drain or the source of the synchronous rectifier and the switching transistor to adjust the one or more threshold values. In another aspect, the predictive feedback process samples and stores the one or more values of the gate, the drain or the source of the synchronous rectifier, and uses the stored values of the gate, the drain or the source of the synchronous rectifier to adjust the delay in driving the gate of the synchronous rectifier to the second voltage. In another aspect, the predictive feedback process samples and stores the one or more values of the gate, the drain or the source of the synchronous rectifier and a switching transistor connected to the synchronous rectifier, and uses the stored values of the gate, the drain or the source of the synchronous rectifier and the switching transistor to adjust the delay in driving the gate of the synchronous rectifier to the second voltage. In another aspect, the second voltage is equal to zero volts. In another aspect, the second voltage is less than zero volts. In another aspect, a gate of a switching transistor connected to the synchronous rectifier is not monitored or used to control the gate of the synchronous rectifier.
In another aspect, the synchronous rectifier is controlled using a synchronous rectifier driver circuit including: a driver circuit connected to the gate of the synchronous rectifier; a parallel clamping circuit connected to the gate of the synchronous rectifier; a monitoring circuit connected to the drain or the source of the synchronous rectifier and the parallel clamping circuit; and a control circuit connected to the driver circuit and the monitoring circuit. In another aspect, the synchronous rectifier driver circuit includes or does not include a time delay circuit. In another aspect, the driver circuit includes: a first transistor having a gate connected to the control circuit and a drain connected to the gate of the synchronous rectifier; a second transistor having a drain connected to the gate of the synchronous rectifier and a gate connected to the control circuit; a one-way current switch connected to a source of the second transistor. In another aspect, the parallel clamping circuit includes a third transistor having a drain connected to the gate of the synchronous rectifier, a gate connected to the monitoring circuit and a source connected to a reference ground. In another aspect, the monitoring circuit includes: a fourth transistor having a drain connected to the drain or the source of the synchronous rectifier, a gate connected to the control circuit, and a source connected to the parallel clamping circuit; and a fifth transistor having a drain connected to the parallel clamping circuit and a gate connected to the control circuit. In another aspect, the control circuit is further connected to a modulation signal. In another aspect, the driver circuit, the parallel clamping circuit, the monitoring circuit and the control circuit are formed in or on silicon, silicon carbide, gallium nitride, gallium oxide, or gallium arsenide.
In another aspect, the synchronous rectifier is controlled using a synchronous rectifier driver circuit including: a first transistor having a drain connected to the gate of the synchronous rectifier; a second transistor having a drain connected to the gate of the synchronous rectifier; a one-way current switch connected between a source of the second transistor and a reference ground; a third transistor having a drain connected to the gate of the synchronous rectifier and a source connected to the reference ground; a fourth transistor having a drain connected to the drain or the source of the synchronous rectifier and a source connected to a gate of the third transistor; a fifth transistor having a drain connected to the gate of the third transistor and a source connected to the reference ground; and a control circuit connected to a gate of the first transistor, a gate of the second transistor, a gate of the fourth transistor and a gate of the fifth transistor. In another aspect, the synchronous rectifier driver circuit drives the gate of the synchronous rectifier to the one or more first voltages by: turning the first transistor from ON to OFF; turning the second transistor from OFF to ON; turning the fourth transistor from OFF to ON; and turning the fifth transistor from ON to OFF. In another aspect, the synchronous rectifier driver circuit drives the gate of the synchronous rectifier to the second voltage by turning the third transistor from OFF to ON. In another aspect, the synchronous rectifier driver circuit includes or does not include a time delay circuit. In another aspect, the control circuit is further connected to a modulation signal. In another aspect, the first transistor, the second transistor, the one-way current switch, the third transistor, the fourth transistor, the fifth transistor and the control circuit are formed in or on silicon, silicon carbide, gallium nitride, gallium oxide, or gallium arsenide.
In another aspect, the synchronous rectifier is controlled using a synchronous rectifier driver circuit including: a first transistor having a drain connected to the gate of the synchronous rectifier; a second transistor having a drain connected to the gate of the synchronous rectifier and a body connected to a reference ground; a third transistor having a drain connected to a source of the second transistor, and a body and a drain connected to the reference ground; a fourth transistor having a drain connected to the gate of the synchronous rectifier, a gate connected to a source of the second transistor and a source connected to the reference ground; a fifth transistor having a drain connected to the gate of the synchronous rectifier and a source connected to the reference ground; a sixth transistor having a body diode, a drain connected to the drain or the source of the synchronous rectifier and a source connected to the gate of the fifth transistor; a seventh transistor having a drain connected to the gate of the fifth transistor and a source connected to the reference ground; an inverter having an output connected to the gates of the first transistor, the second transistor and the sixth transistor; and a control signal connected to an input of the inverter and the gates of the third transistor and seventh transistor.
In another aspect, the synchronous rectifier is controlled using a synchronous rectifier driver circuit including: a first transistor having a drain connected to the gate of the synchronous rectifier; a second transistor having a drain connected to the gate of the synchronous rectifier; a one-way current switch connecting a source of the second transistor to a reference ground; a third transistor having a drain connected to the gate of the synchronous rectifier and a source connected to the reference ground; a fourth transistor having a body diode and a drain connected to the drain or the source of the synchronous rectifier; an amplifier having a positive terminal connected to the source of the fourth transistor, a negative terminal connected to a voltage, and an output connected to the gate of the third transistor; a fifth transistor having a drain connected to the gate of the third transistor and a source connected to the reference ground; an inverter having an output connected to the gates of the first transistor, the second transistor, an enable terminal of the amplifier and the fourth transistor; and a control signal connected to an input of the inverter and the gate of the fifth transistor.
In another aspect, the synchronous rectifier is controlled using a synchronous rectifier driver circuit including: a first transistor having a drain connected to the gate of the synchronous rectifier; a second transistor having a drain connected to the gate of the synchronous rectifier; a first one-way current switch connected to a source of the second transistor; a fourth transistor having a drain connected to the gate of the synchronous rectifier, a gate connected to the first one-way current switch and a source connected to a reference ground; a second one-way current switch connected between a voltage and the gate of the fourth transistor; a fifth transistor having a drain connected to the gate of the fourth transistor and a source connected to the reference ground; a sixth transistor having a drain connected to the gate of the synchronous rectifier and a source connected to the reference ground; a seventh transistor having a body diode and a drain connected to the drain or the source of the synchronous rectifier; an inverter having an output connected to the gates of the first transistor, the second transistor and the seventh transistor; and a control signal connected to an input of the inverter and the gate of the fifth transistor, the gate of the sixth transistor and the source of the seventh transistor.
In another aspect, the synchronous rectifier is controlled using a synchronous rectifier driver circuit including: a first transistor having a drain connected to the gate of the synchronous rectifier; a second transistor having a drain connected to the gate of the synchronous rectifier; a one-way current switch connecting a source of the second transistor to a reference ground; a third transistor having a drain connected to the gate of the synchronous rectifier and a source connected to the reference ground; a fourth transistor having a body diode and a drain connected to the drain or the source of the synchronous rectifier; a fifth transistor having a drain connected to the gate of the third transistor and a source connected to the reference ground; a sixth transistor having a drain connected to the source of the first transistor, a gate connected to the source of the fourth transistor and a source connected to a gate of the third transistor; an inverter having an output connected to the gates of the first transistor, the second transistor, and the fourth transistor; and a control signal connected to an input of the inverter and the gate of the fifth transistor.
In another aspect, the synchronous rectifier is controlled using a synchronous rectifier driver circuit including: a first transistor having a drain connected to the gate of the synchronous rectifier; a second transistor having a drain connected to the gate of the synchronous rectifier; a one-way current switch connecting a source of the second transistor to a reference ground; a third transistor having a body diode, a drain connected to the gate of the synchronous rectifier and a source connected to the reference ground; a fourth transistor having a drain connected to the drain or the source of the synchronous rectifier and a source connected to the gate of the third transistor; a fifth transistor having a drain connected to the gate of the third transistor and a source connected to the reference ground; an inverter having an output connected to the gates of the first transistor, the second transistor, an enable terminal of the amplifier and the fourth transistor; and a control signal connected to an input of the inverter and the gate of the fifth transistor.
In one embodiment of the present disclosure, a circuit includes a synchronous rectifier driver circuit. The synchronous rectifier driver circuit is configured to: turn a synchronous rectifier OFF by driving a gate of the synchronous rectifier to one or more first voltages that are non-zero, monitor one or more values of a drain or a source of the synchronous rectifier, and drive the gate of the synchronous rectifier to a second voltage that is less than the one or more first voltages whenever the one or more values of the drain or the source of the synchronous rectifier pass above or below one or more threshold values.
In one aspect, the synchronous rectifier driver circuit reduces or eliminates current or voltage transients in a switching circuit including the synchronous rectifier connected to a switching transistor. In another aspect, the one or more first voltages are less than a threshold voltage of the synchronous rectifier. In another aspect, the one or more first voltages include a set of descending stair-step values, or a set of descending values forming a ramp or a curve. In another aspect, the one or more values can be a voltage, a change in the voltage, a current, a change in the current, or a combination of the voltage, the change in the voltage, the current or the change in the current of the drain or the source of the synchronous rectifier. In another aspect, the one or more threshold values or a delay in driving the gate of the synchronous rectifier to the second voltage are adjusted using a predictive feedback process. In another aspect, the predictive feedback process is configured to sample and store the one or more values of the gate, the drain or the source of the synchronous rectifier, and use the stored values of the gate, the drain or the source of the synchronous rectifier to adjust the one or more threshold values. In another aspect, the predictive feedback process is configured to sample and store the one or more values of the gate, the drain or the source of the synchronous rectifier and a switching transistor connected to the synchronous rectifier, and use the stored values of the gate, the drain or the source of the synchronous rectifier and the switching transistor to adjust the one or more threshold values. In another aspect, the predictive feedback process is configured to sample and store the one or more values of the gate, the drain or the source of the synchronous rectifier, and use the stored values of the gate, the drain or the source of the synchronous rectifier to adjust the delay in driving the gate of the synchronous rectifier to the second voltage. In another aspect, the predictive feedback process is configured to sample and store the one or more values of the gate, the drain or the source of the synchronous rectifier and a switching transistor connected to the synchronous rectifier, and use the stored values of the gate, the drain or the source of the synchronous rectifier and the switching transistor to adjust the delay in driving the gate of the synchronous rectifier to the second voltage. In another aspect, the second voltage is equal to zero volts. In another aspect, the second voltage is less than zero volts. In another aspect, a gate of a switching transistor connected to the synchronous rectifier is not monitored or used to control the gate of the synchronous rectifier.
In another aspect, the synchronous rectifier driver circuit includes: a driver circuit connected to the gate of the synchronous rectifier; a parallel clamping circuit connected to the gate of the synchronous rectifier; a monitoring circuit connected to the drain or the source of the synchronous rectifier and the parallel clamping circuit; and a control circuit connected to the driver circuit and the monitoring circuit. In another aspect, the synchronous rectifier driver circuit includes or does not include a time delay circuit. In another aspect, the driver circuit includes: a first transistor having a gate connected to the control circuit and a drain connected to the gate of the synchronous rectifier; a second transistor having a drain connected to the gate of the synchronous rectifier and a gate connected to the control circuit; a one-way current switch connected to a source of the second transistor. In another aspect, the parallel clamping circuit includes a third transistor having a drain connected to the gate of the synchronous rectifier, a gate connected to the monitoring circuit and a source connected to a reference ground. In another aspect, the monitoring circuit includes: a fourth transistor having a drain connected to the drain or the source of the synchronous rectifier, a gate connected to the control circuit, and a source connected to the parallel clamping circuit; and a fifth transistor having a drain connected to the parallel clamping circuit and a gate connected to the control circuit. In another aspect, the control circuit is further connected to a modulation signal. In another aspect, the driver circuit, the parallel clamping circuit, the monitoring circuit and the control circuit are formed in or on silicon, silicon carbide, gallium nitride, gallium oxide, or gallium arsenide.
In another aspect, the synchronous rectifier driver circuit includes: a first transistor having a drain connected to the gate of the synchronous rectifier; a second transistor having a drain connected to the gate of the synchronous rectifier; a one-way current switch connected between a source of the second transistor and a reference ground; a third transistor having a drain connected to the gate of the synchronous rectifier and a source connected to the reference ground; a fourth transistor having a drain connected to the drain or the source of the synchronous rectifier and a source connected to a gate of the third transistor; a fifth transistor having a drain connected to the gate of the third transistor and a source connected to the reference ground; and a control circuit connected to a gate of the first transistor, a gate of the second transistor, a gate of the fourth transistor and a gate of the fifth transistor. In another aspect, the synchronous rectifier driver circuit drives the gate of the synchronous rectifier to the one or more first voltages by: turning the first transistor from ON to OFF; turning the second transistor from OFF to ON; turning the fourth transistor from OFF to ON; and turning the fifth transistor from ON to OFF. In another aspect, the synchronous rectifier driver circuit drives the gate of the synchronous rectifier to the second voltage by turning the third transistor from OFF to ON. In another aspect, the synchronous rectifier driver circuit includes or does not include a time delay circuit. In another aspect, the control circuit is further connected to a modulation signal. In another aspect, the first transistor, the second transistor, the one-way current switch, the third transistor, the fourth transistor, the fifth transistor and the control circuit are formed in or on silicon, silicon carbide, gallium nitride, gallium oxide, or gallium arsenide.
In another aspect, the synchronous rectifier driver circuit includes: a first transistor having a drain connected to the gate of the synchronous rectifier; a second transistor having a drain connected to the gate of the synchronous rectifier and a body connected to a reference ground; a third transistor having a drain connected to a source of the second transistor, and a body and a drain connected to the reference ground; a fourth transistor having a drain connected to the gate of the synchronous rectifier, a gate connected to a source of the second transistor and a source connected to the reference ground; a fifth transistor having a drain connected to the gate of the synchronous rectifier and a source connected to the reference ground; a sixth transistor having a body diode, a drain connected to the drain or the source of the synchronous rectifier and a source connected to the gate of the fifth transistor; a seventh transistor having a drain connected to the gate of the fifth transistor and a source connected to the reference ground; an inverter having an output connected to the gates of the first transistor, the second transistor and the sixth transistor; and a control signal connected to an input of the inverter and the gates of the third transistor and seventh transistor.
In another aspect, the synchronous rectifier driver circuit includes: a first transistor having a drain connected to the gate of the synchronous rectifier; a second transistor having a drain connected to the gate of the synchronous rectifier; a one-way current switch connecting a source of the second transistor to a reference ground; a third transistor having a drain connected to the gate of the synchronous rectifier and a source connected to the reference ground; a fourth transistor having a drain connected to the drain or the source of the synchronous rectifier; a second one-way current switch connected from a source to the drain of the fourth transistor; an amplifier having a positive terminal connected to the source of the fourth transistor, a negative terminal connected to a voltage, and an output connected to the gate of the third transistor; a fifth transistor having a drain connected to the gate of the third transistor and a source connected to the reference ground; an inverter having an output connected to the gates of the first transistor, the second transistor, an enable terminal of the amplifier and the fourth transistor; and a control signal connected to an input of the inverter and the gate of the fifth transistor.
In another aspect, the synchronous rectifier driver circuit includes: a first transistor having a drain connected to the gate of the synchronous rectifier; a second transistor having a body diode and a drain connected to the gate of the synchronous rectifier; a fourth transistor having a body diode, a drain connected to the gate of the synchronous rectifier, a gate connected to the first one-way current switch and a source connected to a reference ground; a fifth transistor having a drain connected to the gate of the fourth transistor and a source connected to the reference ground; a sixth transistor having a drain connected to the gate of the synchronous rectifier and a source connected to the reference ground; a seventh transistor having a drain connected to the drain or the source of the synchronous rectifier; a third one-way current switch connected from a source to the drain of the seventh transistor; an inverter having an output connected to the gates of the first transistor, the second transistor and the seventh transistor; and a control signal connected to an input of the inverter and the gate of the fifth transistor, the gate of the sixth transistor and the source of the seventh transistor.
In another aspect, the synchronous rectifier driver circuit includes: a first transistor having a drain connected to the gate of the synchronous rectifier; a second transistor having a drain connected to the gate of the synchronous rectifier; a first one-way current switch connecting a source of the second transistor to a reference ground; a third transistor having a drain connected to the gate of the synchronous rectifier and a source connected to the reference ground; a fourth transistor having a body diode and a drain connected to the drain or the source of the synchronous rectifier; a fifth transistor having a drain connected to the gate of the third transistor and a source connected to the reference ground; a sixth transistor having a drain connected to the source of the first transistor, a gate connected to the source of the fourth transistor and a source connected to a gate of the third transistor; an inverter having an output connected to the gates of the first transistor, the second transistor, and the fourth transistor; and a control signal connected to an input of the inverter and the gate of the fifth transistor.
In another aspect, the synchronous rectifier is controlled using a synchronous rectifier driver circuit including: a first transistor having a drain connected to the gate of the synchronous rectifier; a second transistor having a drain connected to the gate of the synchronous rectifier; a one-way current switch connecting a source of the second transistor to a reference ground; a third transistor having a body diode, a drain connected to the gate of the synchronous rectifier and a source connected to the reference ground; a fourth transistor having a drain connected to the drain or the source of the synchronous rectifier and a source connected to the gate of the third transistor; a fifth transistor having a drain connected to the gate of the third transistor and a source connected to the reference ground; an inverter having an output connected to the gates of the first transistor, the second transistor, an enable terminal of the amplifier and the fourth transistor; and a control signal connected to an input of the inverter and the gate of the fifth transistor.
In one embodiment of the present disclosure, a power converter includes a switching transistor, a switching transistor driver circuit connected to a gate of the switching transistor, a synchronous rectifier connected the switching transistor, and a synchronous rectifier driver circuit connected to a gate of the synchronous rectifier and a drain or a source of the synchronous rectifier. The synchronous rectifier driver circuit is configured to: turn a synchronous rectifier OFF by driving a gate of the synchronous rectifier to one or more first voltages that are non-zero; monitor one or more values of a drain or a source of the synchronous rectifier; and drive the gate of the synchronous rectifier to a second voltage that is less than the one or more first voltages whenever the one or more values of the drain or the source of the synchronous rectifier pass above or below one or more threshold values.
In one aspect the synchronous rectifier driver circuit reduces or eliminates current or voltage transients in a switching circuit including the synchronous rectifier connected to a switching transistor. In another aspect, the one or more first voltages are less than a threshold voltage of the synchronous rectifier. In another aspect, one or more first voltages comprise a set of descending stair-step values, or a set of descending values forming a ramp or a curve. In another aspect, the one or more values can be a voltage, a change in the voltage, a current, a change in the current, or a combination of the voltage, the change in the voltage, the current or the change in the current of the drain or the source of the synchronous rectifier. In another aspect, the one or more threshold values or a delay in driving the gate of the synchronous rectifier to the second voltage are adjusted using a predictive feedback process. In another aspect, the predictive feedback process is configured to sample and store the one or more values of the gate, the drain or the source of the synchronous rectifier, and use the stored values of the gate, the drain or the source of the synchronous rectifier to adjust the one or more threshold values. In another aspect, the predictive feedback process is configured to sample and store the one or more values of the gate, the drain or the source of the synchronous rectifier and a switching transistor connected to the synchronous rectifier, and use the stored values of the gate, the drain or the source of the synchronous rectifier and the switching transistor to adjust the one or more threshold values. In another aspect, the predictive feedback process is configured to sample and store the one or more values of the gate, the drain or the source of the synchronous rectifier, and use the stored values of the gate, the drain or the source of the synchronous rectifier to adjust the delay in driving the gate of the synchronous rectifier to the second voltage. In another aspect, the predictive feedback process is configured to sample and store the one or more values of the gate, the drain or the source of the synchronous rectifier and a switching transistor connected to the synchronous rectifier, and use the stored values of the gate, the drain or the source of the synchronous rectifier and the switching transistor to adjust the delay in driving the gate of the synchronous rectifier to the second voltage. In another aspect, the second voltage is equal to zero volts. In another aspect, the second voltage is less than zero volts. In another aspect, a gate of a switching transistor connected to the synchronous rectifier is not monitored or used to control the gate of the synchronous rectifier.
In another aspect, the synchronous rectifier driver circuit includes: a driver circuit connected to the gate of the synchronous rectifier; a parallel clamping circuit connected to the gate of the synchronous rectifier; a monitoring circuit connected to the drain or the source of the synchronous rectifier and the parallel clamping circuit; and a control circuit connected to the driver circuit and the monitoring circuit. In another aspect, the synchronous rectifier driver circuit includes or does not include a time delay circuit. In another aspect, the driver circuit includes: a first transistor having a gate connected to the control circuit and a drain connected to the gate of the synchronous rectifier; a second transistor having a drain connected to the gate of the synchronous rectifier and a gate connected to the control circuit; a one-way current switch connected to a source of the second transistor. In another aspect, the parallel clamping circuit includes a third transistor having a drain connected to the gate of the synchronous rectifier, a gate connected to the monitoring circuit and a source connected to a reference ground. In another aspect, the monitoring circuit includes: a fourth transistor having a drain connected to the drain or the source of the synchronous rectifier, a gate connected to the control circuit, and a source connected to the parallel clamping circuit; and a fifth transistor having a drain connected to the parallel clamping circuit and a gate connected to the control circuit. In another aspect, the control circuit is further connected to a modulation signal. In another aspect, the driver circuit, the parallel clamping circuit, the monitoring circuit and the control circuit are formed in or on silicon, silicon carbide, gallium nitride, gallium oxide, or gallium arsenide.
In another aspect, the synchronous rectifier driver circuit includes: a first transistor having a drain connected to the gate of the synchronous rectifier; a second transistor having a body diode and a drain connected to the gate of the synchronous rectifier; a third transistor having a drain connected to the gate of the synchronous rectifier and a source connected to the reference ground; a fourth transistor having a drain connected to the drain or the source of the synchronous rectifier and a source connected to a gate of the third transistor; a fifth transistor having a drain connected to the gate of the third transistor and a source connected to the reference ground; and a control circuit connected to a gate of the first transistor, a gate of the second transistor, a gate of the fourth transistor and a gate of the fifth transistor. In another aspect, the synchronous rectifier driver circuit drives the gate of the synchronous rectifier to the one or more first voltages by: turning the first transistor from ON to OFF; turning the second transistor from OFF to ON; turning the fourth transistor from OFF to ON; and turning the fifth transistor from ON to OFF. In another aspect, the synchronous rectifier driver circuit drives the gate of the synchronous rectifier to the second voltage by turning the third transistor from OFF to ON. In another aspect, the synchronous rectifier driver circuit includes or does not include a time delay circuit. In another aspect, the control circuit is further connected to a modulation signal. In another aspect, the first transistor, the second transistor, the one-way current switch, the third transistor, the fourth transistor, the fifth transistor and the control circuit are formed in or on silicon, silicon carbide, gallium nitride, gallium oxide, or gallium arsenide.
In another aspect, the synchronous rectifier driver circuit includes: a first transistor having a drain connected to the gate of the synchronous rectifier; a second transistor having a drain connected to the gate of the synchronous rectifier and a body connected to a reference ground; a third transistor having a drain connected to a source of the second transistor, and a body and a drain connected to the reference ground; a fourth transistor having a drain connected to the gate of the synchronous rectifier, a gate connected to a source of the second transistor and a source connected to the reference ground; a fifth transistor having a drain connected to the gate of the synchronous rectifier and a source connected to the reference ground; a sixth transistor having a body diode, a drain connected to the drain or the source of the synchronous rectifier and a source connected to the gate of the fifth transistor; a seventh transistor having a drain connected to the gate of the fifth transistor and a source connected to the reference ground; an inverter having an output connected to the gates of the first transistor, the second transistor and the sixth transistor; and a control signal connected to an input of the inverter and the gates of the third transistor and seventh transistor.
In another aspect, the synchronous rectifier driver circuit includes: a first transistor having a drain connected to the gate of the synchronous rectifier; a second transistor having a body diode and a drain connected to the gate of the synchronous rectifier; a third transistor having a drain connected to the gate of the synchronous rectifier and a source connected to the reference ground; a fourth transistor having a body diode and a drain connected to the drain or the source of the synchronous rectifier; an amplifier having a positive terminal connected to the source of the fourth transistor, a negative terminal connected to a voltage, and an output connected to the gate of the third transistor; a fifth transistor having a drain connected to the gate of the third transistor and a source connected to the reference ground; an inverter having an output connected to the gates of the first transistor, the second transistor, an enable terminal of the amplifier and the fourth transistor; and a control signal connected to an input of the inverter and the gate of the fifth transistor.
In another aspect, the synchronous rectifier driver circuit includes: a first transistor having a drain connected to the gate of the synchronous rectifier; a second transistor having a body diode and a drain connected to the gate of the synchronous rectifier; a fourth transistor having a body diode, a drain connected to the gate of the synchronous rectifier, a gate connected to the first one-way current switch and a source connected to a reference ground; a fifth transistor having a drain connected to the gate of the fourth transistor and a source connected to the reference ground; a sixth transistor having a drain connected to the gate of the synchronous rectifier and a source connected to the reference ground; a seventh transistor having a body diode and a drain connected to the drain or the source of the synchronous rectifier; an inverter having an output connected to the gates of the first transistor, the second transistor and the seventh transistor; and a control signal connected to an input of the inverter and the gate of the fifth transistor, the gate of the sixth transistor and the source of the seventh transistor.
In another aspect, the synchronous rectifier driver circuit include: a first transistor having a drain connected to the gate of the synchronous rectifier; a second transistor having a body diode and a drain connected to the gate of the synchronous rectifier; a third transistor having a drain connected to the gate of the synchronous rectifier and a source connected to the reference ground; a fourth transistor having a body diode and a drain connected to the drain or the source of the synchronous rectifier; a fifth transistor having a drain connected to the gate of the third transistor and a source connected to the reference ground; a sixth transistor having a drain connected to the source of the first transistor, a gate connected to the source of the fourth transistor and a source connected to a gate of the third transistor; an inverter having an output connected to the gates of the first transistor, the second transistor, and the fourth transistor; and a control signal connected to an input of the inverter and the gate of the fifth transistor.
In another aspect, the synchronous rectifier is controlled using a synchronous rectifier driver circuit including: a first transistor having a drain connected to the gate of the synchronous rectifier; a second transistor having a drain connected to the gate of the synchronous rectifier; a one-way current switch connecting a source of the second transistor to a reference ground; a third transistor having a body diode, a drain connected to the gate of the synchronous rectifier and a source connected to the reference ground; a fourth transistor having a drain connected to the drain or the source of the synchronous rectifier and a source connected to the gate of the third transistor; a fifth transistor having a drain connected to the gate of the third transistor and a source connected to the reference ground; an inverter having an output connected to the gates of the first transistor, the second transistor, an enable terminal of the amplifier and the fourth transistor; and a control signal connected to an input of the inverter and the gate of the fifth transistor.
For a more complete understanding of the features and advantages of the present invention, reference is now made to the detailed description of the invention along with the accompanying figures, in which:
Illustrative embodiments of the system of the present application are described below. In the interest of clarity, not all features of an actual implementation are described in this specification. It will of course be appreciated that in the development of any such actual embodiment, numerous implementation-specific decisions must be made to achieve the developer's specific goals, such as compliance with system-related and business-related constraints, which will vary from one implementation to another. Moreover, it will be appreciated that such a development effort might be complex and time-consuming but would nevertheless be a routine undertaking for those of ordinary skill in the art having the benefit of this disclosure.
In the specification, reference may be made to the spatial relationships between various components and to the spatial orientation of various aspects of components as the devices are depicted in the attached drawings. However, as will be recognized by those skilled in the art after a complete reading of the present application, the devices, members, apparatuses, etc. described herein may be positioned in any desired orientation. Thus, the use of terms such as “above,” “below,” “upper,” “lower,” or other like terms to describe a spatial relationship between various components or to describe the spatial orientation of aspects of such components should be understood to describe a relative relationship between the components or a spatial orientation of aspects of such components, respectively, as the device described herein may be oriented in any desired direction.
Reverse recovery time is a challenge in all power switching applications, whether it is motor control, solenoid control, or power management. Reverse recovery charge is stored at the junction of the diode when it is being forward biased. (
In the representative prior art power switching circuit 200, to improve efficiency, the low switch M2 225 is on the ON state when the current I2 is freewheeling through the load inductor L1 245 and the load capacitor C1 250. When the output voltage V0 255 decreases, more energy must be provided from the inpur power supply by inputting the input power supply voltage Vp 205, by switching the high switch M1210 to the ON state. To prevent a shoot-through current from the high switch M1210 to the low switch M2 225, the low switch M2225 must be switched to the OFF state before the high switch M1210 is switched to the ON state. The time period during which both the high switch M1210 and the low switch M2225 are in the OFF state is the deadtime. To switch the low switch M2225 to the OFF state, the voltage source Vdd 230 is transitioned to 0 volts. During the deadtime that starts when the low switch M2225 is switched to the OFF state, a reverse recovery charge Qrr accumulates at the forward bias junction of the body diode of the low switch M2225. When the high switch M1210 is switched to the ON state, ending the deadtime, the reverse recovery charge Qrr and the forward current I1 220 flow through the high switch M1210. To minimize the peak and the dIrrldt of the reverse recovery charge Qrr that was accumulated in the body diode of the low switch M2225, the transition time from the OFF state to the ON state can be increased as shown for the practical current Id 125 in
The solution to this problem is to eliminate or reduce the reverse recovery charge that can be stored. The elimination of reduction of the reverse recovery charge is achieved by gate controlling the turn-off voltage level of device M2. As shown in
There are several ways that this technique can be implemented into a design.
In the embodiment shown in
Additionally, for the embodiments shown in
In addition, a feedback loop can be achieved from a tap-off FET from the low switch M2400 where a low-current diode voltage is monitored and the bias voltage Vbias for the low switch gate voltage VgL 407 can be adjusted. In addition, improvements can be made to the technique of optimizing the threshold voltage Vt of the low switch M2400. By making the threshold voltage Vt of the low switch M2400, the low switch M2400 can have more drive strength per unit area in the reverse-bias mode.
The approach taught herein can also be used with Silicon Carbide applications (SiC), Gallium Nitride, Gallium Oxide, or Gallium Arsenide. Any combination of bias voltage and threshold voltage can be set either positive or negative in value that meets the requirements of off-state in the forward direction and on-state in the negative direction.
The following embodiments reduce or eliminate current or voltage transients in the switching circuit by actively monitoring the SW pin located between the switching transistor and the synchronous rectifier. The circuits use closed loop feedback to control level transistion(s) for the synchronous rectifier gate. The active feedback may include a voltage, a rate of change of voltage, a current, a rate of change of current or a combination thereof, all at the SW pin. The circuit does not require, but may use, signals from or monitoring of the switching transistor. Moreover, the circuit does not require, but may include, a time delay circuit. As a result, the circuits described herein reduce current losses from break before make, gate to drain capacitance, reverse recovery charge (Qrr) and gate bounce. The circuits also help prevent ringing.
In one aspect, a switching circuit includes the synchronous rectifier connected to a switching transistor, and the method further includes reducing or eliminating current or voltage transients in the switching circuit. In another aspect, the method further includes selecting the one or more first voltages or the second voltage. In another aspect, the one or more first voltages are less than a threshold voltage of the synchronous rectifier. In some embodiments, the one or more first voltages can be greater than or equal to the threshold voltage of the synchronous rectifier. In another aspect, the one or more first voltages comprise a set of descending stair-step values, or a set of descending values forming a ramp or a curve. In another aspect, the one or more values can be a voltage, a change in the voltage, a current, a change in the current, or a combination of the voltage, the change in the voltage, the current or the change in the current of the drain or the source of the synchronous rectifier. In another aspect, the method further includes adjusting the one or more threshold values or a delay in driving the gate of the synchronous rectifier to the second voltage using a predictive feedback process. In another aspect, the predictive feedback process: samples and stores the one or more values of the gate, drain or the source of the synchronous rectifier; and uses the stored values of the gate, the drain or the source of the synchronous rectifier to adjust the one or more threshold values. In another aspect, the predictive feedback process: samples and stores the one or more values of the gate, the drain or the source of the synchronous rectifier and a switching transistor connected to the synchronous rectifier; and uses the stored values of the gate, the drain or the source of the synchronous rectifier and the switching transistor to adjust the one or more threshold values. In another aspect, the predictive feedback process: samples and stores the one or more values of the gate, the drain or the source of the synchronous rectifier; and uses the stored values of the gate, the drain or the source of the synchronous rectifier to adjust the delay in driving the gate of the synchronous rectifier to the second voltage. In another aspect, the predictive feedback process: samples and stores the one or more values of the gate, the drain or the source of the synchronous rectifier and a switching transistor connected to the synchronous rectifier; and uses the stored values of the gate, the drain or the source of the synchronous rectifier and the switching transistor to adjust the delay in driving the gate of the synchronous rectifier to the second voltage.
In another aspect, the second voltage is equal to zero volts. In another aspect, the second voltage is less than zero volts, e.g., −1 volts, −2 volts or an incremental value between 0 and −2 volts or more. In another aspect, a gate of a switching transistor connected to the synchronous rectifier is not monitored or used to control the gate of the synchronous rectifier. In another aspect, the synchronous rectifier is controlled using a synchronous rectifier driver circuit including: a driver circuit connected to the gate of the synchronous rectifier; a parallel clamping circuit connected to the gate of the synchronous rectifier; a monitoring circuit connected to the drain or the source of the synchronous rectifier and the parallel clamping circuit; and a control circuit connected to the driver circuit and the monitoring circuit. In another aspect, the synchronous rectifier driver circuit includes or does not include a time delay circuit. In another aspect, the driver circuit include: a first transistor having a gate connected to the control circuit and a drain connected to the gate of the synchronous rectifier; a second transistor having a drain connected to the gate of the synchronous rectifier and a gate connected to the control circuit; a one-way current switch connected to a source of the second transistor. In another aspect, the parallel clamping circuit includes a third transistor having a drain connected to the gate of the synchronous rectifier, a gate connected to the monitoring circuit and a source connected to a reference ground. In another aspect, the monitoring circuit include: a fourth transistor having a drain connected to the drain or the source of the synchronous rectifier, a gate connected to the control circuit, and a source connected to the parallel clamping circuit; and a fifth transistor having a drain connected to the parallel clamping circuit and a gate connected to the control circuit. In another aspect, the control circuit is further connected to a modulation signal. In another aspect, the driver circuit, the parallel clamping circuit, the monitoring circuit and the control circuit are formed in or on silicon, silicon carbide, gallium nitride, gallium oxide, or gallium arsenide.
In another aspect, the synchronous rectifier is controlled using a synchronous rectifier driver circuit including: a first transistor having a drain connected to the gate of the synchronous rectifier; a second transistor having a drain connected to the gate of the synchronous rectifier; a one-way current switch connected between a source of the second transistor and a reference ground; a third transistor having a drain connected to the gate of the synchronous rectifier and a source connected to the reference ground; a fourth transistor having a drain connected to the drain or the source of the synchronous rectifier and a source connected to a gate of the third transistor; a fifth transistor having a drain connected to the gate of the third transistor and a source connected to the reference ground; and a control circuit connected to a gate of the first transistor, a gate of the second transistor, a gate of the fourth transistor and a gate of the fifth transistor. In another aspect, the synchronous rectifier driver circuit drives the gate of the synchronous rectifier to the one or more first voltages by: turning the first transistor from ON to OFF; turning the second transistor from OFF to ON; turning the fourth transistor from OFF to ON; and turning the fifth transistor from ON to OFF. In another aspect, the synchronous rectifier driver circuit drives the gate of the synchronous rectifier to the second voltage by turning the third transistor from OFF to ON. In another aspect, the synchronous rectifier driver circuit includes or does not include a time delay circuit. In another aspect, the control circuit is further connected to a modulation signal. In another aspect, the first transistor, the second transistor, the one-way current switch, the third transistor, the fourth transistor, the fifth transistor and the control circuit are formed in or on silicon, silicon carbide, gallium nitride, gallium oxide, or gallium arsenide.
In another aspect, the synchronous rectifier is controlled using a synchronous rectifier driver circuit including: a first transistor having a drain connected to the gate of the synchronous rectifier; a second transistor having a drain connected to the gate of the synchronous rectifier and a body connected to a reference ground; a third transistor having a drain connected to a source of the second transistor, and a body and a drain connected to the reference ground; a fourth transistor having a drain connected to the gate of the synchronous rectifier, a gate connected to a source of the second transistor and a source connected to the reference ground; a fifth transistor having a drain connected to the gate of the synchronous rectifier and a source connected to the reference ground; a sixth transistor having a drain connected to the drain or the source of the synchronous rectifier and a source connected to the gate of the fifth transistor; a one-way current switch connected from a source to the drain of the sixth transistor; a seventh transistor having a drain connected to the gate of the fifth transistor and a source connected to the reference ground; an inverter having an output connected to the gates of the first transistor, the second transistor and the sixth transistor; and a control signal connected to an input of the inverter and the gates of the third transistor and seventh transistor.
In another aspect, the synchronous rectifier is controlled using a synchronous rectifier driver circuit including: a first transistor having a drain connected to the gate of the synchronous rectifier; a second transistor having a drain connected to the gate of the synchronous rectifier; a first one-way current switch connecting a source of the second transistor to a reference ground; a third transistor having a drain connected to the gate of the synchronous rectifier and a source connected to the reference ground; a fourth transistor having a drain connected to the drain or the source of the synchronous rectifier; a second one-way current switch connected from a source to the drain of the fourth transistor; an amplifier having a positive terminal connected to the source of the fourth transistor, a negative terminal connected to a voltage, and an output connected to the gate of the third transistor; a fifth transistor having a drain connected to the gate of the third transistor and a source connected to the reference ground; an inverter having an output connected to the gates of the first transistor, the second transistor, an enable terminal of the amplifier and the fourth transistor; and a control signal connected to an input of the inverter and the gate of the fifth transistor.
In another aspect, the synchronous rectifier is controlled using a synchronous rectifier driver circuit including: a first transistor having a drain connected to the gate of the synchronous rectifier; a second transistor having a drain connected to the gate of the synchronous rectifier; a first one-way current switch connected to a source of the second transistor; a fourth transistor having a drain connected to the gate of the synchronous rectifier, a gate connected to the first one-way current switch and a source connected to a reference ground; a second one-way current switch connected between a voltage and the gate of the fourth transistor; a fifth transistor having a drain connected to the gate of the fourth transistor and a source connected to the reference ground; a sixth transistor having a drain connected to the gate of the synchronous rectifier and a source connected to the reference ground; a seventh transistor having a drain connected to the drain or the source of the synchronous rectifier; a third one-way current switch connected from a source to the drain of the seventh transistor; an inverter having an output connected to the gates of the first transistor, the second transistor and the seventh transistor; and a control signal connected to an input of the inverter and the gate of the fifth transistor, the gate of the sixth transistor and the source of the seventh transistor.
In another aspect, the synchronous rectifier is controlled using a synchronous rectifier driver circuit including: a first transistor having a drain connected to the gate of the synchronous rectifier; a second transistor having a drain connected to the gate of the synchronous rectifier; a first one-way current switch connecting a source of the second transistor to a reference ground; a third transistor having a drain connected to the gate of the synchronous rectifier and a source connected to the reference ground; a fourth transistor having a drain connected to the drain or the source of the synchronous rectifier; a second one-way current switch connected from a source to the drain of the fourth transistor; a fifth transistor having a drain connected to the gate of the third transistor and a source connected to the reference ground; a sixth transistor having a drain connected to the source of the first transistor, a gate connected to the source of the fourth transistor and a source connected to a gate of the third transistor; an inverter having an output connected to the gates of the first transistor, the second transistor, and the fourth transistor; and a control signal connected to an input of the inverter and the gate of the fifth transistor.
In another aspect, the synchronous rectifier is controlled using a synchronous rectifier driver circuit including: a first transistor having a drain connected to the gate of the synchronous rectifier; a second transistor having a drain connected to the gate of the synchronous rectifier; a one-way current switch connecting a source of the second transistor to a reference ground; a third transistor having a body diode, a drain connected to the gate of the synchronous rectifier and a source connected to the reference ground; a fourth transistor having a drain connected to the drain or the source of the synchronous rectifier and a source connected to the gate of the third transistor; a fifth transistor having a drain connected to the gate of the third transistor and a source connected to the reference ground; an inverter having an output connected to the gates of the first transistor, the second transistor, an enable terminal of the amplifier and the fourth transistor; and a control signal connected to an input of the inverter and the gate of the fifth transistor.
In other embodiments, the one or more threshold values or a delay in driving the gate of the synchronous rectifier 1606 to the second voltage are adjusted using a predictive feedback process. Since most switching regulators and intelligent motion drivers are periodic, the loop can be adjusted by increasing or decreasing phase delay. The current, voltage, rate of change of the current or voltage, or a combination thereof can be sampled and stored to be used for the next cycle. This can also be used as a running average over several previous cycles. This predictive feedback process can sample and store the one or more values of the gate, the drain or the source of the synchronous rectifier, and use the stored values of the gate, the drain or the source of the synchronous rectifier to adjust the one or more threshold values.
In addition to sensing the drain or source synchronous rectifier 1606, the switching transistor can be sensed as well. This predictive feedback process can sample and store the one or more values of the gate, the drain or the source of the synchronous rectifier and a switching transistor connected to the synchronous rectifier, and use the stored values of the gate, the drain or the source of the synchronous rectifier and the switching transistor to adjust the one or more threshold values.
In another embodiment, the closed loop system can be put on a delay to turn off the synchronous rectifier 1606. This can be increased or decreased in the same manner by sampling the current, voltage or rate of change and adjusting time delay appropriately. This predictive feedback process can sample and store the one or more values of the gate, the drain or the source of the synchronous rectifier, and use the stored values of the gate, the drain or the source of the synchronous rectifier to adjust the delay in driving the gate of the synchronous rectifier to the second voltage. Similarly, this predictive feedback process can sample and store the one or more values of the gate, the drain or the source of the synchronous rectifier and a switching transistor connected to the synchronous rectifier, and use the stored values of the gate, the drain or the source of the synchronous rectifier and the switching transistor to adjust the delay in driving the gate of the synchronous rectifier to the second voltage. Note that combinations of the previously describe predictive feedback processes can be used
As shown in
In some embodiments, such as
The synchronous rectifier driver circuit 1608 drives the gate of the synchronous rectifier MD 1606 to the one or more first voltages by: turning the first transistor 1702 from ON to OFF; turning the second transistor 1704 from OFF to ON; turning the fourth transistor M11710 from OFF to ON; and turning the fifth transistor M21712 from ON to OFF. The synchronous rectifier driver circuit 1608 drives the gate of the synchronous rectifier MS 1606 to the second voltage by turning the third transistor 1708 from OFF to ON when a positive voltage is observed on the SW pin. The synchronous rectifier driver circuit 1608 may or may not include a time delay circuit. In addition, the control circuit 1616 is further connected to a modulation signal. The first transistor, the second transistor, the one-way current switch, the third transistor, the fourth transistor, the fifth transistor and the control circuit can be formed in or on silicon, silicon carbide, gallium nitride, gallium oxide, or gallium arsenide.
The synchronous rectifier driver circuits shown
The approach taught herein can also be used in any combination of configurations, such as high-side drive, low-side drive, high- and low-side, or one or more FETs in any combination.
The approach taught herein can also be used in any combination of current or voltage switching or current and voltage switching, such as power regulation, one or more switches for line termination, DC motor drivers, induction motor drivers, transducer drivers, solid-state fuse switches, battery management, AC-to-DC power conversion, DC-to-AC power conversion, or power correction.
Any combination of bias voltage and threshold voltage can be set either positive or negative in value that meets the requirements of off-state in the forward direction and on-state in the negative direction.
Any combination of transitions from on voltage to bias voltage that meets the requirements of on- to off-state in the forward direction and on-state in the negative direction is included in the present invention. The transitions can also be either step functions, linear graded, or non-linear graded transitions.
It will be understood that particular embodiments described herein are shown by way of illustration and not as limitations of the invention. The principal features of this invention can be employed in various embodiments without departing from the scope of the invention. Those skilled in the art will recognize, or be able to ascertain using no more than routine experimentation, numerous equivalents to the specific procedures described herein. Such equivalents are considered to be within the scope of this invention and are covered by the claims.
All publications and patent applications mentioned in the specification are indicative of the level of skill of those skilled in the art to which this invention pertains. All publications and patent applications are herein incorporated by reference to the same extent as if each individual publication or patent application was specifically and individually indicated to be incorporated by reference.
The use of the word “a” or “an” when used in conjunction with the term “comprising” in the claims and/or the specification may mean “one,” but it is also consistent with the meaning of “one or more,” “at least one,” and “one or more than one.” The use of the term “or” in the claims is used to mean “and/or” unless explicitly indicated to refer to alternatives only or the alternatives are mutually exclusive, although the disclosure supports a definition that refers to only alternatives and “and/or.” Throughout this application, the term “about” is used to indicate that a value includes the inherent variation of error for the device, the method being employed to determine the value, or the variation that exists among the study subjects.
As used in this specification and claim(s), the words “comprising” (and any form of comprising, such as “comprise” and “comprises”), “having” (and any form of having, such as “have” and “has”), “including” (and any form of including, such as “includes” and “include”) or “containing” (and any form of containing, such as “contains” and “contain”) are inclusive or open-ended and do not exclude additional, unrecited elements or method steps. In embodiments of any of the compositions and methods provided herein, “comprising” may be replaced with “consisting essentially of” or “consisting of.” As used herein, the phrase “consisting essentially of” requires the specified integer(s) or steps as well as those that do not materially affect the character or function of the claimed invention. As used herein, the term “consisting” is used to indicate the presence of the recited integer (e.g., a feature, an element, a characteristic, a property, a method/process step, or a limitation) or group of integers (e.g., feature(s), element(s), characteristic(s), property(ies), method/process(s) steps, or limitation(s)) only.
The term “or combinations thereof” as used herein refers to all permutations and combinations of the listed items preceding the term. For example, “A, B, C, or combinations thereof” is intended to include at least one of: A, B, C, AB, AC, BC, or ABC, and if order is important in a particular context, also BA, CA, CB, CBA, BCA, ACB, BAC, or CAB. Continuing with this example, expressly included are combinations that contain repeats of one or more item or term, such as BB, AAA, AB, BBC, AAABCCCC, CBBAAA, CABABB, and so forth. The skilled artisan will understand that typically there is no limit on the number of items or terms in any combination, unless otherwise apparent from the context.
As used herein, words of approximation such as, without limitation, “about,” “substantial” or “substantially” refers to a condition that when so modified is understood to not necessarily be absolute or perfect but would be considered close enough to those of ordinary skill in the art to warrant designating the condition as being present. The extent to which the description may vary will depend on how great a change can be instituted and still have one of ordinary skill in the art recognize the modified feature as still having the required characteristics and capabilities of the unmodified feature. In general, but subject to the preceding discussion, a numerical value herein that is modified by a word of approximation such as “about” may vary from the stated value by at least ±1, 2, 3, 4, 5, 6, 7, 10, 12 or 15%.
As used herein, the term “connected” refers to devices or components that are directly or indirectly connected or coupled together. One or more other devices or components can be disposed between the connected devices or components.
All of the devices and/or methods disclosed and claimed herein can be made and executed without undue experimentation in light of the present disclosure. While the devices and/or methods of this invention have been described in terms of particular embodiments, it will be apparent to those of skill in the art that variations may be applied to the compositions and/or methods and in the steps or in the sequence of steps of the method described herein without departing from the concept, spirit and scope of the invention. All such similar substitutes and modifications apparent to those skilled in the art are deemed to be within the spirit, scope, and concept of the invention as defined by the appended claims.
Furthermore, no limitations are intended to the details of construction or design herein shown, other than as described in the claims below. It is therefore evident that the particular embodiments disclosed above may be altered or modified and all such variations are considered within the scope and spirit of the disclosure. Accordingly, the protection sought herein is as set forth in the claims below.
Modifications, additions, or omissions may be made to the systems and apparatuses described herein without departing from the scope of the invention. The components of the systems and apparatuses may be integrated or separated. Moreover, the operations of the systems and apparatuses may be performed by more, fewer, or other components. The methods may include more, fewer, or other steps. Additionally, steps may be performed in any suitable order.
To aid the Patent Office, and any readers of any patent issued on this application in interpreting the claims appended hereto, applicants wish to note that they do not intend any of the appended claims to invoke 35 U.S.C. § 112(f) as it exists on the date of filing hereof unless the words “means for” or “step for” are explicitly used in the particular claim.
This application is a continuation-in-part application of U.S. patent application Ser. No. 17/735,208 filed on May 3, 2022, which claims priority to U.S. Provisional Application No. 63/183,286 filed on May 3, 2021, the contents of each of which are incorporated by reference herein.
| Number | Date | Country | |
|---|---|---|---|
| 63183286 | May 2021 | US |
| Number | Date | Country | |
|---|---|---|---|
| Parent | 17735208 | May 2022 | US |
| Child | 18812694 | US |
