Claims
- 1. A clamp circuit comprising:
a power supply node; a ground node; a first node that is selectively coupled the power supply node in a first state and the ground node in a second state; and a second node providing a first clamp voltage in the first state and a second clamp voltage in the second state.
- 2. The clamp circuit of claim 1 further comprising a plurality of series-coupled diodes coupling the first node to the second node.
- 3. The clamp circuit of claim 2 wherein the plurality of series-coupled diodes are not forward biased in both the first state and the second state.
- 4. The clamp circuit of claim 1 further comprising a plurality of series-coupled bipolar junction transistors coupling the first node to the second node, wherein each of the series-coupled bipolar junction transistors comprises a collector electrode coupled to the first node.
- 5. The clamp circuit of claim 4 wherein each of the plurality of series-coupled transistors comprises a base-emitter junction and the base-emitter junctions are not forward biased in both the first state and the second state.
- 6. The clamp circuit of claim 4 wherein each of the plurality of series-coupled transistors comprises a collector electrode and the collector electrodes are driven synchronously with a load that is being clamped.
- 7. The clamp circuit of claim 4 wherein the series-coupled bipolar junction transistors are manufactured using a BiCMOS process.
- 8. A clamp circuit comprising:
a first potential; a second potential; a first node that is selectively coupled the first potential during a first state and selectively coupled to the second potential during a second state; and a second node providing a first clamp voltage in the first state and a second clamp voltage in the second state.
- 9. The clamp circuit of claim 8 further comprising:
a reverse-biased junction coupled between the first node and the second node.
- 10. The clamp circuit of claim 8 further comprising:
a plurality of series-coupled bipolar junction transistors coupling the first node to the second node, wherein each of the series-coupled bipolar junction transistors comprises a collector electrode coupled to the first node.
- 11. A method for clamping a voltage across a load comprising:
providing a first node at a first potential; providing a second node second potential; during a first state, coupling the first node to the first potential; during a second state, coupling the first node to the second potential; and reverse biasing a diode junction coupled between the first and second nodes during both the first and second state.
- 12. The method of claim 11 wherein the diode junction comprises a plurality of series coupled bipolar junction transistors.
- 13. The method of claim 11 further comprising:
driving a collector of each of the plurality of series coupled bipolar junction transistors with a potential that is auto-synchronized with the voltage across the load.
RELATED APPLICATIONS
[0001] This application is a divisional of co-pending U.S. patent application Ser. No. 09/299,252 entitled “DRIVE CIRCUIT FOR INDUCTIVE LOADS”, now issued as U.S. Pat. No. ______ that is assigned to the assignee of the present invention and is incorporated herein by reference.
Divisions (1)
|
Number |
Date |
Country |
Parent |
09299252 |
Apr 1999 |
US |
Child |
10331310 |
Dec 2002 |
US |