NSF Award
2329190
Non-Technical:<br/>Electronic integration has proven foundational to modern information society. Specifically, the up-scaling in semiconductor industry is one of the most critical steps towards reduced production cost, enhanced performance, and integration density. In this project, a potential transformative technique for developing next-generation semiconductor computing processor is proposed. By prototyping novel integrated electronic devices based on two-dimensional (2D) semiconductors with atomic thickness, ultrathin microelectronic logic element is studied, leading to not only fundamental physics advancements in low-dimensional materials community, but also major advances in semiconductor technologies synergizing vital research areas of materials, electronic devices, and novel circuity architecture. College students will be trained and involved for workforce upgrade and knowledge dissemination. Workshops, symposiums, and tutorials are planned, as well as technical exchange at international conferences to enhance the impact and findings of this project. Collaborations and technical discussions are also planned with semiconductor companies to foster technological translation workforce alignment.<br/><br/>Technical:<br/>An interdisciplinary study on the three-dimensional (3D) integration of complementary-field effect transistors (C-FET) made by 2D material is proposed for the ultimate solution for the next-generation computing processors. Despite the recent advancement using multi-dimensional gate control technology, the current material and device architectures still encounter fundamental limitation on integration density and multifunctionality. A groundbreaking paradigm leap synergizing the material- and device- and circuit- level has thus attracted enormous interest from both academia and industry. Three significant breakthroughs will be made: (i) Single-crystalline 2D materials have atomic thickness and self-confine nature, it maintains excellent electrical property even under sub-nanometer scale, securing ultimate scalability. (ii) C-FETs are based on the concept of 3D heterogeneous integration of CMOS devices, allowing aggressive cell scaling to realize compact logic circuity. (iii) C-FET based monolithic 3D integration with image sensors will be achieved to explore the possibility of various integration capability based on the C-FET-based circuits. Four objectives will be implemented to promote the suggested breakthroughs: (1) Using the geometrically confined growth method that has recently proven groundbreaking success, high-quality single-crystal 2D materials can be manufactured at large-scale with high yield. (2) Single-crystalline 2D material-based C-FETs will be fabricated with competitive state-of-the-art performance. (3) Enabled with such C-FETs, circuit design of logic cells can be implemented including a full adder and a full substractor. (4) Ultimately, a novel encoder can be realized leveraging this new type of microprocessor, which is a main component of analog-to-digital converters (ADC). Through this, M3D integration with image sensors will be demonstrated to explore integration possibility of the C-FETs circuits. The next-generation computing processor proposed in this project will provide detailed understanding on how to demonstrate high-quality 2D materials, C-FETs, and C-FET based circuits that are key to maximizing their full potential, ultimate scalability and gate-controllability, for semiconductor technologies and industries. The successful achievement of these objectives will pave a new avenue for the next-generation computing processor that can meet the computational demands in the era of data explosion with less power consumption, leading to a considerable surge of interest in the science and application of 2D semiconductors.<br/><br/>This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
