The disclosure of Japanese Patent Application No. 2007-265256 including specification, claims, drawings and abstract is incorporated herein by reference in its entirety.
1. Technical Field
The present invention relates to a color killer circuit that masks a color component when a composite video signal including a color component signal and a luminance component signal is processed.
2. Related Art
In video signals for the NTSC system or other systems (composite video signals), as shown in
In the processing of such a video signal to display a video image, when the strength of an input video signal is weak, or when noise is large with respect to the strength of the video signal, routinely processing the video signal may result in occurrence of uneven color or other irregularities, causing a video image to distort. With this being the situation, a color component output may be blocked so that a monochrome video image containing luminance information only is displayed.
In order to perform processing while thus masking a color component, a color killer circuit has been used. The color killer circuit includes, as shown in
The analog-to-digital converter 10 converts an input video signal to a digital signal, which is input to the burst amplitude detection unit 12 and the noise detection unit 14. The analog-to-digital converter 10 samples signals at a sampling rate four times a frequency of the color burst included in the video signal. In this process, as shown in
The burst amplitude detection unit 12 receives the digitalized video signal, and extracts an amplitude of the color burst for each video signal of one horizontal line. The burst amplitude detection unit 12 determines whether or not the extracted amplitude is less than a preset first threshold value. An output to the OR element 16 is set to HIGH level when the extracted amplitude is less than the preset first threshold value, and otherwise is set to LOW level.
The noise detection unit 14 receives the digitalized video signal, and determines a strength of noise superimposed on the video signal. The strength of noise can be estimated based on whether or not an average strength of input video signals is less than a preset second threshold value. The noise detection unit 14 sets an output to the OR element 16 to HIGH level when an average strength of input video signals is less than the preset second threshold value, and otherwise sets it to LOW level.
The OR element 16 receives outputs from the burst amplitude detection unit 12 and the noise detection unit 14, sets a killer determination signal to HIGH level when at least one of those outputs has HIGH level, and sets a killer determination signal to LOW level when both of those outputs have LOW level. Thus, when the strength of an input video signal is weak, or when noise is large with respect to the strength of the video signal, it is possible to determine, based on the killer determination signal, whether or not the color signal should be masked to perform processing.
However, the above-described related-art color killer circuit requires, in addition to the burst amplitude detection unit 12 for extracting a maximum peak value of the color burst, the noise detection unit 14 for determining whether or not the electric field strength of the video signal is under weak electric field conditions under which it is less than a predetermined threshold value.
Therefore, there have been problems in that the color killer circuit has a complicated circuit structure, and is large in circuit scale. As a result, there is also a problem in that the cost of manufacturing an apparatus including the color killer circuit is increased.
According to one aspect of the present invention, there is provided a color killer circuit comprising a burst amplitude detection unit that detects an amplitude of a color burst included in a composite video signal including signals for a color component and a luminance component; a delay unit that stores, delays, by a predetermined period of time, and outputs the amplitude of the color burst detected by the burst amplitude detection unit; a subtractor that calculates a difference between an output from the burst amplitude detection unit and an output from the delay unit; a first comparator that compares the output from the burst amplitude detection unit with a first threshold value to determine whether or not the output from the burst amplitude detection unit is less than the first threshold value; and a second comparator that compares an output from the subtractor with a second threshold value to determine whether or not the output from the subtractor is greater than the second threshold value, wherein the color killer circuit masks the color component of the composite video signal when the first comparator determines that the output from the burst amplitude detection unit is less than the first threshold value, or when the second comparator determines that the output from the subtractor is greater than the second threshold value.
Exemplary embodiments of the present invention will be described in detail based on the following figures, wherein:
According to an embodiment of the present invention, a color killer circuit 100 includes a burst gate pulse generation unit 102, a color killer detection unit 104, and a color killer processing unit 106, as shown in
The burst gate pulse generation unit 102 receives, from a preceding-stage synchronization signal detection unit (not shown), a horizontal synchronization timing pulse Hsync indicating timing of a horizontal synchronization signal, and starts timing detection using a counter. Then, after a predetermined period of time has passed from a rise time of the horizontal synchronization timing pulse Hsync, or in other words, during a color burst period of the video signal, the burst gate pulse generation unit 102 generates and outputs, to the color killer detection unit 104, a burst gate pulse BGP having a pulse width corresponding to one cycle of the color burst.
The color killer detection unit 104 includes an analog-to-digital converter 20, a burst amplitude detection unit 22, a delay unit 24, a subtractor 26, comparators 28 and 30, and an OR element 32, as shown in
The analog-to-digital converter 20 receives a video signal, converts the video signal into a digital signal through sampling, and outputs the digital signal. In this process, the sampling is performed at a frequency at least four times the frequency of the color burst. In this process, a peak position of an amplitude of the color burst is detected through peak detection, and the sampling is performed such that each peak position of the color burst corresponds to a sampling point, as shown in
The burst amplitude detection unit 22 receives the video signal sampled by the analog-to-digital converter 20 and the burst gate pulse BGP, and extracts and outputs a peak value of the color burst. The burst gate pulse BGP is a signal having a pulse width corresponding to one cycle of the color burst in the color burst period. Therefore, a maximum sample value of sampling points included in a period during which the burst gate pulse BGP is at HIGH level is detected and output as the peak value of the color burst.
For example, in the example of sampling of the color burst shown in
The comparator 28 receives the peak value P1 of the color burst output from the burst amplitude detection unit 22, and determines whether or not the peak value P1 is less than a predetermined amplitude determination threshold value (first threshold value) TH1. The amplitude determination threshold value TH1 may be prestored in a register (not shown) included in the color killer circuit 100. The comparator 28 sets an output C1 to HIGH level when the peak value P1 is less than the amplitude determination threshold value TH1, and otherwise sets the output C1 to LOW level.
It should be noted that the amplitude determination threshold value TH1 of the comparator 28 may have hysteresis characteristics. More specifically, as shown in
The delay unit 24 receives the peak value of the color burst output from the burst amplitude detection unit 22, counts reference clocks such as externally input system clocks, and delays, by one horizontal period of the video signal, and outputs the peak value P1 of the color burst. It should be noted that the delay time is one horizontal period in the present embodiment, but may be any constant multiple of the horizontal period.
The subtractor 26 receives the peak value P1 of the color burst output from the burst amplitude detection unit 22 and a peak value P0 delayed by one horizontal period, which is output from the delay unit 24, and calculates and outputs a difference between those values.
Through this process performed by the subtractor 26, as shown in
The comparator 30 receives the difference value ΔP of the peak value output from the subtractor 26, and determines whether or not the difference value ΔP is greater than a predetermined noise determination threshold value (second threshold value) TH2. The noise determination threshold value TH2 may be prestored in a register (not shown) included in the color killer circuit 100. The comparator 30 sets an output C2 to HIGH level when the difference value ΔP is greater than the noise determination threshold value TH2, and otherwise sets the output C2 to LOW level.
It should be noted that, as in the comparator 28, the amplitude determination threshold value TH2 may have hysteresis characteristics. More specifically, as shown in
The OR element 32 receives the output C1 of the comparator 28 and the output C2 of the comparator 30, calculates a logical OR of the two, and outputs the result as a killer determination signal C3. More specifically, the killer determination signal C3 has HIGH level when either one of the output C1 and the output C2 is at HIGH level, and otherwise the killer determination signal C3 has LOW level. The killer determination signal C3 is input to the color killer processing unit 106.
The color killer processing unit 106 receives a color signal separated from the video signal and the killer determination signal C3, and performs processing to mask the color signal in accordance with the killer determination signal C3. The color signal input to the color killer processing unit 106 may be a signal which is separated, together with a luminance signal, from the video signal in a processing circuit preceding the color killer circuit 100, and is digitally converted. However, it is optional whether or not to perform digitalization. The color killer processing unit 106 does not output the color signal when the killer determination signal C3 has HIGH level, and outputs the color signal to a following-stage processing circuit (not shown) when the killer determination signal C3 has LOW level.
The following-stage processing circuit performs processing to reproduce a color video image including the color signal when the color signal is not masked, and to reproduce a monochrome video image only from the luminance signal separated from the video signal when the color signal is masked. However, the processing performed by the following-stage processing circuit is not limited to the above-described processing.
As described above, by employing the color killer circuit 100, when the strength of the video signal is low, or when noise is large, it is possible to perform processing while masking a color signal. More specifically, without performing a weak electric field detection process in which an amplitude of a video signal is compared with a predetermined threshold value, by comparing color bursts included in the video signal with each other, it is possible to determine whether or not noise is included. Thus, color killer determination can be performed in a simple structure with an adequate detection sensitivity.
Modification 1
A color killer circuit according to a modification of the embodiment of the present invention has an overall structure similar to that of the color killer circuit 100, but differs in that the color killer detection unit 104 includes averaging units 34 and 36, as shown in
The averaging unit 34 averages peak values P1 of color bursts output from the burst amplitude detection unit 22 over a plurality of horizontal lines. For example, the averaging is performed over effective horizontal lines included in one frame of a video signal. The term “effective horizontal lines” refers to horizontal lines which include effective signals for representing a video image, excluding horizontal lines such as those included in vertical blanking periods included in video signals. Alternatively, the averaging may be performed over a plurality of frames for effective horizontal lines included in a video signal.
Specifically, when one frame of a video signal has 128 effective horizontal lines ranging from the 10th horizontal line to the 137th horizontal line, and the averaging is performed over a specified number of frames as shown in FIG. 8 using a value ACC_FRAME (2 bits) set in a register (not shown) attached to the averaging unit 34, an average value P1AVE can be obtained by the following equation (1):
One frame of an NTSC signal has a total of 525 horizontal lines, among which color burst carrier lines are from the 10th horizontal line to the 263rd horizontal line, and from the 273rd horizontal line to the 525th horizontal line. In this example, for the sake of circuit simplicity, the 10th horizontal line to the 137th horizontal line of one frame are used for detection.
The output P1a from the averaging unit 34 is input to the comparator 28. The processing performed by the comparator 28 is similar to that of the above-described embodiment. Here, because the peak values P1 of the color bursts are averaged, the instability in the processing caused by the variation in peak value P1 for each horizontal line can be reduced. More specifically, by averaging amplitudes of color bursts, which are under determination, over a plurality of horizontal lines, it is possible to more reliably determine whether or not the strength of a video signal is weak.
The averaging unit 36 averages differences ΔP between peak values of color bursts output from the subtractor 26 over a plurality of horizontal lines. For example, the averaging is performed over effective horizontal lines included in one frame of a video signal. Alternatively, the averaging may be performed over a plurality of frames for effective horizontal lines included in a video signal.
Similarly as with the above-described example, when one frame of a video signal has 128 effective horizontal lines ranging from the 10th horizontal line to the 137th horizontal line, and the averaging is performed over a specified number of frames as shown in
The output ΔPa from the averaging unit 36 is input to the comparator 30. The processing performed by the comparator 30 is similar to that of the above-described embodiment. Here, because the difference values ΔP are averaged, the instability in the processing caused by the variation in difference value ΔP for each horizontal line can be reduced. Especially, when noise is large, because the variance value of a difference value ΔP for each horizontal line is also large, variation tends to occur in determining the strength of noise in the comparator 30, but, by averaging difference values ΔP over a plurality of horizontal lines, it is also possible to reduce the variation in determination.
It should be noted that both or either one of the averaging units 34 and 36 may be provided. Even when either one of the averaging units 34 and 36 is provided, an advantage can be obtained in that the stability of a color killer circuit can be increased.
Number | Date | Country | Kind |
---|---|---|---|
2007-265256 | Oct 2007 | JP | national |
Number | Date | Country |
---|---|---|
11-308632 | Nov 1999 | JP |
Number | Date | Country | |
---|---|---|---|
20090096928 A1 | Apr 2009 | US |