The subject invention relates to a method for increasing the brightness of matrix-type display devices.
Recently, much progress has been made in increasing the brightness of light emitting diodes (LEDs). As a result, it is anticipated that in years to come, LEDs will become sufficiently bright and inexpensive to serve as a light source for matrix-type displays. This enables obtaining high quality video with a very large color gamut and a contrast higher than that obtainable using present technology. It also enables front projections displays for portable applications.
In displays that make use of line-at-a-time addressing, it is advisable not to illuminate the display panel during addressing, in that during addressing and the subsequent response time of the pixels, the state of the pixels is, in general, not clearly defined.
Addressing of a matrix-type display, e.g., LCOS or DMD, is done line-at-a-time. This technology is a good candidate for LED-based projection. In line-at-a-time addressing, each frame is divided into one or more fields. Each of these fields is then subdivided into three color fields, corresponding, respectively, to the colors red, green and blue. Starting at the beginning of a color field period, the first line is addressed by activating the appropriate row electrode. The pixels within this line are reset (optional) and subsequently addressed by supplying the correct voltages to the column electrodes in order to render the correct grey scale level. Next, the following line is addressed, and so on. The panel is fully addressed after addressing the last line, and after waiting until the response time of the liquid crystal (LC) material has passed. At this point in time, it is appropriate to switch on the LEDs corresponding to the color field that has been addressed. The LEDs remain switched on until the start of addressing of the next color field. This is shown in
However, light can only be generated for a limited amount of time. The line address time can be as small as 1 μsec per line. For XGA resolution (864 lines), the panel address time is, therefore, typically 1 msec. The LC response time is also of the order of 1 msec. In the case of color sequential operation with 3 color fields at 60 Hz frame rate, the field time is 1/60/3=5.56 msec. The sum of line address time and LC response time is 2 msec. This means that the effective duty cycle for illumination is only (5.56−2)/5.56/3=21% for each color. In other words, each color is allowed to be on for only 21% of the total time instead of the theoretical maximum of 33%. The problem is, therefore, that during almost 40% of the time no light can be generated.
It is an object of the present invention to increase the brightness in a matrix-type display.
This object is achieved in a method of increasing the brightness of a color-sequential matrix display, said matrix display being addressed on a line-by-line basis, said method comprising the steps of dividing a frame period of said matrix display into sub-fields corresponding to the number of light colors being used to sequentially illuminate said matrix display; addressing the pixels in each line of the display in each sub-field, said addressing comprising applying a video signal to each pixel in each line of the display in each sub-field, said video signal corresponding to a gray scale level of the video signal for the light color corresponding to the respective sub-field; allocating an LC response time for each line of the display in each sub-field; and illuminating the display sequentially with said light colors, each for the duration of the corresponding sub-field.
Applicants note that while the above method does increase the brightness, artifacts arise due to the illumination of the display elements during the addressing time and the LC response time. This is due to the gray scale level of the display element in the current sub-field being affected by the gray scale level of the display element due to the previous sub-field. This effect is shown in
To that end, the method of increasing the brightness further comprises the step of pre-processing the video signal to compensate for errors due to illuminating the display during the addressing time and LC response time, said pre-processing step including determining a direction and an amount of gray scale level change from a preceding sub-field to a current sub-field; and increasing or decreasing the video signal in the current sub-field in dependence on the determined direction of the gray scale level change from the preceding sub-field and by an amount corresponding to a predetermined factor of said determined amount of gray scale level change.
With the above and additional objects and advantages in mind as will hereinafter appear, the invention will be described with reference to the accompanying drawings, in which:
In the embodiment shown in
Each display element 32 is associated with a respective switching device in the form of a thin film transistor TFT 34. The gate terminals of all TFTs 34 associated with display elements in the same row are connected to a common row conductor 36 to which, in operation, selection pulse (gating) signals are supplied. Likewise, the source terminals of the TFTs 34 associated with all display elements in the same column are connected to a common column conductor 38 to which data (video) signals are applied. The drain terminals of the TFTs 34 are each connected to a respective transparent display element electrode 40 forming part of, and defining, the display element. The set of conductors 36 and 38, TFTs 34 and electrodes 40 are carried on one transparent plate, while a second, spaced, transparent plate carries an electrode 42 common to all display elements. Liquid crystal material is disposed between the plates and each display element comprises the electrode 40 and overlying portions of the liquid crystal layer and the common electrode 42. Each display element further includes a storage capacitor 44 which is connected between the display element electrode 40 and a row conductor 36 adjacent to that which the TFT 34 associated with the display element is connected.
In operation, light from a light source (e.g., field lens 20) enters the panel and is modulated according to the transmission characteristics of the display element 32. The panel 30 is driven on a row at a time basis by scanning the row conductors 36 sequentially with a selection pulse signal so as to turn on each row of TFTs in turn in a respective row addressing period, and applying data (video) signals to the column conductors 38 for each row of display element in turn as appropriate and in synchronism with gating signals so as to build up over one field a complete display picture. Using one row at a time addressing, all TFTs 34 of the addressed row are switched on for a period determined by the duration of the selection pulse signal, which corresponds to less than an applied video signal line period, during which the data information signals are transferred from the column conductors 38 to the display elements 32. Upon termination of the selection signal, the TFTs 32 of the row are turned off for the remainder of the field time thereby isolating the display elements from the conductors 38 and ensuring the applied charge is stored on the display elements until the next time they are addressed, usually the next field period.
The row conductors 36 are supplied successively with selection pulse signals by a row drive circuit 50 comprising a digital shift register controlled by regular timing pulses from a processor 52. For a major part of the intervals between selection signals, the row conductors 36 are supplied with a substantially constant reference potential, e.g., zero volts, by the row drive circuit 50 to hold the TFTs 34 in their off state. Video information signals are supplied to the column conductors 38 from a column drive circuit 54 of conventional form comprising one or more shift register/sample-and-hold circuits. The column drive circuit 54 is supplied with video signals and timing pulses from the processor 52 in synchronism with row scanning to provide serial to parallel conversion appropriate to the row at a time addressing of the panel.
The processor 52 controls the sets of LEDs 12, 14 and 16 to be illuminated during the whole of the respective color sub-fields. In order to compensate for artifacts that occur due to the inappropriate gray scale level caused by the changing of the gray scale level for the previous color, the processor 52 pre-processes the video signal. In particular, the processor 52 measures a first determined difference and a first direction of the change in the gray scale level for the preceding color to the current color. Then if first direction is an increase in the gray scale level, the processor increases the gray scale level for the current color by an amount which is a first predetermined factor of the first determined difference. Alternatively, if the first direction is a decrease in the gray scale level, the processor 52 decreases the gray scale level for the current color by an amount which is a second predetermined factor of the first determined difference. In a preferred embodiment, the first and second predetermined factors are predetermined percentages of the first determined difference. This is shown in
In the above embodiment of the invention, due to the correction algorithm, the gray level can become less than zero or more than a maximum allowable value. These conditions should be avoided by the use of, for example, clipping.
The above embodiment of the invention considers only the effect of the preceding sub-field gray scale level on the current sub-field gray scale level. However, the gray scale level of the ensuing sub-field may also be taken into consideration. In particular, a second direction and a second difference may be determined between the gray scale level of the current sub-field and the gray scale level of the ensuing sub-field. Then the gray scale level of the current sub-field is increased or decreased based on a predetermined factor of a combination of the first and second directions and the first and second determined differences.
It should be noted that color-sequential direct view LCD's can be realized on a fast LC effect, such as the optically compensated bend (OCB) effect. The correction algorithm of the subject invention is particularly applicable to these types of LCD displays.
While the above description is based on the use of LED's as the light source, it should be understood that other light sources are applicable, e.g., fluorescent lamps.
In addition to the above-described correction algorithm, the duration of the sub-fields may be varied for the different colors depending on the image content. For example, if a certain picture to be displayed is predominantly green, then the duration of the green sub-field may be prolonged at the expense of the duration of the red and blue sub-fields. This further increases the brightness of the display.
Although this invention has been described with reference to particular embodiments, it will be appreciated that many variations will be resorted to without departing from the spirit and scope of this invention as set forth in the appended claims. The specification and drawings are accordingly to be regarded in an illustrative manner and are not intended to limit the scope of the appended claims.
In interpreting the appended claims, it should be understood that:
a) the word “comprising” does not exclude the presence of other elements or acts than those listed in a given claim;
b) the word “a” or “an” preceding an element does not exclude the presence of a plurality of such elements;
c) any reference signs in the claims do not limit their scope;
d) several “means” may be represented by the same item or hardware or software implemented structure or function;
e) any of the disclosed elements may be comprised of hardware portions (e.g., including discrete and integrated electronic circuitry), software portions (e.g., computer programming), and any combination thereof;
f) hardware portions may be comprised of one or both of analog and digital portions;
g) any of the disclosed devices or portions thereof may be combined together or separated into further portions unless specifically stated otherwise; and
h) no specific sequence of acts is intended to be required unless specifically indicated.
Filing Document | Filing Date | Country | Kind | 371c Date |
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PCT/IB06/53480 | 9/25/2006 | WO | 00 | 3/19/2008 |
Number | Date | Country | |
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60722669 | Sep 2005 | US | |
60751425 | Dec 2005 | US |