The present invention relates to a communication apparatus and a data exchange method, and more particularly relates to a communication apparatus and a data exchange method for communication performed using a plurality of communication systems.
Heretofore, implementation utilizing a built-in memory adjacent to the CPU has been commonly used as an approach to increase the communication speed in communication devices (e.g., Patent Literature 1). This approach can increase the communication speed by storing a specific communication control program or processing data desired to be processed at a higher speed in a built-in memory adjacent to the CPU and thus minimizing the time loss associated with memory access. This approach is a technique similar to instruction cache or data cache in that a memory adjacent to the CPU is utilized. This approach, however, is different from instruction cache or data cache in that the designer of the communication device specifies applications and in that addresses are statically assigned in general.
In addition, along with advancements in functionality of communication devices in recent years, communication devices each capable of supporting a plurality of communication systems such as wireless LAN, GSM, UMTS, and LTE have become common. In such communication devices with advanced functionality, the number of programs and the amount of data to be stored in a built-in memory increase as the number of supporting communication systems increases.
PTL 1
Japanese Patent Application Laid-Open No. 2001-195261.
In the related art devices, a built-in memory and a CPU are integrated in the same LSI. For this reason, the related art devices involve a problem in that the production costs of the LSI increase as the number of programs and the amount of data to be stored in the built-in memory increase. In addition, the capacity of a built-in memory increases with an increase in the number of programs and the amount of data to be stored in the built-in memory, which in turn leads to a problem in that the communication speed of the entire system decreases.
It is an object of the present invention to provide a communication apparatus and a data exchange method each capable of avoiding an increase in the production costs and a decrease in the communication speed of the entire system associated with advancements in functionality.
A communication apparatus according to an aspect of the present invention is an apparatus capable of performing communication using a plurality of communication systems, the apparatus including: a first storage section that stores therein, for each of the communication systems, control data used for controlling communication performed using each of the communication systems; a second storage section that allows for reading and writing of the control data from and to the second storage section at a higher speed than the first storage section; a control section that reads from the first storage section, the control data of a communication system to be used, and stores the read control data in the second storage section, and that replaces, when switching between communication systems to be used is performed, the control data of the communication system used before the switching and stored in the second storage section with the control data of the communication system used after the switching and stored in the first storage section; and a communication section that performs communication using a communication system controllable by the control data stored in the second storage section.
A data exchange method according to an aspect of the present invention is a method in a communication apparatus capable of performing communication using a plurality of communication systems, the method including: reading control data of a communication system to be used from a first storage section that stores therein, for each of the communication systems, control data used for controlling communication performed using each of the communication systems; storing the control data read from the first storage section in a second storage section that allows for reading and writing of the control data from and to the second storage section at a higher speed than the first storage section; and replacing, when switching between communication systems to be used is performed, the control data of the communication system used before the switching and stored in the second storage section with the control data of the communication system used after the switching and stored in the first storage section.
According to the present invention, it is possible to avoid an increase in the production costs and a decrease in the communication speed of the entire system associated with advancements in functionality.
Hereinafter, an embodiment of the present invention will be described in detail with reference to the accompanying drawings.
In
Communication A connection section 101 is connected to a communication counterpart and performs communication using the communication system of communication A in accordance with control performed by communication A control section 103.
Communication B connection section 102 is connected to a communication counterpart and performs communication using the communication system of communication B in accordance with control performed by communication B control section 104.
Communication A control section 103 controls communication A connection section 101 in accordance with an instruction from CPU 105. Specifically, communication A control section 103 uses data or a program for communication A stored in built-in memory 106 and thereby controls communication performed using communication A. The data or programs for communication A herein include shared functional data and shared functional programs shared between communication A and communication B, in addition to control data for communication A and a control program for communication A. The control data for communication A is used for controlling communication performed using communication A.
Communication B control section 104 controls communication B connection section 102 in accordance with an instruction from CPU 105. Specifically, communication B control section 104 uses data or a program for communication B stored in built-in memory 106 and thereby controls communication performed using communication B. The data or programs for communication B herein include shared functional data and shared functional programs shared between communication A and communication B, in addition to control data for communication B and a control program for communication B. The control data for communication B is used for controlling communication performed using communication B.
CPU 105 instructs communication A control section 103 to control communication A connection section 101. In addition, CPU 105 instructs communication B control section 104 to control communication B connection section 102. Moreover, CPU 105 instructs external memory control section 107 to store data or a program in external memory 108 or to read data or a program from external memory 108.
Specifically, CPU 105 instructs external memory control section 107 to read from external memory 108, data or a program for the communication system to he used. In addition, when switching between communication systems to be used is performed, CPU 105 instructs external memory control section 107 to read from built-in memory 106, data for the communication system used before the switching and to store the read data in external memory 108. Moreover, when switching between communication systems to he used is performed, CPU 105 instructs external memory control section 107 to read from external memory 108, data for the communication system to he used after the switching and to store the read data in built-in memory 106. More specifically, when switching between communication systems to be used is performed, CPU 105 performs control to replace data stored in built-in memory 106 and also to exchange data between built-in memory 106 and external memory 108.
Built-in memory 106 is a memory adjacent to CPU 105 and stores therein data or a program read from external memory 108 by external memory control section 107. Built-in memory 106 allows for reading and writing of data or a program from and to built-in memory 106 at a higher speed than external memory 108.
External memory control section 107 reads data or a program stored in external memory 108 from external memory 108 and stores the read data or program in built-in memory 106 in accordance with an instruction from CPU 105. In addition, external memory control section 107 stores data stored in built-in memory 106 in external memory 108 in accordance with an instruction from CPU 105. As a result, data stored in external memory 108 is updated.
External memory 108 is a memory connected to the outside of LSI 150 and stores therein data and programs used in communication A and communication B for each communication system.
Next, a description will be given of operation of communication apparatus 100 with reference to
CPU 105 includes communication selection control ft notion 160, communication application 170, and built-in memory control function 180, as a software function. Accordingly, the operation of CPU 105 will be described with reference to
Mobile communication as illustrated in
Referring to
Next, CPU 105 performs a communication control operation using built-in memory 106 (step ST 203) when executing a communication application in communication application 170 (step ST 202). In addition, CPU 105 performs an application operation riot related to communication control, using external memory 108 (step ST204) when executing a communication application in communication application 170 (step ST 202). Note that, a description will be :hereinafter provided regarding how built-in memory 106 and external memory 108 are selectively used when a communication application is executed.
Communication A control section 103 provides CPU 105 with a communication status report (step ST 205).
Communication B control section 104 provides CPU 105 with a communication status report (step ST 206). Upon receipt of these reports, CPU 105 finds out radio wave conditions or the like of communication A and communication B, using communication selection control function 160.
CPU 105 determines, when communication apparatus 100 continues moving and arrives at the position denoted by Y2 in
Next, CPU 105 uses communication selection control function 160 and thereby controls communication A control section 103, which has been used up to this point, to stop communication (step ST208). As a result, communication A control section 103 blocks communication data.
Moreover, CPU 105 uses communication selection control function 160 and thereby notifies built-in memory control function 180 of a switching request for built-in memory 106 (step ST209).
Next, CPU 105 uses built-in memory control function 180 and thereby performs processing to write back control data stored in built-in memory 106 to external memory 108 (step ST210).
Next, CPU 105 performs rewrite processing for built-in memory 106 by data transfer using built-in memory control function 180 (step ST211). Note that, this rewrite processing will be described hereinafter.
In addition, upon completion of data transfer in step ST211, built-in memory control function 180 provides CPU 105 with a built-in memory switching completion report (step ST212). In addition, CPU 105 receives the built-in memory switching completion report, using communication selection control function 160.
Next, CPU 105 uses communication selection control function 160 and thereby controls communication B control section 104 to start communication (step ST213).
Next, communication B control section 104 receives communication data of communication B via communication B connection section 102 (illustration is omitted in
In addition, CPU 105 uses communication application 170 and thereby executes a communication application while receiving communication data (step ST215). Meanwhile, CPU 105 executes a communication control operation using built-in memory 106 (step ST216). In addition, CPU 105 uses external memory 108 and thereby executes an application operation not related to communication control (step ST217).
Next, a description will he provided with reference to
External memory 108 stores therein in the order illustrated in
Furthermore, the program regions of external memory 108 are regions where CPU 105 performs only reading. Meanwhile, the data regions of external memory 108 are regions where CPU 105 performs reading and rewriting. Moreover, the shared functional region of external memory 108 is a region for storing programs and data shared between a period under the control of communication A and a period under the control of communication B.
in executing a communication application in step ST202 in
Moreover, during data transfer to external memory 108 in step ST210 of
Next, a description will be provided with reference to
It should he noted that, since shared functional programs and data 413 are sharable between communication A and communication B, shared functional programs and data 413 remain stored in built-in memory 106 and not replaced, however, when the communication system to he used is switched from communication A to communication B.
In addition, when a communication application is executed in step ST215 in
Instead, shared functional programs and data 413, communication B control data 424, and communication B control program 425, which are stored in built-in. memory 106, are used. The reason behind this is also to achieve an increase in the communication speed of communication B by using built-in memory 106 during communication performed using communication B as in the case of communication performed using communication A.
As is apparent from a comparison between
Accordingly, in this embodiment, a program and data to be stored in the built-in memory are replaced in accordance with switching between communication systems. As a result, according to this embodiment, it is possible to avoid an increase in the production costs and a decrease in the communication speed of the entire system associated with advancements in functionality, and also to achieve a decrease in the CPU load.
Note that, although switching between two kinds of communication systems, which are communication A and communication B, is performed in this embodiment, the present invention is by no means limited to this configuration, and switching between three or more kinds of optional communication systems can be performed.
Moreover, one each of a CPU, a built-in memory, and an external memory is provided in the present embodiment. However, the present invention is by no means limited to this configuration, and any number of CPUs, built-in memories, and external memories can be provided.
In addition, an address assignment method other than the one described in this embodiment can he used for the built-in memory and external memory.
The disclosure of the specification, the drawing, and the abstract of Japanese Patent Application No. 2011-51613, filed on Mar. 9, 2011, is incorporated herein by reference in its entirety.
The communication apparatus and data exchange method according to the present invention are suitable for performing communication using a plurality of communication systems in particular.
Number | Date | Country | Kind |
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2011-051613 | Mar 2011 | JP | national |
Filing Document | Filing Date | Country | Kind | 371c Date |
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PCT/JP2012/001643 | 3/9/2012 | WO | 00 | 8/29/2013 |