The preferred embodiments of the present invention are described in detail below with reference to the drawings.
The first communication device 101 comprises a transmission control device 111 and a first delay device 112. The first communication device 101 transmits redundant data to the second communication device 102, using a first line 103 and a second line 104.
The transmission control device 111 transmits first data to the first line 103. The first delay device 112 delays the first transmitting data by a prescribed time and transmits the delayed transmitting data as second data to the second line 104.
The second communication device 102 comprises a second delay device 121 and a reception control device 122. The second communication device 102 receives the first and second transmitting data from the first line 103 and the second line 104.
The second delay device 121 delays the first transmitting data inputted from the first line 103 by the prescribed time and outputs the delayed receiving data. The reception control device 122 selects one of the second transmitting data inputted from the second line 104 and the delayed receiving data outputted from the second delay device 121 and outputs it.
Setting both of the delay times of the first delay device 112 and the second delay device 121 to the same time, two pieces of redundant data are transferred with shifted by the prescribed time over the first line 103 and the second line 104. The reception control device 122 can simultaneously receives those two pieces of data. Therefore, even when there are simultaneously failures on the first line 103 and the second line 104, the second communication device 102 can normally obtain one of the two pieces of data transmitted from the first communication device 101 without failing.
Each of the first communication device 101 and the second communication device 102 correspond, for example, to one of the node devices 201-1˜201-4 which is described with reference to
The transmission control device 111, the first delay device 112, the second delay device 121 and the reception control device 122 correspond, for example, to the transmission control unit 413, buffer 411, buffer 412 and reception control unit 414, respectively.
According to the present invention, in addition to the fact that line failures can be coped with by the redundant configuration of two lines, by shifting the transmitting/receiving timing between lines, normal data can be obtained in a shorter time than a re-transmitting process when there is a failure in a receiving node.
Since there is no need to use expensive components unlike a system for receiving the same data over one line a plurality of times, the cost of the communication device can be suppressed.
For example, in case of a vehicle-mounted system, each node device is connected to a steering wheel control circuit, a brake control circuit and the like, and transmits/receives data necessary for its control. In the following description, node devices on the data transmitting and receiving sides are called “transmitting node device” and “receiving node device”, respectively.
However, as shown in data signals 303 and 304, if the timing the data is transmitted to Ach and Bch is shifted, the same data can be transmitted with different phases. Thus, even when the data signal 303 of Ach fails due to the power noise 305, the data signal 304 of Bch which is not affected by the power noise 305 can be selected as normal data.
Each of the buffers 411 and 412 is made of a flip-flop circuit or a shift register circuit. They delay and output input signals. The transmission control unit 413 branches transmitting data into two pieces of data and outputs them. The reception control unit 414 selects and outputs one of the two pieces of receiving data.
The micro-computer 415 comprises a processor 421, memory 422, interfaces (INF) 423 and 424 and an analog/digital converter 425. The interface 424 and the analog/digital (A/D) converter 425 are connected to a peripheral circuit 401 and a sensor 402, respectively.
In the case of a vehicle-mounted system, the peripheral circuit 401 corresponds, for example, to a steering wheel control circuit, a brake control circuit and the like, and the sensor 402 corresponds, for example, to a distance sensor such as a laser device, a radar device and the like. The peripheral circuit 401 controls a steering wheel, a brake and the like, according to control signals from the micro-computer 415. The sensor 402 outputs analog signals including the distance information of an object in the neighborhood of a vehicle.
When transmitting data, the node device 201-i performs the following software (SW) process and a hardware (HW) process and transmits data to Ach and Bch.
The analog/digital converter 425 converts an analog signal inputted from the sensor 402 to a digital signal. The processor 421 performs an operation process using the digital signal to calculate a value to be mapped in a communication frame and transfers a write request to the interface 423.
In response to the write request from the processor 421, the interface 423 updates the value of the transmission register 431. The transmission control unit 413 maps the value of the transmission register 431 in two communication frames as transmitting data. Then, the transmission control unit 413 transmits one of the communication frames and the other to Ach and the buffer 411, respectively. The buffer 411 transmits the communication frame to Bch after delaying it by a prescribed time ΔT. Thus, as shown in
When receiving data, the node device 201-i selects normal data after adjusting the phase difference between the lines. In this case, the buffer 412 transfers the communication frame from Ach to the reception control unit 414 after delaying it by ΔT.
Thus, as shown in
Then, the node device 201-i performs the following HW and SW processes.
The reception control unit 414 selects one of the communication frame from the buffer 412 and the communication frame from Bch, and writes receiving data included in the selected communication frame in the reception register 432 of the interface 423.
For example, even when there are simultaneous errors in the two lines of Ach and Bch due to power noise or the like in the node device 201-i, both of the communication frames including the same data never fail because the communication frame of Bch delays by ΔT from the communication frame of Ach, including the same data. Therefore, only one of the two aligned communication frames includes an error, and the other includes normal data.
Thus, the reception control unit 414 verifies the receiving data of both the communication frames, for example, by a cyclic redundancy check (CRC) to select normal data, and transfers the normal data to the interface 423. If both are normal, the data of a predetermined line is transferred to the interface 423.
The processor 421 transfers a read request to the interface 423. Then, the interface 423 transfers the value of the reception register 432 to the processor 421.
The processor 421 performs an operation/priority process using the value transferred from the interface 423 and transfers the process result to the interface 424 as a control signal. The interface 424 outputs the control signal to the peripheral circuit 401.
In the communication specification between nodes, the total time of the HW and SW processes at the time of data reception must be within one cycle. Taking into consideration the time restrictions of the HW and SW processes, it is considered to be appropriate that the phase difference ΔT between lines is at shortest approximately one frame (100 μs) and at longest approximately half a cycle (2.5 ms). If the re-transmitting process of data is performed when there is a failure, data delays by at lest one cycle (5 ms). However, if ΔT=2.5 ms, normal data can be obtained with the delay of at longest half a cycle. Therefore, the restoration time can be shortened.
In
The receiving node device 201-1 simultaneously receives the respective data signals of Ach and Bch. Then, at a time t1, the HW process of the communication frame N1 starts and then the SW process is performed.
The receiving node device 201-1 receives the data signal of Bch one frame after the data signal of Ach. Then, at a time t2, the HW process of the communication frame N1 starts and then the SW process is performed.
The receiving node device 201-1 receives the data signal of Bch half a cycle after the data signal of Ach. Then, at a time t3, the HW process of the communication frame N1 starts and then the SW process is performed.
Although in the configuration shown in
Number | Date | Country | Kind |
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2006-178762 | Jun 2006 | JP | national |