Patent Application
20160065504
The present disclosure relates to a communication system which performs multiplexing data communication and an electronic component mounting device which transmits data relating to board mounting work using the communication system.
In the related art, as a communication system using multiplexing, a technique relating to a communication system is disclosed in which multiple subscriber-side communication devices and one station-side communication device are connected to each other (for example, PTL 1). The communication system disclosed in PTL 1 employs time compression multiplexing (TCM) in which uplink information from the subscriber-side communication device to the station-side communication device and downlink information from the station-side communication device to the subscriber-side communication device are subjected to time division, and are transmitted through the same transmission line.
In addition, as a communication system using multiplexing, for example, there is provided a time division multiplexing system (TDM: Time Division Multiplexing) in which digital signals input from multiple input ports are multiplexed so as not to temporally overlap each other and are transmitted in one direction using one transmission line. The communication system in the related art which employs time division multiplexing will be described with reference to
PTL 1: JP-A-2003-309579
In the communication system 300 illustrated in
However, even if the MUX 302 starts the data transmission with the respective electric devices 304A to 304C at the desired transmission rate, in practice, the actual data 305A to 305C are asynchronously and intermittently output from the electric devices 304A to 304C. The reason is that the frequency or the like with which the respective electric devices 304A to 304C output the actual data 305A to 305C depends on device specifications or operating conditions of the electric devices 304A to 304C to be mounted thereon. As a result, for the transmission line 307, if the time that actual data 305A to 305C are not output from the respective electric devices 304A to 304C is long due to the fact that a fixed time is allocated to each of the electric devices 304A to 304C, the amount of time during which the transmission line 307 does not perform data transmission at the set communication speed (3 Gbps) increases. That is, there is a problem in that the transmission line 307 is not effectively utilized due to the increased time of no data transmission.
The disclosure is made in view of the above-described problem, and an object thereof is to provide a communication system that uses multiplexing in which efficient data transmission is performed in a transmission line, and to provide an electronic component mounting device using the communication system.
A communication system relating to a technique disclosed in view of the above-described problem includes: multiple electric devices that output actual data in which a start bit indicating data starting is set; a data extraction section that is connected to the multiple electric devices, and that extracts the actual data based on the start bit; multiple first buffers that are disposed corresponding to each of the multiple electric devices, and that accumulate the actual data extracted by the data extraction section corresponding to the multiple electric devices; a second buffer that sequentially selects one of the multiple first buffers, and that accumulates the actual data accumulated in the selected first buffer together with identification information of the electric device which outputted the actual data; and a transmitter-side multiplexing device that inputs the actual data and the identification information from the second buffer and transmits the actual data and the identification information as multiplexed data.
In addition, an electronic component mounting device relating to a technique disclosed transmits data relating to work for mounting an electronic component on a board using the communication system relating to the technique disclosed. That is, the data is transmitted using the communication system including: the multiple electric devices that output the actual data in which the start bit indicating the data starting is set; the data extraction section that is connected to the multiple electric devices, and that extracts the actual data based on the start bit; the multiple first buffers that are disposed corresponding to each of the multiple electric devices, and that accumulate the actual data extracted by the data extraction section corresponding to the multiple electric devices; the second buffer that sequentially selects one of the multiple first buffers, and that accumulates the actual data accumulated in the selected first buffer together with identification information of the electric device which outputted the actual data; and the transmitter-side multiplexing device that inputs and the actual data and the identification information from the second buffer and transmits the actual data and the identification information as the multiplexed data.
According to a communication system and an electronic component mounting device which relate to a technique disclosed, a transmission line is enabled to perform efficient data transmission in the communication system that uses multiplexing.
Hereinafter, an embodiment of the disclosure will be described with reference to the drawings. First, as an example of a device to which a communication system according to the disclosure is applied, an electronic component mounting device (hereinafter, sometimes abbreviated to “mounting device”) will be described.
As illustrated in
The device body 11 includes the respective display devices 13 in both end portions in the Y-axis direction on one end side in the X-axis direction. The respective display devices 13 are touch panel-type display devices, and display information relating to the work for mounting the electronic component. In addition, the device body 11 includes the supply devices 15 and 16 which are mounted so as to interpose the device body 11 therebetween from both sides in the Y-axis direction. The supply device 15 is a feeder-type supply device, and has multiple tape feeders 15A in which various electronic components are accommodated in a state taped and wound around a reel. The supply device 16 is a tray-type supply device, and has multiple component trays 16A (refer to
The supply devices 15 and 16 are respectively connected to each side surface portion in the Y-axis direction of the base 20. The respective supply devices 15 and 16 are detachably attached to the base 20 in order to cope with a lack of the electronic components to be supplied or a change in types of the electronic components and the like. The conveyance device 21 is disposed substantially in the center of the base 20 in the Y-axis direction, and has a pair of conveyor belts 31, a board holding device 32 held in the conveyor belts 31, and an electromagnetic motor 33 for moving the board holding device 32. The board holding device 32 holds the circuit board 17. An output shaft of the electromagnetic motor 33 is connected to the conveyor belts 31 so as to drive the conveyor belts 31. For example, the electromagnetic motor 33 is a servo motor which can accurately control a rotation angle. With the conveyance device 21, the conveyor belts 31 perform a turning operation based on the driving of the electromagnetic motor 33, thereby causing the board holding device 32 and the circuit board 17 to move in the X-axis direction.
The mounting head 22 has a suction nozzle 41 for picking up the electronic component, on a lower surface facing the circuit board 17. Negative air pressure and positive air pressure are supplied to the suction nozzle 41 by a positive and negative pressure supply device 42 illustrated in
In addition, the mounting head 22 has two imaging devices of a component camera 46 and a mark camera 47. For example, the component camera 46 and the mark camera 47 have an incorporated imaging element such as a CMOS sensor, a CCD sensor, and the like. The component camera 46 is disposed at a position where an end portion of the suction nozzle 41 can be imaged from a lateral surface side (for example, lateral surface side when viewed in the Y-axis direction in
In addition, the mounting head 22 is moved to any desired position on the base 20 by the moving device 23 illustrated in
The Y-axis-direction slide mechanism 52 has a Y-axis slider 58 disposed on a side surface of the X-axis slider 54 so as to be movable in the Y-axis direction and an electromagnetic motor 60 (refer to
As illustrated in
As illustrated in
The image board 84 illustrated in
In contrast, the controller 82 processes each data received by the optical wireless device 91. For example, the controller 82 outputs a control signal for controlling the electromagnetic motor 43A based on the processing result to the optical wireless device 91 via the drive control board 85. The optical wireless device 92 transmits the control signal transmitted from the optical wireless device 91 to the nozzle raising and lowering device 43. The electromagnetic motor 43A is operated based on the control signal. In addition, for example, the controller 82 transmits the control signal for changing a display of the display device 13 to the display device 13 via the I/O board 86 and the optical wireless devices and 92. As described above, various information transmitted and received between the control device 80 and the respective devices other than the control device 80 is transmitted and received through the transmission line 95 as frame data multiplexed by time division multiplexing (TDM: Time Division Multiplexing). A data transmission rate of the time division multiplexing communication between the optical wireless devices 91 and 92 is 3 Gbps, for example.
Described below is the preferred communication system applied to the mounting device 10 which mounts the electronic components using the above-described time division multiplexing communication system. A multiplexing communication system 110 illustrated in
The optical wireless device 92 illustrated in
Data D1 such as the servo control information output from the electromagnetic motor 43A is input to the input port 121A of the multiplexing device 121 via the connector 22A. A data transmission rate of the electromagnetic motor 43A is 125 Mbps, for example. In addition, data D2 such as the I/O signal output from the position detection sensor 45 is input to the input port 121B of the multiplexing device 121 via the connector 22B. A data transmission rate of the position detection sensor 45 is several kbps, for example. Data D3 such as the image data output from the component camera 46 is input to the input port 121C of the multiplexing device 121 via the connector 22C. Data D4 such as the image data output from the mark camera 47 is input to the input port 121C of the multiplexing device 121 via the connector 22D. A data transmission rate of each of the component camera 46 and the mark camera 47 is 1.5 Gbps, for example.
A buffer (not illustrated) is disposed in the respective input ports 121A to 121C, and the data D1 to D4 are temporarily accumulated therein. The multiplexing device 121 receives the input of the data D1 to D4 accumulated in the buffer of the respective input ports 121A to 121C at a fixed time division (time slot). The multiplexing device 121 multiplexes the data D1 to D4 input to the respective input ports 121A to 121C into a time-divided frame 200, and transmits the frame 200 through the transmission line 95.
Here, in cases in which the data D1 to D4 are not input in spite of the fact that the fixed time is allocated to each of the input ports 121A to 121C, the multiplexing device 121 performs data transmission for the data region allocated to the respective input ports 121A to 121C within a time-divided data region of the frame 200 without the data D1 to D4 being included. Therefore, if the time during which the data D1 to D4 are not transmitted from the respective devices 43A, 45, 46, and 47 becomes long, the time during which the transmission line 95 does not perform data transmission at the set communication speed (for example, 3 Gbps) increases.
In addition, in a case of the data D1 to D4, transmission frequency or allowable delayed time varies depending on the applicable communication system. For example, the control device 80 (refer to
In contrast, for example, if the electronic component is held by the suction nozzle 41 from the supply devices 15 and 16 during the mounting work, the component camera 46 outputs the data D3 after performing image processing. In addition, for example, when it is necessary to confirm a reference position mark of the circuit board 17, the mark camera 47 outputs the data D4 after performing image processing. That is, the data D3 and D4 have different data transmission frequencies with which the data is transmitted at the timing according to each work process and the data is not transmitted at the other timings.
In addition, based on the data D3 and D4 output from the respective cameras 46 and 47, the controller 82 determines a position of the electronic component held by the suction nozzle 41 (refer to
In addition, compared to the electromagnetic motor 43A or the position detection sensor 45, the respective cameras 46 and 47 have a higher data transmission rate and a higher ratio at which the data D3 and D4 occupy communication capacity of the transmission line 95. Accordingly, the transmission line 95 can perform more efficient data transmission by optimizing the data transmission of the data D3 and D4. Therefore, the optical wireless device 92 according to the present embodiment includes data extraction sections 123A and 123B, first buffers 125A and 125B, a second buffer 126, and a control section 128, and is configured to accumulate both the data D3 and D4 in the first and second buffers 125A, 125B, and 126 so as to output the data D3 and D4 to one input port 121C.
The data extraction sections 123A and 123B illustrated in
The data extraction section 123A outputs the extracted data D3 to the first buffer 125A. In addition, the data extraction section 123B outputs the extracted data D4 to the first buffer 125B. For example, the second buffer 126 is a first-in-first-out (FIFO) buffer, and sequentially reads the data D3 and D4 accumulated in the first buffers 125A and 125B. For example, if a write request signal of the first buffers 125A and 125B is input, the control section 128 performs a process of reading the data D3 and D4 from the first buffers 125A and 125B which make a write request to the second buffer 126.
For example, the control section 128 performs data writing from the first buffer 125A to the second buffer 126 until the end bit E1 is detected. In this manner, one data D3 is written to the FIFO second buffer 126 as a one continuous block of data. In addition, if the write request signal of the other first buffer 125B is input when the write process is completed from the first buffer 125A, the control section 128 performs the write process from the first buffer 125B to the second buffer 126. Alternatively, if the write request signal of the first buffer 125B is not input and the write request signal is continuously input from the first buffer 125A, the control section 128 continuously performs the process of writing from the first buffer 125A. In this manner, the control section 128 sequentially processes each write request signal of the first buffers 125A and 125B.
Priority may be set in the write request of the first buffers 125A and 125B. For example, a configuration may be adopted in which the priority is set in the write request signal of the first buffers 125A and 125B depending on the type of the data D3 and D4 or the transmission frequency during the work process, and in which the control section 128 performs a write process or an interruption process of the data D3 and D4 in accordance with the priority. Alternatively, a configuration may be adopted in which a processing circuit is disposed in the second buffer 126 so that the second buffer 126 sequentially monitors the write request signal of the first buffers 125A and 125B.
The control section 128 divides the data D3 into multiple divided data DD, and stores the multiple divided data DD. In addition, the control section 128 divides and stores the data, and adds an identification information ID and start bit information SI to the head of the divided data DD. The identification information ID represents information indicating that the divided data DD is any data of the data D3 and D4, that is, identification information P, M indicating from which device out of the component camera 46 and the mark camera 47 the divided data comes. Therefore, the information P indicating that the divided data is obtained from the component camera 46 is stored in the identification information ID stored in the data region of the addresses AD1 to AD5.
In addition, the start bit information SI is information indicating in which divided data DD the start bits S1 and S2 of each of the data D3 and D4 are included. For example, the data D3 is divided into and stored in the addresses AD1 to AD5, and a start bit S1 head portion is included in the divided data DD of the address AD1. Therefore, information indicating that the start bit S1 is stored (“S1 present” in the drawing) is stored in the start bit information SI stored in the data region of the address AD1. In addition, information indicating that the start bit S1 is not stored (“Si absent” in the drawing) is stored in the start bit information SI of the address AD2 to AD5 which store the other divided data. Incidentally, the control section 128 sets blank data (for example, all bit values show “0”) which is not processed on the receiver-side in the data region excluding the end bit E1 for the divided data DD stored in the address AD5, which is the tail address out of the addresses AD1 to AD5 in which the divided data DD is stored.
In addition, during the time T8 to T11 illustrated in
In addition, during the time T11 to T14 illustrated in
The data D3 and D4 accumulated in the second buffer 126 are output to the input port 121C of the multiplexing device 121 illustrated in
In addition, for the I/O signal, four bits, that is the 6th to 9th bits, are secured as the bit width per one frame 200, and the 6th bit for a fast I/O signal and the 8th bit for a slow I/O signal are set. For example, in a case of the 6th bit for the fast I/O signal, a signal of the position detection sensor 45 which requires a fast response time is transmitted per every frame 200. In addition, the 7th bit for the slow I/O signal represents the other I/O signal in which delayed data is allowed compared to the position detection sensor 45, for example, a confirmation signal of lamp lighting. In the frame 200, one bit width is secured for multiple lamps, thus, the signal of each lamp is sequentially set in the 8th bit of the multiple frames 200, and is transmitted. The multiplexing device 121 performs the error correction process by providing parity symbols after each bit of the 6th bit and the 8th bit. In addition, classification of the above-described I/O signal is an example, and a configuration may be adopted in which the slow I/O signal is classified in a hierarchical manner (slow speed, extremely slow speed, or the like) so as to sequentially transmit the signal of each I/O device, for example.
The data (the identification information ID, the start bit information SI, and the divided data DD) relating to the data D3 and D4 of the second buffer 126 is set in the remaining 70 bits, that is the 10th to 79th bits, of the frame 200. The multiplexing device 121 inputs the data relating to the data D3 and D4 of the second buffer 126 from the input port 121C, and transmits the data as the 10th to 79th bits of the frame 200. The multiplexing device 121 may include a circuit for performing the error correction process on the data D3 and D4, for example, a forward error correction process. In this case, a forward error symbol is included in the 10th to 79th bits of the frame 200. In addition, if the data relating to the data D3 and D4 is not accumulated in the second buffer 126, the multiplexing device 121 sets and transmits blank data to the 10th to 79th bits of the frame 200. In addition, the multiplexing device 121 sets and transmits blank data to the 10th to 79th bits of the frame 200 in a region excluding a region where the data (the identification information ID, the start bit information SI, and the divided data DD) relating to the data D3 and D4 is set. For example, the multiplexing device 121 sets blank data in the region remaining after the multiple divided data DD are set in the 10th to 79th bits.
The data D1 output from the electromagnetic motor 43A is output to the drive control board 85 from the output port 221A of the multiplexing device 221. In addition, the data D2 output from the position detection sensor 45 is output to the I/O board 86 from the output port 221B of the multiplexing device 221. In addition, the multiplexing device 221 outputs the data relating to the data D3 and D4, that is, the data from the 10th to 79th bits of the frame 200 illustrated in
Here, if the data D3 and D4 are not accumulated in the second buffer 126 when the transmitter-side optical wireless device 92 receives the input of the input port 121C, all the data of the 10th to 79th bits of the frame 200 become blank data. The control section 228 determines whether effective data (the identification information ID or the like) is included in the data output from the output port 221C of the multiplexing device 221 to the third buffer 222. For example, based on the identification information ID and the start bit information SI, the control section 228 detects the divided data DD, and stores the data ranging from the identification information ID to the divided data DD in the third buffer 222 as one data unit. In addition, if the identification information ID or the like is not detected, the control section 228 determines the data stored in the third buffer 222 as blank data and deletes the data.
Similarly to the second buffer 126 of the optical wireless device 92, the fourth buffer 223 is a first-in-first-out (FIFO) buffer, for example (refer to
The control section 228 regards the data ranging from the divided data DD which has the same identification information ID and in which the start bit information SI is set to the divided data DD in which the start bit information SI is subsequently set, as one data.
For example, when detecting that the start bit information SI of the address AD1 indicates “the start bit S1 present”, the control section 228 processes the data from the address indicating the start bit is present to the address immediately preceding an address indicating a different identification information ID and the start bit information SI to that of the subsequent address AD2, as one block of data. More specifically, the control section 228 detects that the identification information ID and the start bit information SI of the addresses AD2 to AD5 have the same value (“P” and “S1 absent”). Next, the control section 228 detects that the start bit information SI of the address AD6 indicates “the start bit S1 present”. In this case, the control section 228 determines that, out of the addresses AD1 to AD10, the addresses AD1 to AD5 represent one data D3.
The control section 228 performs control for continuously transmitting the divided data DD of the addresses AD1 to AD5 of the fourth buffer 223 to the fifth buffer 225A, based on that a value indicating “P” is set in the identification information ID. At this time, the control section 228 performs a process of removing the identification information ID and the start bit information SI from the data stored in the data region of the addresses AD1 to AD5, and transmits the multiple divided data DD to the fifth buffer 225A. In this manner, the data D3 rebuilt from the multiple divided data DD is stored in the fifth buffer 225A. According to this configuration, based on the value set in the identification information ID and the start bit information SI, the control section 228 can only select one data D3 (from the first start bit S1 to the end bit E1) from two data D3 continuously stored in the addresses AD1 to AD10 of the fourth buffer 223, and can rebuild the data D3 by outputting the data D3 to the fifth buffer 225A. In addition, the receiver-side does not detect and process the bit value (the start bit S1, the end bit E1, or the like), and the control section 228 can process the data D3 continuously transmitted as individual data.
If the control section 228 completes the write process, the image board 84A performs a process of reading the data D3 accumulated in the fifth buffer 225A. Accordingly, the image board 84A can perform the read process after the control section 228 completes the process of removing the identification information ID and the start bit information SI and each data D3 is reliably stored in the fifth buffer 225A. Similarly, based on the identification information ID and the start bit information SI, the control section 228 rebuilds the data D4 by outputting the data D4 to the fifth buffer 225B from the multiple divided data DD accumulated in the fourth buffer 223. The image board 84B performs the process of reading the data D4 accumulated in the fifth buffer 225B. In this manner, according to the communication system 110, the data D3 and D4 of the respective cameras 46 and 47 are transmitted to the data region of the frame 200 corresponding to the time slot allocated to the same input port 121C and output port 221C of the multiplexing devices 121 and 221. In addition, the optical wireless devices 91 and 92 temporarily divide the data D3 and D4 input from the cameras 46 and 47 into the divided data DD, accumulate the divided data DD in the second buffer 126 or the like, and transmit the divided data DD, thus, the receiver-side can rebuild and output the divided data DD. When the data D3 and D4 are written on each of the fifth buffers 225A and 225B from the fourth buffer 223, if the image boards 84A and 84B perform the read process for the fifth buffers 225A and 225B, the control section 228 performs timing adjustment such as performing the write process after a predetermined time elapses.
According to the present embodiment described above in detail, the following advantageous effects can be obtained.
<Advantageous Effect 1> The optical wireless device 92 illustrated in
<Advantageous Effect 2> The multiplexing device 221 of the optical wireless device 91 illustrated in
<Advantageous Effect 3> The control section 128 divides the data D3 and D4 accumulated in the first buffers 125A and 125B into the multiple data regions of the second buffer 126, and stores the data D3 and D4 as the divided data DD (refer to
The disclosure is not limited to the above-described embodiment and may be improved or modified in various ways within the scope not departing from the gist of the disclosure. For example, in the above-described embodiment, the optical wireless communication has been described as an example, but the disclosure is not limited thereto and can also be applied to wireless communication using other various electromagnetic waves such as infrared or visible light. In addition, the disclosure can be similarly applied to wired communication, for example, optical communication through optical fiber networks.
In addition, without being limited to the time division multiplexing system, the multiplexing communication between the optical wireless devices 91 and 92 may employ communication using other types of multiplexing, for example, such as frequency division multiplexing (FDM) and wavelength division multiplexing (WDM).
In addition, in the above-described embodiment, the data extraction sections 123A and 123B are individually disposed for each of the cameras 46 and 47. However, a configuration may be adopted in which one data extraction section processes the data D3 and D4 of the two cameras 46 and 47.
In addition, although not particularly described in the above-described embodiment, the data extraction sections 123A and 123B may be configured to include a programmable logic device, for example, field programmable gate array (FPGA) 140, and a circuit configuration may be reconfigured in accordance with a connected device (cameras 46 and 47 or the like). For example, as illustrated in
In addition, in the above-described embodiment, a configuration may be adopted in which the data D3 and D4 are accumulated in the second buffer 126 or the fourth buffer 223 without dividing the data D3 and D4. In addition, in the above-described embodiment, the electronic component mounting device 10 which mounts the electronic components on the circuit board has been described, but the disclosure is not limited to this and can be applied to an automatic machine or the like which is operated in various other production lines. For example, the disclosure may be applied to an automatic machine which carries out assembly work of secondary batteries (solar cells, fuel cells, or the like) and the like. In addition, without being limited to those which carry out mounting work or assembly work, the disclosure may also be applied to cutting machine tools, for example, as an automatic machine.
In addition, the configuration of the mounting device 10 according to the above-described embodiment is an example, and can be appropriately modified. For example, a configuration may be adopted which includes multiple moving devices 23 detachably attached to the device body 11. In addition, for example, a configuration may be adopted which includes multiple conveyor belts 31 (multiple lanes). In addition, for example, a configuration may be adopted in which multiple mounting devices 10 are connected to each other in the conveyance direction so as to be driven.
Incidentally, the component camera 46 and the mark camera 47 are provided as an example of the transmitter-side electric device; the image boards 84, 84A, and 84B are provided as an example of the receiver-side electric device; the optical wireless devices 91 and 92 are provided as an example of the transmitter-side and receiver-side multiplexing device; the multiplexing communication system 110 is provided as an example of the communication system; the first buffers 125A and 125B are provided as an example of the first buffer; the second buffer 126 is provided as an example of the second buffer; the third to fifth buffers 222, 223, 225A, and 225B are provided as an example of the receiver-side buffer; the memory of the connectors 22C and 22D is provided as an example of the information storage section; the start bits S1 and S2 are provided as an example of the start bit; the identification information ID is provided as an example of the identification information; the divided data DD is provided as an example of the divided data; and the start bit information SI is provided as an example of the start bit information.
22C, 22D: CONNECTOR; 46: COMPONENT CAMERA; 47: MARK CAMERA; 84, 84A, 84B: IMAGE BOARD; 91, 92: OPTICAL WIRELESS DEVICE; 110: MULTIPLEXING COMMUNICATION SYSTEM; 125A, 125B: FIRST BUFFER; 126: SECOND BUFFER; 222: THIRD BUFFER; 223: FOURTH BUFFER; 225A, 225B: FIFTH BUFFER; S1, S2: START BIT; ID: IDENTIFICATION INFORMATION; DD: DIVIDED DATA; SI: START BIT INFORMATION SI
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/JP2013/057921 | 3/20/2013 | WO | 00 |
