The present disclosure generally relates to superconducting devices, and more particularly, coupling qubits together.
Superconducting quantum computing is an implementation of a quantum computer using superconducting electronic circuits. Quantum computation utilizes quantum phenomena for information processing and communication. Various models of quantum computation and quantum simulation exist. The fundamental building block of a gate based quantum computer is the quantum bit (qubit). A qubit is a generalization of a bit that has two possible states, but due to its quantum nature it can be in a superposition of both states. A quantum gate is a generalization of a logic gate, however the quantum gate describes the transformation that one or more qubits will experience after the gate is applied on them, given their initial state.
There are many different implementations of quantum bits using superconducting circuits. A common element is typically the Josephson junction. A Josephson junction is a weak link between two superconducting electrodes that allows for dissipationless tunneling of Cooper pairs between the electrodes. Due to the relationship between the voltage and the tunneling current across the junction the Josephson junction can in some instances be viewed like a non-linear lossless inductor. One of the most successful implementations of a quantum bit is the so-called transmon qubit. A transmon qubit comprises a Josephson junction in parallel with a shunt capacitor, hence forming an anharmonic oscillator. The two states of the quantum bit is then taken as two lowest energy levels (called ground stated and first excited state) of the anharmonic oscillator. The energy difference between the two states corresponds to a frequency in the few GHz regime (often around 5 GHz). To read out the qubit state, a microwave signal is applied to the microwave readout cavity that is coupled (for instance through a coupling capacitance) to the qubit. The transmitted (or reflected) microwave signal goes through multiple thermal isolation stages and low-noise amplifiers that are used to block or reduce the noise and improve the signal-to-noise ratio. From the amplitude and/or phase of the returned/output microwave signal information about the qubit state can be inferred. The microwave signal carrying the quantum information about the qubit state is usually weak (e.g., on the order of a few microwave photons). To measure this weak signal, low-noise quantum-limited amplifiers (QLAs), such as Josephson amplifiers and travelling-wave parametric amplifiers (TWPAs), may be used as preamplifiers (i.e., first amplification stage) at the output of the quantum system to boost the quantum signal, while adding the minimum amount of noise as dictated by quantum mechanics, in order to improve the signal to noise ratio of the output chain. In addition to Josephson amplifiers, certain Josephson microwave components that use Josephson amplifiers or Josephson mixers such as Josephson circulators, Josephson isolators, and Josephson mixers can be used in scalable quantum processors.
The ability to include more qubits is salient to being able to realize the potential of quantum computers. Applicants have recognized that, to increase the computational power and reliability of a quantum computer, improvements can be made in two main dimensions. First, is the qubit count itself. The more qubits in a quantum processor, the more states can in principle be manipulated and stored. Second is low error rates, which is relevant to manipulate qubit states accurately and perform sequential operations that provide consistent results and not merely unreliable data. Thus, to improve fault tolerance of a quantum computer, a large number of physical qubits should be used to store a logical quantum bit. In this way, the local information is delocalized such that the quantum computer is less susceptible to local errors and the performance of measurements in the qubits' eigenbasis, similar to parity checks of classical computers, thereby advancing to a more fault tolerant quantum bit.
According to one embodiment, a resonator includes a coplanar waveguide (CPW) structure that includes a first end portion having a first width and configured to be coupled to a first qubit. There is a middle portion having a second width that is narrower than the first width. There is a second end portion having a third width that is wider than the second width and configured to be coupled to a second qubit.
In one embodiment, the first width is substantially equal to the third width.
In one embodiment, the middle portion of the CPW structure is folded.
In one embodiment, at least one of the first or second end portions has an S structure. The S structure may be around one or more bonding structures. At least one of the one or more bonding structures can be an under-bump metal (UBM).
In one embodiment, the first and third widths are based on a width that provides a capacitance and inductance of the first and second end portions, respectively, that increases a frequency of modes that are above a fundamental frequency of the CPW structure.
In one embodiment, the coupling between the first qubit and the first end portion is capacitive.
In one embodiment, a length of the first end portion and a length of the second end portion are each shorter than a length of the middle portion.
In one embodiment, an inductance of the middle portion is higher than an inductance of each of the first and second end portions. A capacitance of the middle portion may be lower than a capacitance of each of the first and second end portions.
In one embodiment, a first mode of the resonator is above a factor of 2 times a fundamental frequency of the resonator.
According to one embodiment, a quantum bus system, includes a first qubit and a second qubit. There is a CPW structure that includes a first end portion having a first width and coupled to the first qubit; a middle portion having a second width that is narrower than the first width; and a second end portion having a third width that is wider than the second width and coupled to the second qubit.
In one embodiment, the middle portion of the CPW structure is folded and at least of the first or second end portions has an S structure. The S structure may be around one or more bonding structures.
In one embodiment, the first and third widths are based on a width that provides a capacitance and inductance of the first and second end portions, respectively, that increases a frequency of modes that are above a fundamental frequency of the CPW structure.
In one embodiment, the coupling between the first qubit and the first end portion is capacitive.
In one embodiment, a length of the first end portion and a length of the second end portion are each shorter than a length of the middle portion.
In one embodiment, an inductance of the middle portion is higher than an inductance of each of the first and second end portions, and a capacitance of the middle portion is lower than a capacitance of each of the first and second end portions.
In one embodiment, a first mode of the resonator is above a factor of 2 times a fundamental frequency of the resonator.
According to one embodiment, a method of coupling qubits includes coupling a first end portion of a CPW structure to a first qubit. A second end portion of the CPW structure is coupled to a second qubit. A middle portion of the CPW structure is provided to have a width that is less than a width of the first end portion and a width of the second end portion.
In one embodiment, a frequency of modes that are above a fundamental frequency of the CPW structure is increased by adjusting a geometry of the first and second end portions of the CPW structure.
In one embodiment, the coupling between the first qubit and the first end portion is capacitive.
In one embodiment, a first mode of the CPW structure is configured to be a factor of at least 2 times a fundamental frequency of the resonator.
These and other features will become apparent from the following detailed description of illustrative embodiments thereof, which is to be read in connection with the accompanying drawings.
The drawings are of illustrative embodiments. They do not illustrate all embodiments. Other embodiments may be used in addition or instead. Details that may be apparent or unnecessary may be omitted to save space or for more effective illustration. Some embodiments may be practiced with additional components or steps and/or without all the components or steps that are illustrated. When the same numeral appears in different drawings, it refers to the same or like components or steps.
In the following detailed description, numerous specific details are set forth by way of examples to provide a thorough understanding of the relevant teachings. However, it should be apparent that the present teachings may be practiced without such details. In other instances, well-known methods, procedures, components, and/or circuitry have been described at a relatively high-level, without detail, to avoid unnecessarily obscuring aspects of the present teachings.
The present disclosure generally relates to superconducting devices, and more particularly, to efficient readout of quantum bits that are interconnected in a quantum processor. The connection between the quantum bits, sometimes referred to herein as qubits, are typically mediated by a bus resonator. What is provided herein is a resonator that has relatively low loss and mitigates the effects of unwanted extra modes, thereby improving the quality of a qubit readout. Further, the footprint of the bus resonator is relatively small, such that the total area of the entire quantum processor is reduced. By virtue of such minimization in size, the quantum processor can be operated at higher frequencies.
The architecture 100 represents a coplanar waveguide structure that includes middle portion 104, sometimes referred to herein as the main portion, between a first end portion 102 and a second end portion 106. The first end portion 102 may be coupled (e.g., capacitively or inductively) to a first qubit, whereas the second end portion 106 may be coupled (e.g., capacitively or inductively) to a second qubit. As illustrated, the main portion 104 has an appropriate length L2, whereas the first and second end portions 102 and 106 can each have a different length. In one embodiment, the first end portion 102 and the second end portion 106 have a similar length L1. In one embodiment, the ratio of the Length L2 to L1 is at least 0.2. The width W1 of the first end portion 102 and the width W3 of the second end portion 106 are each wider than the width W2 of the middle portion 104. In one embodiment, the widths of the first end 102 and the second end are equal (i.e., W1=W3).
In one embodiment, the actual dimensions of the middle portion and the end portions are based on the middle portion 104 having an inductance that is a predetermined factor (e.g., 2) more than the end portions 102, 106. Additionally, the dimensions of the middle portion and the end portions are further based on the middle portion having a capacitance that is a predetermined factor (e.g., 2) less than the end portions 102, 106. Accordingly, the inductance and capacitance of the resonator are different at different portions of the resonator. The resonator 100 carries a standing microwave mode. The effective (i.e., lumped) circuit parameters of the resonator 100 are obtained by integrating the wave profile times the inductance L or capacitance C per unit length. By optimizing the inductance and the capacitance per unit length along the extent of the transmission line 170, a bus resonator that exhibits less interference with higher modes is obtained. The following equations can be used to obtain an expression for the resonance conditions:
The resonance condition for the fundamental mode can be written as:
The resonance condition for the first harmonic can be written as:
Z2 tan(β1l1)=Z1 tan(β2l2/2) (Eq. 5)
In the foregoing equations we have used the fact that the imaginary part of the impedance as seen from the center of a resonator structure is zero for the fundamental mode, where as for the first excited mode, the imaginary part of the admittance is zero. The solutions for Eq. 4 and Eq. 5 can easily be found numerically.
To better appreciate the features of the novel resonator 100, it may be helpful to discuss a general operation of resonators. The resonant frequencies of resonators, referred to herein as normal modes or simply modes, are typically equally spaced multiples (harmonics) of a lowest frequency called the fundamental frequency. For example, for a typical λ/2 resonator, there are multiple modes on that transmission line implementing the resonator, including the fundamental frequency mode, and additional frequencies based on multiples of two from that fundamental frequency. Unlike traditional resonators, where the modes are simple multiples of the fundamental frequency, by virtue of using the “paddle” structure of the resonator 100, the higher modes are shifted further out (e.g., by a factor of 2.3 or more), thereby substantially reducing the effect of the higher mode on the qubit coupling. For example, for a half wave resonator, the second mode is pushed further higher in frequency than 2× the fundamental frequency. By virtue of moving the higher modes further away (i.e., higher) in frequency from the fundamental frequency, unwanted Purcell loss seen by the qubits smaller, as well as reducing spurious couplings between the qubits that are mediated by the higher resonance frequency.
Reference now is made to
The salient feature of the present architecture is that the higher modes are shifted to frequencies that are above the 2× factor (2.4 in the present example of
Reference now is made to
In some embodiments, the first end portion 502 and/or the second end portion 530 may have an “S” structure. For example, the S structure may be used to wrap around connection points 540(A) to 540(D). For example, each of the connection points 540(A) to 540(D) may accept wire bonds by way of one or more pads, bumps, wire bonds, etc. It should be noted that the resonator 500 can also be used in the context of bump bonding packaging. In this regard,
Returning to
As illustrated in
The descriptions of the various embodiments of the present teachings have been presented for purposes of illustration, but are not intended to be exhaustive or limited to the embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terminology used herein was chosen to best explain the principles of the embodiments, the practical application or technical improvement over technologies found in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.
While the foregoing has described what are considered to be the best state and/or other examples, it is understood that various modifications may be made therein and that the subject matter disclosed herein may be implemented in various forms and examples, and that the teachings may be applied in numerous applications, only some of which have been described herein. It is intended by the following claims to claim any and all applications, modifications and variations that fall within the true scope of the present teachings.
The components, steps, features, objects, benefits and advantages that have been discussed herein are merely illustrative. None of them, nor the discussions relating to them, are intended to limit the scope of protection. While various advantages have been discussed herein, it will be understood that not all embodiments necessarily include all advantages. Unless otherwise stated, all measurements, values, ratings, positions, magnitudes, sizes, and other specifications that are set forth in this specification, including in the claims that follow, are approximate, not exact. They are intended to have a reasonable range that is consistent with the functions to which they relate and with what is customary in the art to which they pertain.
Numerous other embodiments are also contemplated. These include embodiments that have fewer, additional, and/or different components, steps, features, objects, benefits and advantages. These also include embodiments in which the components and/or steps are arranged and/or ordered differently.
While the foregoing has been described in conjunction with exemplary embodiments, it is understood that the term “exemplary” is merely meant as an example, rather than the best or optimal. Except as stated immediately above, nothing that has been stated or illustrated is intended or should be interpreted to cause a dedication of any component, step, feature, object, benefit, advantage, or equivalent to the public, regardless of whether it is or is not recited in the claims.
It will be understood that the terms and expressions used herein have the ordinary meaning as is accorded to such terms and expressions with respect to their corresponding respective areas of inquiry and study except where specific meanings have otherwise been set forth herein. Relational terms such as first and second and the like may be used solely to distinguish one entity or action from another without necessarily requiring or implying any actual such relationship or order between such entities or actions. The terms “comprises,” “comprising,” or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. An element proceeded by “a” or “an” does not, without further constraints, preclude the existence of additional identical elements in the process, method, article, or apparatus that comprises the element.
The Abstract of the Disclosure is provided to allow the reader to quickly ascertain the nature of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. In addition, in the foregoing Detailed Description, it can be seen that various features are grouped together in various embodiments for the purpose of streamlining the disclosure. This method of disclosure is not to be interpreted as reflecting an intention that the claimed embodiments have more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive subject matter lies in less than all features of a single disclosed embodiment. Thus, the following claims are hereby incorporated into the Detailed Description, with each claim standing on its own as a separately claimed subject matter.
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Number | Date | Country | |
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20210264308 A1 | Aug 2021 | US |