Patent Application
20080061812
The present invention may be better understood, and its numerous objects, features, and advantages made apparent to those skilled in the art by referencing the accompanying drawings.
The use of the same reference symbols in different drawings indicates similar or substantially identical items.
To distinguish between actual substrates designed to be used in a functioning electronic device, i.e. employable in a non-test environment, from those customized for use in merely testing portions of an electronic device, the former are referred to herein as “real,” “actual,” “standard,” “field-deployable,” “product-deployable,” or “fieldable,” while the latter are referred to as “test substrates,” “specially constructed substrates,” or “customized substrates.” Test packages containing real substrates need not be specially constructed, and the test packages described herein may be constructed using the actual substrates, heatspreaders, lid attach, and other materials and processes used to make the real packages. Because these substrates are those destined for real, or end-use, products, they are constructed of the same material and fabricated by the same process, and have virtually identical electrical and mechanical characteristics, including substrate-to-substrate variation. In some cases the product-deployable substrate may be further processed after fabrication to provide particular electrical or mechanical characteristics more specifically adapted to the test function, or it may be used as-is with only modifications as taught herein.
Specially constructed test packages are currently in use to evaluate component attach methods, such as attaching integrated circuits (ICs), including application specific integrated circuits (ASICs), or central processing units (CPUs) to printed circuit boards (PCBs) by using a variety of methods, including soldering with ball grid arrays (BGAs), through-hole type leaded devices, surface mount packages (SMT) of various designs, pin grid arrays (PGAs), and micro PGAs, and using sockets, for example. These test packages are often of a simpler construction than the real packages that will be used in the field. They therefore may not adequately represent some of the characteristics critical to the performance of the attach methods they are designed to test. For example, test packages are often much flatter than the real packages, and test packages do not show the package-to-package variation of real packages, such as geometric variation in shape, height, etc., and variations in solder joints, especially residual strain. The performance of sockets is extremely sensitive to package flatness. Greater flatness of the test packages also leads to less variation in solder joints across a package which leads to better performance in cyclic stressing than for real packages. In addition, the greater flatness leads to better overall performance, less sensitivity to variations in the required hardware, and better reliability.
One of the main functions of interconnects is to cleanly pass signals back and forth between the semiconductor device and the PCB. The tests to evaluate component attach methods are generally performed by supplying a signal to an input interconnect and reading the resultant signal at an output interconnect. The current test packages using specially constructed substrates cannot assess signal integrity performance because they do not contain the actual signal paths of the real devices and because they pass signals through at least two interconnects, and up to more than one hundred. Use of these test packages and measurements made with them may result in failure to anticipate problems or specify proper tolerances, and in estimation of much better quality, yield, and reliability than is achieved in the real end-use product. In some embodiments of the invention disclosed herein, by employing standard components rather than components customized for use in testing, test packages may be obtained more quickly, i.e. with less lead time, and for lower cost than the test packages used today. In some embodiments packages that are virtually indistinguishable from real packages but for the modifications taught herein may be used to accurately evaluate performance, quality, yields, and reliability, and so to properly specify most or all of the critical tolerances.
After the conductive layer 304 is formed, additional items, including the semiconductor device, heatspreader, and/or lid, may be added to make a package that is nearly identical to a real product-deployable package. In some cases the package may be fully assembled on the modified substrate, with all components attached as in the real product. This package will have been exposed to the same assembly processes as real packages, and its mechanical parameters, thermal response, and internal electrical paths and characteristics will be substantially identical (accounting for normal package-to-package variation) to those of real packages.
To test an interconnection, a signal is supplied to one of the contacts 104 on the contact side 102 of the substrate 300 through one of the conductors 420, and the resulting output signal is detected by a probe 422 in contact with the conductive layer 304 on the opposite side 302 of the substrate. (Of course, the input signal may be supplied at the die side 302 of the substrate 300 and the output read at the contact side 102.) The probe 422 may be connected to whatever monitoring instrument is appropriate for the property to be measured, such as an oscilloscope, a voltage meter, a strain meter, or a recording device or printer. By detecting the output signal at the side opposite the substrate from the input signal, rather than at a second conductor 420, it is possible to test a single electrical path from the input contact through the substrate and so test the characteristics of an individual interconnect. When testing individual interconnects using a socket, the input signal may be supplied, or the output signal measured at, the socket itself rather than going through the support structure (a PCB for example) when it is desirable to determine characteristics of the interconnection.
Solder interconnections may also be tested as described with reference to
Depending on the signals supplied, many characteristics of the interconnects can be determined. Some of the parameters measured may include distortion of an input sine wave, impedance as a function of the frequency of the input signal, bit error rate, retry rate, signal-to-noise ratio, and eye diagram opening shape and size. The physical integrity of the connection may be detected by applying a DC signal. Mechanical properties of the interconnects, such as deformation of the interconnects or the package or residual strain in solder joints, may be monitored separately from the electrical characteristics, or may be monitored simultaneously. The modification of the substrate does not affect the results of routine tests such as time-domain reflectometry (TDR), which may be employed in addition to or instead of other evaluation methods so far described. Neither does the substrate modification affect accelerated aging methods such as thermal cycling or repeatedly applying mechanical stresses.
For the case where many or all of the contacts on the die side 302 of the substrate 300 are connected together on an equipotential plane, access is needed to that plane. When the conductive layer 304 is exposed as depicted in
When some or all of the contacts on the die side are connected together, the electrical performance of individual contacts can be monitored by measuring from the equipotential plane through the contact and to a connection on the PCB. This approach of monitoring individual contacts and its many advantages, including the resulting more accurate reliability predictions, are described in co-pending U.S. patent application Ser. No. 11/345,557, filed Jan. 31, 2006, entitled “Reliability Prediction for Complex Components,” and naming Leoncio D. Lopez, David K. McElfresh, and Dan Vacar as inventors, which application is hereby incorporated by reference herein in its entirety.
Since actual substrates are often available early in the development cycle of an integrated circuit, use of real substrates modified as taught herein may allow evaluations of the performance and reliability of component-attach methods to be done earlier in the development process, and at lower cost. Such an approach may also produce results that are more accurate than does the existing approach, as described elsewhere.
Although the foregoing description has used the example of a substrate, such as an IC die carrier, designed to attach an IC to a PCB, other embodiments are possible. For example, testing interconnections between a chip carrier or PCB and a bare die may be accomplished by similarly shorting electrical paths within the die to an equipotential plane. In the case of a die, the equipotential plane may be formed by removing the back side of the wafer down to a layer of common terminus, and then depositing a metal coating, for example. Alternatively, a test die may be constructed by forming a ground plane during fabrication, with electrical connections between the ground plane and the bonding pads on the chip's surface built in. In yet another embodiment, the method described herein may be used to test interconnections between PCBs, between PCBs and universal panel adapters, or between any pair of components used in the electronics industry.
For the purposes of clarity of description, the test vehicle is often referred to as “substantially identical” in some aspect to real substrates. Persons of ordinary skill in the art will realize that substrates and packages, and in fact, most manufactured items, exhibit minor variations in electrical, thermal, and mechanical properties both between batches and within a batch. These minor variations fall within certain tolerances for substrates employed in actual end-use products; large deviations of these properties from pre-defined target values cause the piece to be rejected as unfit for its intended purpose. The test vehicles described herein are substantially identical to product-deployed substrates when the characteristics of at least one type of property falls within the acceptable limits for deployed substrates. For example, if only the mechanical properties of a bond are to be tested, only the mechanical properties need be the same as for a product-deployed for the tests to enjoy the accuracy and predictive ability provided by using a test vehicle made from deployable substrates modified as described herein. Alternatively, when thermal, mechanical, and electrical properties are to be evaluated in concurrent or sequential tests, as when signal integrity is evaluated before and after thermomechanical stress, multiple properties of the test vehicle may fall within the respective tolerances for substrates deployed in end-use products.
While the invention has been described with reference to various realizations, it will be understood that these realizations are illustrative and that the scope of the invention is not limited to them. Many variations, modifications, additions, and improvements are possible. As used herein, plural instances may be provided for components described as a single instance, and vice versa. These and other variations, modifications, additions, and improvements may fall within the scope of the invention as defined in the claims that follow.
