The present disclosure relates generally to quantum computing systems, and more particularly to calibrating composite quantum gates (e.g., two-qubit quantum gates) in quantum computing systems.
Quantum computing is a computing method that takes advantage of quantum effects, such as superposition of basis states and entanglement to perform certain computations more efficiently than a classical digital computer. In contrast to a digital computer, which stores and manipulates information in the form of bits, e.g., a “1” or “0,” quantum computing systems can manipulate information using quantum bits (“qubits”). A qubit can refer to a quantum device that enables the superposition of multiple states, e.g., data in both the “0” and “1” state, and/or to the superposition of data, itself, in the multiple states. In accordance with conventional terminology, the superposition of a “0” and “1” state in a quantum system may be represented, e.g., as a |0+b|1 The “0” and “1” states of a digital computer are analogous to the |0 and |1 basis states, respectively of a qubit.
Aspects and advantages of embodiments of the present disclosure will be set forth in part in the following description, or can be learned from the description, or can be learned through practice of the embodiments.
One example aspect of the present disclosure is directed to a method for calibrating a quantum computing system used to implement a quantum circuit on a quantum system having a plurality of qubits. The quantum circuit includes a composite quantum gate. The method includes accessing, by one or more computing devices, a unitary gate model describing the composite quantum gate. The unitary gate model includes a plurality of gate parameters. The method includes implementing, by the one or more computing devices, the composite quantum gate for a plurality of gate cycles on the quantum system to amplify the plurality of gate parameters. The method includes obtaining, by the one or more computing devices, a measurement of a state of the quantum system after implementing the composite quantum gate for the plurality of gate cycles. The method includes determining, by the one or more computing devices, at least one of the plurality of gate parameters based at least in part on the measurement of the state of the quantum system. The method includes calibrating, by the one or more computing devices, the composite quantum gate for the quantum computing system based at least in part on the plurality of gate parameters.
Other aspects of the present disclosure are directed to various systems, methods, apparatuses, non-transitory computer-readable media, computer-readable instructions, and computing devices.
These and other features, aspects, and advantages of various embodiments of the present disclosure will become better understood with reference to the following description and appended claims. The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate example embodiments of the present disclosure and, together with the description, explain the related principles.
Detailed discussion of embodiments directed to one of ordinary skill in the art is set forth in the specification, which refers to the appended figures, in which:
Example aspects of the present disclosure are directed to systems and methods for calibrating composite quantum gates (e.g., two-qubit quantum gates) in a quantum computing system. Quantum gates can be the building blocks of quantum circuits implemented by quantum computing systems for quantum computation. Composite quantum gates act on more than one qubit (e.g., two qubits, three qubits). Operation of a quantum computer can require characterization and calibration of experimentally realizable quantum gates. Robust and efficient quantum gate characterization provides information about the actualized quantum gates, which can then be used for the subsequent quantum control calibration in a quantum computing system. Quantum control calibration can include, for instance, calibration of control pulses to implement the quantum gates on a quantum system having a plurality of qubits. Quantum gate characterization and calibration are useful for achieving high-fidelity quantum computation and large-scale deployment.
The robustness of a quantum gate calibration protocol can be measured by its ability to extract realistic quantum gate parameters with high accuracy against other compounding imperfections, such as errors in the quantum state preparation and measurements. The efficiency of a calibration protocol can be measured by the total physical runtime for the calibration protocol to achieve a given accuracy. One standard of increased efficiency of a calibration protocol can be reached when the variance of the characterized parameter scales inversely proportional relative to the to an amount of time (e.g., physical runtime) to implement the calibration protocol.
Existing methods and systems for efficient quantum gate characterization are provided for single-qubit quantum gates. However, to realize universal quantum computation, both single-qubit and composite quantum gates are desired. In addition, unwanted qubit-to-qubit interaction due to control errors such as cross talk and environmental defects can also take forms as composite gates. Consequently, robust and efficient composite gate characterization and calibration can be desirable towards achieving universal quantum computation and towards learning and mitigating errors.
Example aspects of the present disclosure provide a calibration protocol for characterizing and calibrating composite quantum gates (e.g., any two-qubit quantum gate). In some embodiments, the calibration protocol can access a model capable of representing an arbitrary unitary operation. The parameters of this model can be learned using the techniques described in calibration protocol(s) according to example aspects of the present disclosure. During the calibration protocol(s), the quantum gate can be repeatedly applied in cyclic fashion for a plurality of gate cycles before taking a measurement of a state of the quantum system. This can coherently amplify the quantum gate parameters without the need for quantum entanglement. The amplification of the quantum gate parameters according to example aspects of the present disclosure can allow for more efficient determination of the quantum gate parameters for a composite quantum gate (e.g., two-qubit quantum gate).
For instance, in some embodiments, an example calibration method can include performing a plurality of measurement instances on a quantum system. Each measurement instance can be associated with implementing a quantum gate for k gate cycles, k can also be referred to as the “amplification factor.” Measurement instances can be associated with a different value of k. For instance, a first measurement instance can be associated with two cycles of implementing the quantum gate before taking a measurement of the state of the quantum system. A second measurement instance can be associated with four cycles of implementing the quantum gate before taking a measurement of the state of the quantum system. A third measurement instance can be associated with sixteen cycles of implementing the quantum gate before taking a measurement of the state of the quantum system, and so forth. In some embodiments, multiple measurement instances can be associated with the same amplification factor. For instance, multiple measurements can be associated with an amplification factor k. Each measurement can be obtained after implementing a quantum gate for k gate cycles.
The repeated gate cycles of implementing the quantum gate can amplify gate parameters. The measurements of the state of the quantum system obtained for each measurement instance can be used to determine the parameters of a model describing a composite quantum gate according to example embodiments of the present disclosure. Once the parameters are known, the composite quantum gate can be calibrated for use in a quantum operation and/or to reduce errors.
Example aspects of the present disclosure provide a number of technical effects and benefits. For instance, calibration protocol(s) according to example aspects of the present disclosure can determine composite quantum gate parameters to about 1% accuracy or better to suppress control errors below that of other error sources (e.g., decoherence). In some embodiments, the calibration protocol can achieve increased efficiency in quantum parameter estimation. In some cases, the efficiency can approach the Heisenberg limit, where the accuracy of the estimation increases (e.g., a variance decreases) quadratically faster than certain classical parameter estimation methods (e.g., using a classical processing algorithm). Efficiencies created by the calibration protocol according to example aspects of the present disclosure can approach the Heisenberg limit without the use of entanglement. Given the difficulty of generating large scale entanglement with noisy intermediate scale quantum computers, the methods and systems for calibrating composite quantum gates according to example aspects of the present disclosure can provide unique advantages for characterizing and calibrating quantum computing systems.
With reference now to the FIGS., example embodiments of the present disclosure will be discussed in further detail. As used here, the use of the term “about” in conjunction with a value refers to within 20% of the value.
The system 100 includes quantum hardware 102 in data communication with one or more classical processors 104. The quantum hardware 102 includes components for performing quantum computation. For example, the quantum hardware 102 includes a quantum system 110, control device(s) 112, and readout device(s) 114 (e.g., readout resonator(s)). The quantum system 110 can include one or more multi-level quantum subsystems, such as a register of qubits. In some implementations, the multi-level quantum subsystems can include superconducting qubits, such as flux qubits, charge qubits, transmon qubits, gmon qubits, etc.
The type of multi-level quantum subsystems that the system 100 utilizes may vary. For example, in some cases it may be convenient to include one or more readout device(s) 114 attached to one or more superconducting qubits, e.g., transmon, flux, gmon, xmon, or other qubits. In other cases, ion traps, photonic devices or superconducting cavities (e.g., with which states may be prepared without requiring qubits) may be used. Further examples of realizations of multi-level quantum subsystems include fluxmon qubits, silicon quantum dots or phosphorus impurity qubits.
Quantum circuits may be constructed and applied to the register of qubits included in the quantum system 110 via multiple control lines that are coupled to one or more control devices 112. Example control devices 112 that operate on the register of qubits can be used to implement quantum gates or quantum circuits having a plurality of quantum gates, e.g., Pauli gates, Hadamard gates, controlled-NOT (CNOT) gates, controlled-phase gates, T gates, multi-qubit quantum gates, coupler quantum gates, etc. The one or more control devices 112 may be configured to operate on the quantum system 110 through one or more respective control parameters (e.g., one or more physical control parameters). For example, in some implementations, the multi-level quantum subsystems may be superconducting qubits and the control devices 112 may be configured to provide control pulses to control lines to generate magnetic fields to adjust the frequency of the qubits.
The quantum hardware 102 may further include readout devices 114 (e.g., readout resonators). Measurement results 108 obtained via measurement devices may be provided to the classical processors 104 for processing and analyzing. In some implementations, the quantum hardware 102 may include a quantum circuit and the control device(s) 112 and readout devices(s) 114 may implement one or more quantum logic gates that operate on the quantum system 102 through physical control parameters (e.g., microwave pulses) that are sent through wires included in the quantum hardware 102. Further examples of control devices include arbitrary waveform generators, wherein a DAC (digital to analog converter) creates the signal.
The readout device(s) 114 may be configured to perform quantum measurements on the quantum system 110 and send measurement results 108 to the classical processors 104. In addition, the quantum hardware 102 may be configured to receive data specifying physical control qubit parameter values 106 from the classical processors 104. The quantum hardware 102 may use the received physical control qubit parameter values 106 to update the action of the control device(s) 112 and readout devices(s) 114 on the quantum system 110. For example, the quantum hardware 102 may receive data specifying new values representing voltage strengths of one or more DACs included in the control devices 112 and may update the action of the DACs on the quantum system 110 accordingly. The classical processors 104 may be configured to initialize the quantum system 110 in an initial quantum state, e.g., by sending data to the quantum hardware 102 specifying an initial set of parameters 106.
The readout device(s) 114 can take advantage of a difference in the impedance for the |0 and |1 states of an element of the quantum system, such as a qubit, to measure the state of the element (e.g., the qubit). For example, the resonance frequency of a readout resonator can take on different values when a qubit is in the state |0 or the state |1, due to the nonlinearity of the qubit. Therefore, a microwave pulse reflected from the readout device 114 carries an amplitude and phase shift that depend on the qubit state. In some implementations, a Purcell filter can be used in conjunction with the readout device(s) 114 to impede microwave propagation at the qubit frequency.
At (202), the method includes accessing a unitary gate model. The unitary gate model can describe the composite quantum gate (e.g., two-qubit quantum gate). The unitary gate model can include a plurality of gate parameters. More particularly, in some embodiments, the model can describe the composite quantum gate as a unitary fermionic sim gate UFSIM. The UFSIM gate can include five gate parameters, including a first gate parameter Ψ, a second gate parameter Φ, a third gate parameter φ, a fourth gate parameter θ, and fifth gate parameter χ. A definition of a UFSIM gate is set forth below:
Control parameters SA and SB are realized by implementing a single qubit Z gate (Pauli Z gate) before the composite quantum gate. The Z gate can have a matrix representation of the following form:
Aspects of the present disclosure provide a calibration protocol to learn the five parameters χ, θ, φ, Φ and Ψ so that any composite quantum gate can be learned with precision and represented by the model corresponding to the UFSIM gate.
In some embodiments, the UFSIM gate representing the two-qubit quantum gate can be modeled as the set of quantum gates 220 shown in
φ=2(α0−α1)
The iSWAP gate 226 can be for angle θ. The controlled phase gate 228 can be for angle Φ.
Referring back to
This amplification of gate parameters is represented as (204), (206), and (208) of
At (206), the method can include obtaining a measurement of a state of the quantum system. More particularly, the method can include obtaining a state of the plurality of qubits (e.g., a first qubit and a second qubit) after implementation of the composite quantum gate for k gate cycles. The measurement(s) can be stored as a record in one or more memory devices for use in determining gate parameters according to example aspects of the present disclosure. In some embodiments, the method can also include performing multiple measurement instances for the same value of k. In this way, multiple measurements of a quantum state can be obtained for the same amplification factor.
At (208), the method can include determining whether to repeat (204) and (206) (e.g., conduct another measurement instance) for a different value k. If so, the method can return to (204) to implement the composite quantum gate for a plurality of gate cycles k and obtain a measurement of the state of the quantum system (206). This process can continue until it is determined at (208) that no more measurement instances are needed.
A second measurement instance 240 can be associated with a gate cycle k value of 2. The second measurement instance 240 can include, for instance, a preparation phase 242. The preparation phase 242 can include implementing one or more quantum gates and/or control pulses to prepare the qubits in the quantum system for calibration. The second measurement instance 240 can include a gate cycle phase 244 that implements the composite quantum gate for k gate cycles, such as two gate cycles. The second measurement instance 240 includes a readout phase 246. The readout phase 246 can implement one or more quantum gates and/or control pulses to prepare the qubits in the quantum system for a measurement. The second measurement instance 240 can finally include a measurement 248 where the state of the qubits in the quantum system are measured.
A third measurement instance 250 can be associated with a gate cycle k value of 3. The third measurement instance 250 can include, for instance, a preparation phase 252. The preparation phase 252 can include implementing one or more quantum gates and/or control pulses to prepare the qubits in the quantum system for calibration. The third measurement instance 250 can include a gate cycle phase 254 that implements the composite quantum gate for k gate cycles, such as three gate cycles. The third measurement instance 250 includes a readout phase 256. The readout phase 256 can implement one or more quantum gates and/or control pulses to prepare the qubits in the quantum system for a measurement. The third measurement instance 250 can finally include a measurement 258 where the state of the qubits in the quantum system are measured.
A fourth measurement instance 260 can be associated with a gate cycle k value of 4. The fourth measurement instance 260 can include, for instance, a preparation phase 262. The preparation phase 262 can include implementing one or more quantum gates and/or control pulses to prepare the qubits in the quantum system for calibration. The fourth measurement instance 260 can include a gate cycle phase 264 that implements the composite quantum gate for k gate cycles, such as four gate cycles. The fourth measurement instance 260 includes a readout phase 266. The readout phase 266 can implement one or more quantum gates and/or control pulses to prepare the qubits in the quantum system for a measurement. The fourth measurement instance 260 can finally include a measurement 268 where the state of the qubits in the quantum system are measured.
Referring back to
At (302), the method can include determining a first phase of a first qubit in the quantum system as a function k, wherein k is the number of gate cycles used to amplify the first gate parameter Ψ.
At (304), the method can include determining a second phase of a second qubit in the quantum system as a function k, wherein k is the number of gate cycles used to amplify the first gate parameter Ψ.
At (306) of
At (308), the method can include determining the first gate parameter Ψ based at least in part on a characteristic associated with the function correlating the sum of the first phase and the second phase with k. In some embodiments, the first gate parameter Ψ is determined as the slope of the function. Referring to
At (402), the method can include setting a qubit to an excited state, such as a |1 state. For instance, the method can include setting a first qubit q0 to an excited state, such as such as a |1 state. At (404), the method can include determining a conditional phase of a second qubit for each as a function k, wherein k is the number of gate cycles used to amplify the second gate parameter Φ. Setting the first qubit q0 to an excited state changes the phase of the second qubit q1. The difference in qubit phase when setting the first qubit between the |0 state and |1 state is the conditional phase.
At (406) of
At (408), the method can include determining the second gate parameter Φ based at least in part on a characteristic associated with the function correlating conditional phase with k. In some embodiments, the second gate parameter Φ is determined as the slope of the function. Referring to
At (502), the method can include obtaining calibration data. The calibration data can be obtained by implementing the quantum circuit 520 depicted in
φ=2(α0−α1)
The quantum circuit 520 then obtains a measurement 528 of the state of the first qubit q0. The calibration data can include data indicative of a state of the qubits (e.g. population of the qubits) using measurements obtained for different values of β and different values of k.
At (504) of
β/π−1−A*sin(ωk)2
where ω is oscillation frequency.
At (508), the method includes determining the third gate parameter φ based on a first characteristic of the oscillation frequency function. For instance, the third gate parameter φ can be determined based on the x-offset of a local minima (e.g. x-offset 544 of local minima 542 in
At (510) of
At (602), the method can include obtaining calibration data similar to (502) in
At (604), the method can include determining a first probability P10 and a second probability P00 based on the measurements. The first probability P10 can be representative of the probability that the state of first and second qubits in the quantum system is |1|0 (e.g., are in a different state). The second probability P00 can be representative of the probability that the state of first and second qubits in the quantum system is |0|0 (e.g., are in the same state).
At (606), the method can include determining the fifth gate parameter χ based on the first probability, the second probability, and the previously determined gate parameters. For instance, the fifth gate parameter χ can be determined using the following relation:
P01−P00∝sin[dΨ−χ]
The method can invert and obtain the fifth gate parameter χ using the above relation given the value of the first gate parameter Ψ, the third gate parameter φ, and the fourth parameter θ that have been previously determined.
Variations and modifications can be made to example embodiments of the present disclosure. For instance, in some embodiments, modifications are made to improve efficiency of the calibration protocol. In some embodiments, the modifications can result in efficiencies that approach that Heisenberg limit (as defined above).
For instance, efficiencies approaching the Heisenberg limit can be achieved when the number of measurements per repetition is much smaller than the maximum repetitions. But in this limit, aliasing of periodic calibration can also pose challenges. This is because the measured value can be a periodic function of the gate parameter. If the amplification factor (e.g., number of gate cycles) is increased exponentially fast, the number of possible solutions also grows exponentially. An iterative next step estimation procedure as outlined below that depends explicitly on the previous step estimation can solve this aliasing problem such that the efficiency of the calibration protocol is increased and can approach the Heisenberg limit.
In some embodiments, the calibration protocol can exponentially increase the number of gate cycles k for each measurement instance. For instance, a number of gate cycles k for a measurement instance can increase by an exponential factor relative to a number of gate cycles for a previous measurement instance. As one example, the value of k can increase as 2, 4, 8, 16, 32, 64 and so forth.
For example,
As another example,
In some embodiments, to increase efficiency, the calibration protocol can apply recursive updates to infer parameters for each measurement instance to reduce aliasing in the periodic functional dependence of the gate parameter and measurements. For instance, at each new measurement instance, a parameter estimation for the measurement instance can be chosen to be within an uncertainty range given by a periodicity of a previous measurement instance. For trigonometric functions, since the periodicity is typically n*π/k for gate cycles k and integer n, the uncertainty range can scale as O(1/k).
As an example, the following method demonstrates this technique for determining the third gate parameter φ and the fourth gate parameter θ. First, gate cycles are set for exponentially increasing amplification factors k according to k=2i for i={0, 1, . . . d}, where d is the number of different amplification factors. An estimate is obtained for α0−α1 and θ. For each amplification factor repeat the measurement instance Mi times, where:
M
i
=a(2k−i)+b
where a and b are constants.
A transition probability that the quantum state of the first qubit and the second qubit will change from 0|0 to 0|1 depends on the third gate parameter φ and the fourth gate parameter θ as follows:
An inversion is performed using the rough estimate of φ and θ to update Ω, which in turn depends on parameters as
This can be repeated for a a different β′, to obtain a new estimate Ω(β′). The third and fourth gate parameters φ and θ can be updated with:
The data set of measurement instances associated with a previous iteration can be used to estimate Ω(β) and Ω(β′) to the highest accuracy. The final estimate on θ and φ can be calculated similarly except using the last step estimate of Ω(β) and Ω(β′).
In some embodiments, the calibration protocol according to example aspects of the present disclosure can be used to estimate gate parameters for parasitic interactions among a plurality of qubits in a quantum system. For instance,
Aspects of the present disclosure have been discussed with reference to calibrating a two-qubit composite gate for purposes of illustration and discussion. As demonstrated below, the calibration protocol(s) according to example embodiments of the present disclosure can be used for calibration of composite gates of any higher order (e.g., three-qubit composite gate, etc.).
A number-conserving two-qubit gate (generalized fSim gate) take the following form in the basis |00, |01, |10, |11,
where 0≤θ≤π/2 is the iSWAP angle, ϕ is the controlled phase angle, and δ, χ, γ are single-qubit phase factors. Single-qubit Z rotations on two-qubits can be expressed as
where ˜ denotes equivalence up to an overall phase,
The generalized fSim gate (1) can be decomposed into
GfSim(θ,δ,χ,γ,ϕ)˜Rz(−γ,−γ)Rz(β,−β)fSim(θ,ϕ)Rz(α,−α), (3)
where α=(δ+χ)/2, β=(δ−χ)/2, and fSim(θ,ϕ)=GfSim(θ,0,0,0,ϕ) is the standard fSim gate. A cycle consisting one GfSim gate prepended by two single-qubit Z rotations reads
G
fSim(θ,δ,χ,γ,ϕ)Rz(ζ0,ζ1)=GfSim(θ,δ+η,χ+η,γ−
This leads to the following transformation rules for the parameters,
{circumflex over (θ)}=θ, {circumflex over (δ)}=δ+η, {circumflex over (χ)}=χ+η, {circumflex over (γ)}=γ−
where Greek letters with hats represent parameters of the gate.
As described herein, one example method for calibrating quantum gates robustly and precisely according to example embodiments of the present disclosure is by repeating them by many times (e.g., for a plurality of gate cycles). The coherent amplification of the eigenvalues of the gates allows one to measure them to the Heisenberg limit. Since the eigenvalues are amplified, it is also more robust to state preparation and measurement errors.
The n-th fold product of the generalized fSim gate reads
G
fSim(θ,δ,χ, γ,ϕ)n=diag(1,e−inγu(θ,δ,χ)n,e−in(2γ+ϕ)), (6)
where u is the 2×2 matrix
The n-th power of u can be solved analytically using the Pauli representation
and floquet frequency Ω∈[θ,π−θ]. The floquet frequency Ω can be measured with extremely high precision using phase amplification. To estimate both θ and δ, the cycle in Eq. (4) should be considered for at least two different values of η=(ζ0−ζ1)/2. To simplify notation, the cycle is denoted as
The floquet frequency corresponding to u(θ,{circumflex over (δ)},{circumflex over (χ)}) is
cos[{circumflex over (Ω)}(η)]=cos θ cos {circumflex over (δ)}=cos θ cos(δ+η). (14)
For η≠η′, one can estimate the parameter δ by using
Knowing δ, θ can be estimated by simply putting its value into Eq. (14). The hidden assumptions here are: 1. the gate GfSim(θ,δ,χ,γ,ϕ) does not depend on ζ0 and ζ1, i.e., pulse bleeding is negligible; 2. the single-qubit Z rotations can be implemented perfectly. Both are pretty reasonable assumptions with current superconducting qubits.
To calibrate the fSim gate, the cycle (4) is repeated for nk times for k=0, 1, . . . , κ−1. The repetition number nk is approximately an exponential function of k, i.e.,
log nk≈λk, (16)
where λ is a constant. The advantage of this choice is that less quantum circuits can be implemented to get a desired precision while keeping track of how many times the accumulated phase over an 2π interval. Three setup instances are to calibrate different parameters in the generalized fSim gate. These setup instances can be meant to be implemented in a particular order to get improved results.
The first instance, instance 0, considers the following matrix element:
|00|Rx(π,0)ÛnRx(0,π)|00|=|1|ûn|0|=|sin(n{circumflex over (Ω)})sin θ/sin {circumflex over (Ω)}|, (17)
where ûn is a shorthand for u(θ,{circumflex over (δ)},{circumflex over (χ)})n. |1|ûn|0|=|sin θ| is for n=1 and |1|ûn|0z,35 |=sin(2θ)|cos(δ+η)| for n=2. |1|ûn|0| can contain information of the floquet frequency {circumflex over (Ω)} and can be used to infer the values of θ and δ using Eqs. (14). This instance has the advantage that the output state can be post selected in the subspace of two basis states |00 and |11 which is robust to single bit-flip errors. However, in some cases, it may only be used to estimate θ and δ.
For increased sensitivity, η can be chosen such that small changes of θ and δ cause big changes in the measurement probability |1|ûn|0|2. For large n, sin {circumflex over (Ω)} is a slow varying function compared to sin(n{circumflex over (Ω)}) and Eq. (17) is approximated by
|1|ûn|0|2∝sin(n{circumflex over (Ω)})2=1−cos(θ)2 cos({circumflex over (δ)})2. (18)
where {circumflex over (δ)}=δ+η. To better estimate θ, η can be chosen such that |cos {circumflex over (δ)}| is maximized or near maximized. For better estimation of δ, an optimal choice of η satisfies
δ+η=π/4(mod π/2). (19)
This choice can be used because it can be more robust in practice, (e.g., there are more margins that one can get an estimation close to the correct values when errors exist). This can be achieved by maximally separating the four possible values of δ with the same value of |cos {circumflex over (δ)}| in an interval of 2π.
The floquet frequency {circumflex over (Ω)} can be estimated for some value of η by running the circuit at different values of n and then estimating θ and δ. In some cases, this can pose challenges. First, the value of |1|ûn|0| can be small and susceptible to errors. Second, the sensitivity of estimator can be low for some values of k. These challenges can be addressed by using an adaptive approach, where the values of η are chosen based on the current estimates of θ and δ. To increase the robustness, estimates of θ and δ are updated using data from the current step as well as former ones. The procedure can is as follows: (1) Get the values of η for step k using Eq. (19) based on estimates of θ and δ obtained in step k-1; (2) Run the calibration circuits with these values of η and collect data; and (3) Update the estimates of θ and δ using the data obtained at step k and several previous steps, e.g., k-2, k-1, and k.
The second instance, instance 1, can be used to estimate θ, δ, and γ with high precision. It can also be used to estimate χ. Consider the two matrix elements
|00Rx(π/2,0)ÛnRx(0,π/2)|00|=½|ein{circumflex over (γ)}−1|ûn|0|, (20)
|01|Rx(π/2,0)ÛnRx(0,π/2)|00|=½|0|ûn|0|. (21)
The value of |0|ûn|0| can be estimated by the measurement results directly using Eq. (21), and the value of |1|ûn|0| an be obtained with the simple algebra |0|ûn|0|2+|1|ûn|0|2=1. Knowing |1|ûn|0|, Eq. (20) can be used to estimate the relative phase
μ=n{circumflex over (γ)}−arg(1|ûn|0), (22)
An advantage of using the particular matrix element 1|ûn|0 is that its phase is relatively stable
1|ûn|0=sgn λne−i(χ+η+π/2)|1|ûn|0|, (23)
where χ is fixed and η can be controlled with high precision. The phase of the matrix element is
arg(1|ûn|0)=−(χ+η+π sgn λ/2), (24)
and therefore
μ=(nγ+χ)−n
Knowing μ for different values of n can provide for estimation of the values of χ and γ y with a linear fit. The relative phase μ can be solved using the relation
|eiμ−r|=m⇒1−2r cos μ+r2=m2, (26)
where r=1|ûn|0| and m=2|00|Rx(π/2,0)ÛnRx(0,π/2)|00| for this instance.
The values of η can be chosen such that |1|ûn|0| is maximized or near maximized.
The third instance, instance 2, In instance 2, considers the matrix elements
|00|Rx(π,π/2)ÛnRx(π/2,π)|00|=½|e−in({circumflex over (γ)}+ϕ)−1|ûn|0|, (27)
|10|Rx(π,π/2)ÛnRx(π/2,π)|00|=½|0|ûn|0|. (28)
This instance can provide for estimation of the parameter ϕ high precision by first estimating the relative phase
The calibration system 1010 can include any type of computing device (e.g., classical computing device). The calibration system 1010 includes one or more processors 1012 and a memory 1014. The one or more processors 1012 can include any suitable processing device (e.g., a processor core, a microprocessor, an ASIC, a FPGA, a controller, a microcontroller, etc.) and can be one processor or a plurality of processors that are operatively connected. The memory 1014 can include one or more non-transitory computer-readable storage mediums, such as RAM, ROM, EEPROM, EPROM, flash memory devices, magnetic disks, etc., and combinations thereof. The memory 1014 can store data 1016 (e.g., qubit parameters, measurements, etc.) and instructions 1018 which are executed by the processor 1012 to cause the calibration computing device 1010 to perform operations, such as one or more aspects of any of the method disclosed herein. The calibration system 1010 can be configured to process calibration data 1020 obtained by measuring a state of a quantum system (e.g., quantum system 1040) to determine gate parameters of a model of a composite gate according to example embodiments of the present disclosure.
The quantum computing system 1030 includes one or more processors 1032 and a memory 1034. The one or more processors 1032 can include suitable processing device (e.g., a processor core, a microprocessor, an ASIC, a FPGA, a controller, a microcontroller, etc.) and can be one processor or a plurality of processors that are operatively connected. The memory 1034 can include one or more non-transitory computer-readable storage mediums, such as RAM, ROM, EEPROM, EPROM, flash memory devices, magnetic disks, etc., and combinations thereof. The memory 1034 can store data 1036 and instructions 1038 which are executed by the processor 1032 to cause the quantum computing system 1030 to perform operations, such as implementation of a quantum circuit having one or more quantum gates on a quantum system 1040 having a plurality of qubits and obtaining associated measurements. The quantum computing system 1030 can be similar to the quantum computing system discussed and described with reference to
The network 1050 can be any type of communications network, such as a local area network (e.g., intranet), wide area network (e.g., Internet), or some combination thereof and can include any number of wired or wireless links. In general, communication over the network 1050 can be carried via any type of wired and/or wireless connection, using a wide variety of communication protocols (e.g., TCP/IP, HTTP, SMTP, FTP), encodings or formats (e.g., HTML, XML), and/or protection schemes (e.g., VPN, secure HTTP, SSL).
Implementations of the digital, classical, and/or quantum subject matter and the digital functional operations and quantum operations described in this specification can be implemented in digital electronic circuitry, suitable quantum circuitry or, more generally, quantum computational systems, in tangibly-implemented digital and/or quantum computer software or firmware, in digital and/or quantum computer hardware, including the structures disclosed in this specification and their structural equivalents, or in combinations of one or more of them. The term “quantum computing systems” may include, but is not limited to, quantum computers/computing, systems, quantum information processing systems, quantum cryptography systems, or quantum simulators.
Implementations of the digital and/or quantum subject matter described in this specification can be implemented as one or more digital and/or quantum computer programs, i.e., one or more modules of digital and/or quantum computer program instructions encoded on a tangible non-transitory storage medium for execution by, or to control the operation of, data processing apparatus. The digital and/or quantum computer storage medium can be a machine-readable storage device, a machine-readable storage substrate, a random or serial access memory device, one or more qubits/qubit structures, or a combination of one or more of them. Alternatively or in addition, the program instructions can be encoded on an artificially-generated propagated signal that is capable of encoding digital and/or quantum information (e.g., a machine-generated electrical, optical, or electromagnetic signal) that is generated to encode digital and/or quantum information for transmission to suitable receiver apparatus for execution by a data processing apparatus.
The terms quantum information and quantum data refer to information or data that is carried by, held, or stored in quantum systems, where the smallest non-trivial system is a qubit, i.e., a system that defines the unit of quantum information. It is understood that the term “qubit” encompasses all quantum systems that may be suitably approximated as a two-level system in the corresponding context. Such quantum systems may include multi-level systems, e.g., with two or more levels. By way of example, such systems can include atoms, electrons, photons, ions or superconducting qubits. In many implementations the computational basis states are identified with the ground and first excited states, however it is understood that other setups where the computational states are identified with higher level excited states (e.g., qudits) are possible.
The term “data processing apparatus” refers to digital and/or quantum data processing hardware and encompasses all kinds of apparatus, devices, and machines for processing digital and/or quantum data, including by way of example a programmable digital processor, a programmable quantum processor, a digital computer, a quantum computer, or multiple digital and quantum processors or computers, and combinations thereof. The apparatus can also be, or further include, special purpose logic circuitry, e.g., an FPGA (field programmable gate array), or an ASIC (application-specific integrated circuit), or a quantum simulator, i.e., a quantum data processing apparatus that is designed to simulate or produce information about a specific quantum system. In particular, a quantum simulator is a special purpose quantum computer that does not have the capability to perform universal quantum computation. The apparatus can optionally include, in addition to hardware, code that creates an execution environment for digital and/or quantum computer programs, e.g., code that constitutes processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of them.
A digital or classical computer program, which may also be referred to or described as a program, software, a software application, a module, a software module, a script, or code, can be written in any form of programming language, including compiled or interpreted languages, or declarative or procedural languages, and it can be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a digital computing environment. A quantum computer program, which may also be referred to or described as a program, software, a software application, a module, a software module, a script, or code, can be written in any form of programming language, including compiled or interpreted languages, or declarative or procedural languages, and translated into a suitable quantum programming language, or can be written in a quantum programming language, e.g., QCL, Quipper, Cirq, etc.
A digital and/or quantum computer program may, but need not, correspond to a file in a file system. A program can be stored in a portion of a file that holds other programs or data, e.g., one or more scripts stored in a markup language document, in a single file dedicated to the program in question, or in multiple coordinated files, e.g., files that store one or more modules, sub-programs, or portions of code. A digital and/or quantum computer program can be deployed to be executed on one digital or one quantum computer or on multiple digital and/or quantum computers that are located at one site or distributed across multiple sites and interconnected by a digital and/or quantum data communication network. A quantum data communication network is understood to be a network that may transmit quantum data using quantum systems, e.g. qubits. Generally, a digital data communication network cannot transmit quantum data, however a quantum data communication network may transmit both quantum data and digital data.
The processes and logic flows described in this specification can be performed by one or more programmable digital and/or quantum computers, operating with one or more digital and/or quantum processors, as appropriate, executing one or more digital and/or quantum computer programs to perform functions by operating on input digital and quantum data and generating output. The processes and logic flows can also be performed by, and apparatus can also be implemented as, special purpose logic circuitry, e.g., an FPGA or an ASIC, or a quantum simulator, or by a combination of special purpose logic circuitry or quantum simulators and one or more programmed digital and/or quantum computers.
For a system of one or more digital and/or quantum computers or processors to be “configured to” or “operable to” perform particular operations or actions means that the system has installed on it software, firmware, hardware, or a combination of them that in operation cause the system to perform the operations or actions. For one or more digital and/or quantum computer programs to be configured to perform particular operations or actions means that the one or more programs include instructions that, when executed by digital and/or quantum data processing apparatus, cause the apparatus to perform the operations or actions. A quantum computer may receive instructions from a digital computer that, when executed by the quantum computing apparatus, cause the apparatus to perform the operations or actions.
Digital and/or quantum computers suitable for the execution of a digital and/or quantum computer program can be based on general or special purpose digital and/or quantum microprocessors or both, or any other kind of central digital and/or quantum processing unit. Generally, a central digital and/or quantum processing unit will receive instructions and digital and/or quantum data from a read-only memory, or a random access memory, or quantum systems suitable for transmitting quantum data, e.g. photons, or combinations thereof.
Some example elements of a digital and/or quantum computer are a central processing unit for performing or executing instructions and one or more memory devices for storing instructions and digital and/or quantum data. The central processing unit and the memory can be supplemented by, or incorporated in, special purpose logic circuitry or quantum simulators. Generally, a digital and/or quantum computer will also include, or be operatively coupled to receive digital and/or quantum data from or transfer digital and/or quantum data to, or both, one or more mass storage devices for storing digital and/or quantum data, e.g., magnetic, magneto-optical disks, or optical disks, or quantum systems suitable for storing quantum information. However, a digital and/or quantum computer need not have such devices.
Digital and/or quantum computer-readable media suitable for storing digital and/or quantum computer program instructions and digital and/or quantum data include all forms of non-volatile digital and/or quantum memory, media and memory devices, including by way of example semiconductor memory devices, e.g., EPROM, EEPROM, and flash memory devices; magnetic disks, e.g., internal hard disks or removable disks; magneto-optical disks; and CD-ROM and DVD-ROM disks; and quantum systems, e.g., trapped atoms or electrons. It is understood that quantum memories are devices that can store quantum data for a long time with high fidelity and efficiency, e.g., light-matter interfaces where light is used for transmission and matter for storing and preserving the quantum features of quantum data such as superposition or quantum coherence.
Control of the various systems described in this specification, or portions of them, can be implemented in a digital and/or quantum computer program product that includes instructions that are stored on one or more tangible, non-transitory machine-readable storage media, and that are executable on one or more digital and/or quantum processing devices. The systems described in this specification, or portions of them, can each be implemented as an apparatus, method, or electronic system that may include one or more digital and/or quantum processing devices and memory to store executable instructions to perform the operations described in this specification.
While this specification contains many specific implementation details, these should not be construed as limitations on the scope of what may be claimed, but rather as descriptions of features that may be specific to particular implementations. Certain features that are described in this specification in the context of separate implementations can also be implemented in combination in a single implementation. Conversely, various features that are described in the context of a single implementation can also be implemented in multiple implementations separately or in any suitable sub combination. Moreover, although features may be described above as acting in certain combinations and even initially claimed as such, one or more features from a claimed combination can in some cases be excised from the combination, and the claimed combination may be directed to a sub-combination or variation of a sub-combination.
Similarly, while operations are depicted in the drawings in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. In certain circumstances, multitasking and parallel processing may be advantageous. Moreover, the separation of various system modules and components in the implementations described above should not be understood as requiring such separation in all implementations, and it should be understood that the described program components and systems can generally be integrated together in a single software product or packaged into multiple software products.
Particular implementations of the subject matter have been described. Other implementations are within the scope of the following claims. For example, the actions recited in the claims can be performed in a different order and still achieve desirable results. As one example, the processes depicted in the accompanying figures do not necessarily require the particular order shown, or sequential order, to achieve desirable results. In some cases, multitasking and parallel processing may be advantageous.
The present application claims the benefit of priority of U.S. Provisional Application Ser. No. 63/002,764, filed on Mar. 31, 2020, titled “Composite Quantum Gate Calibration,” which is incorporated herein by reference.
Number | Date | Country | |
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63002764 | Mar 2020 | US |