Claims
- 1. A method for fabricating a base plate for a field emission device, the method comprising:forming a first conductive layer on a substrate, the first conductive layer having a plurality of emitters formed thereon; forming a first insulating layer over the first conductive layer; forming a second conductive layer superjacent the first insulating layer; removing the second conductive layer from the first insulating layer except in areas overlaying the emitters; after moving the second conductive layer from the first insulating, forming a second insulating layer superjacent the second conductive layer and superjacent the area in which the second conductive layer has been removed; forming a third conductive layer superjacent the second insulating layer; planarizing the second conductive layer, the second insulating layer and the third conductive layer to a level that reaches the first insulating layer but does not reach the emitters so that at least a portion of the third conductive layer is planar with at least a portion of the second conductive layer; and coupling a first voltage to the second conductive layer and a second voltage to the third conductive layer.
- 2. The method of claim 1, further comprising selectively etching the first and the second insulating layers to define a cavity in the first insulating layer adjacent the emitter and a cavity in the second insulating layer between the second conductive layer and the third conductive layer.
- 3. The method of claim 2 wherein the act of selectively etching the first and the second insulating layers to define a cavity in the first insulating layer and a cavity in the second insulating layer comprises simultaneously etching the first and the second insulating layers to define the cavity in the first insulating layer and the cavity in the second insulating layer.
- 4. The method of claim 1, further comprising selectively etching the first and the second insulating layers to define a gate structure and a focus ring structure, respectively, wherein the first and second insulating layers are selectively etachable with respect to the second and the third conductive layers.
- 5. The method of claim 4 wherein the act of selectively etching the first and the second insulating layers define a gate structure and a focus ring structure, respectively, comprises simultaneously etching the first and the second insulating layers to define the gate structure and the focus ring structure, respectively.
- 6. The method of claim 1 wherein the act of forming the second conductive layer comprises depositing a first conductive material, and wherein the act of forming the third conductive layer comprises depositing the first conductive material.
- 7. The method of claim 1 wherein the act of forming the second conductive layer comprises depositing tungsten, and the act of forming the third conductive layer comprises depositing tungsten.
- 8. The method of claim 1, wherein the act of forming the first insulating layer comprises depositing a first dielectric material, and the act of forming the second insulating layer comprises depositing the first dielectric material.
- 9. The method of claim 1, wherein the act of forming a first insulating layer comprises depositing tetra-eythl-ortho-silicate; and the act of forming a second insulating layer comprises depositing tetra-eythl-ortho-silicate.
- 10. The method according to claim 1, wherein the act of forming a first insulating layer comprises depositing a first dielectric material, the first dielectric material being selectively etchable with respect to the first conductive material, and wherein the act of forming a second insulating layer comprises depositing the first dielectric material.
- 11. The method according to claim 1, wherein the act of planarizing at least some of the layers comprises planarizing at least some of the layers by chemical-mechanical planarization.
- 12. A method for fabricating a base plate for a field emission deive, the method comprising:providing a substrate on which a plurality of emitters are formed; depositing a first insulative layer on the substrate; depositing a second conductive layer from the first insulative layer except in areas overlaying the emitters; after removing the second conductive layer from the first insulative layer, depositing a second insulative layer on at least a portion of the second conductive layer and on areas of the first insulative area in which the second conductive layer has been removed; depositing a third conductive layer on the second insulative layer; planarizing the second conductive layer, the second insulative layer and the third conductive layer to a level that reaches the first insulative layer but does not reach the emitters so that a least a portion of the third conductive layer is planar with at least a portion of the second conductive layer; and coupling a first voltage to the second conductive layer and a second voltage to the third conductive layer.
- 13. The method of claim 12, further comprising forming a first cavity in the first insulative layer adjacent the emitter.
- 14. The method of claim 13, further comprising forming a second cavity in the second insulative layer between the second conductive layer and the third conductive layer.
- 15. The method of claim 13, wherein the act of forming a first cavity in the first insulative layer adjacent the emitter comprises selectively etching the first insulative layer to a define the first cavity.
- 16. The method of claim 12, further comprising selectively etching the first and the second insulative layers to define a gate structure and a focus ring structure, respectively, wherein the first and the second insulative layers are selectively etchable with respect to the second and the third conductive layers.
- 17. The method of claim 16, wherein the act of selectively etching the first and the second insulative layers to define a gate structure and a focus ring structure, respectively, comprises simultaneously etching the first and the second insulative layers to define the gate structure and the focus ring structure, respectively.
- 18. The method according to claim 12 wherein the act of planarizing at least some of the layers comprises planarizing at least some of the layers by chemical-mechancial planarization.
- 19. A method for fabricating a base plate for use in a field emission display, the method comprising:supplying a substrate having a cathode conductive layer and a plurality of emitters formed thereon; forming a first insulative layer over the cathode conductive layer and the plurality of emitters; forming an extraction grid layer over the first insulative layer; etching the extraction grid layer to define a plurality of gate structures, each of the gates structures being substantially aligned with a respective one of the plurality of emitters; forming a second insulative layer over the etched extraction grid layer and the first insulative layer; forming a focus ring layer over the second insulative; and planarizing at least some of the layers to an endpoint at which the emitters are at least partially exposed.
- 20. The method according to claim 19 wherein the act of planarizing at least some of the layers comprises planarizing at least some of the layers by chemical-mechanical planarization.
- 21. The method of claim 19 further comprising selectively etching the first and the second insulative layers to define cavities adjacent the emitters, the first and the second insulative layers being selectively etchable with respect to the extraction grid and focus ring layers.
- 22. The method of claim 19, wherein the act of forming an extraction grid layer comprises depositing a layer of conducting material, and the act of forming a focus ring layer comprises depositing the conducting material deposited to form the extraction grid.
- 23. The method of claim 22, wherein the acts of depositing a layer of a conducting material to form the extraction grid layer and depositing a layer of a conducting material to form the focus ring layer comprises depositing respective layers of tungsten.
- 24. The method of claim 19, wherein the act of forming a first insulative layer comprises depositing a dielectric materialand the act of forming a second insulative layer comprises depositing the dielectric material deposited to form the first insulative layer.
- 25. A method for fabricating a base plate for a field emission device, the method comprising:forming a first conductive layer on substrate, the first conductive layer having a plurality of emitters formed thereon; forming a first insulating layer superjacent the first conductive layer; forming a second conductive layer superjacent the first insulating layer; removing the second conductive layer from the first insulating layer except in areas overlaying the emitters; after removing the second conductive layer from the first insulative layer, depositing a second insulating layer superjacent the second conductive layer and superjacent areas of the first insulating area in which the second conductive layer has been removed; forming a third conductive layer superjacent the second insulating layer; planarizing the second conductive layer, the second insulating layer and the third conductive layer to a level that reaches the first insulating layer but does not reach emitters so that at least a portion of the third conductive layer is planar with at least a portion of the second conductive layer; and simultaneously forming a first insulating layer adjacent the emitter and a second cavity in the second insulating layer between the second conductive layer and the third conductive layer by simultaneously etching the first insulating layer and the second insulating layer.
- 26. The method of claim 25 wherein the act of forming the second conductive layer comprises depositing a first layer of a first conductive material, and wherein the act of forming the third conductive layer comprises depositing a second layer of the first conductive material.
- 27. The method of claim 26 wherein the acts of depositing the first and second layers of a first conductive material comprises depositing first and second layers of tungsten.
- 28. The method of claim 25 wherein the act of forming the first insulating layer comprises depositing a first layer of a first dielectric material, and the act of forming the second insulating layer comprises depositing a second layer of the first dielectric material.
- 29. The method of claim 28 wherein the acts of depositing the first and second layers of a first insualting layer comprises depositing first and second layers of tetra-eythl-ortho-silicate.
- 30. The method according to claim 25 wherein the act of forming a first insulating layer comprises depositing a first dielectric material that is selectively etchable with respect to the first conductive material, and wherein the act of forming a second insualting layer comprises depositing a second dielectric material that is selectively etchable with respect to the second conductive material.
- 31. The method according to claim 25 wherein the act of planarizing comprises planarizing by chemical-mechanical planarization.
- 32. The method of claim 25 further comprising coupling a first voltage to the second conductive layer and a second voltage to the third conductive layer.
- 33. A method for fabricating a base plate for a field emission device, the method comprising:providing a substrate on which a plurality of emitters are formed; depositing a first insulating layer on the substrate; depositing a second conductive layer on the first insulating layer; removing the second conductive layer from the first insulating layer except in areas overlaying the emitters; after removing the second conductive layer from the first insulating layer, depositing a second insulating layer on at least a portion of the second conductive layer and on areas of the first insulating area in which the second conductive layer has been removed; depositing a third conductive layer on the second insulating layer; planarizing the second conductive layer, the second insulating layer and the third conductive layer to a level that reaches the first insulating layer but does not reach the emitters so that at least a portion of the third conductive layer is planar with at least a portion of the second conductive layer; and simultaneously forming a first cavity in the first insualting layer adjacent the emitter and a second cavity in the second insulating layer between the second conductive layer and the third conductive layer by simultaneously etching the first insulating layer and the second insulating layer.
- 34. The method of claim 33, wherein the act of forming the second conductive layer comprises depositing a first layer of a first conductive material, and wherein the act of forming the third conductive layer comprises depositing a second layer of the first conductive material.
- 35. The method of claim 34 wherein the acts of depositing the first and second layers of a conductive material comprises depositing first and second layers of tungsten.
- 36. The method of claim 33 wherein the act of forming the first insulating layer comprises depositing a first layer of a first dielectric material, and the act of forming the second insulating layer comprises depositing a second layer of the first dielectric material.
- 37. The method of claim 36 wherein the acts of depositing the first and second layers of a first insulating layer comprises depositing first and second layers of tetra-eythl-ortho-silicate.
- 38. The method according to claim 33 wherein the act of forming a first insulating layer comprises depositing a first dielectric material that is selectively etchable with respect to the first conductive material, and wherein the act of forming a second insulating layer comprises depositing a second dielectric material that is selectively etchable with respect to the second conductive material.
- 39. The method according to claim 33 wherein the act of planarizing comprises planarizing by chemical-mechanical planarization.
- 40. The method of claim 33 further comprising coupling a first voltage to the second conductive layer and a second voltage to the third conductive layer.
CROSS-REFERENCE TO RELATED APPLICATION
This application is a continuation of U.S. patent application Ser. No. 09/109/955, filed Jul. 2, 1998, now U.S. Pat. No. 6,190,223.
US Referenced Citations (17)
Non-Patent Literature Citations (2)
Entry |
Tang et al., “Theory and Experiment of Field-Emitter Arrays with Planar Lens Focusing”, in Eighth International Vacuum Microelectronics Conference Technical Digest, Electron Devices society, Portland, Oregon, Jul. 30-Aug. 3, 1995, pp. 77-79. |
Kesling and Hunt, “Beam Focusing for Field Emission Flat Panel Displays,” 7th International Vacuum Microelectronics Conference, Societe Francaise du Vide, Grenoble, France, Jul. 4-7, 1994, pp. 135-138. |
Continuations (1)
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Number |
Date |
Country |
Parent |
09/109955 |
Jul 1998 |
US |
Child |
09/778316 |
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US |