BRIEF DESCRIPTION OF THE DRAWINGS
The present invention will become more fully understood from the detailed description given hereinbelow and the accompanying drawings which are given by way of illustration only, and thus are not limiting the present invention, and wherein:
FIG. 1 is a top view illustrating pertinent portions of a semiconductor device of a first embodiment;
FIG. 2 is a cross-sectional view of the composite semiconductor device taken along a line A-A of FIG. 1;
FIG. 3 illustrates the dummy pattern formed in the area of the multilayer interconnection;
FIG. 4 is a partial cross-sectional view of a semiconductor thin film having semiconductor elements fabricated on the smoothing region formed by the dummy pattern;
FIG. 5 is a top view of a composite semiconductor device incorporating the semiconductor thin film layer having a smoothing region in the circuit region;
FIG. 6 illustrates an example of the semiconductor thin film layer having a plurality of semiconductor layers;
FIG. 7 illustrates another configuration of the semiconductor thin film layer;
FIG. 8 illustrates still another configuration of the semiconductor thin film layer in which a plurality of semiconductor layers is formed;
FIG. 9 illustrates a configuration of a semiconductor thin film layer for forming light emitting elements;
FIG. 10 illustrates the semiconductor thin film layer in FIG. 9 in which etching is performed to define isolated light emitting regions;
FIG. 11 illustrates a structure of an epi-layer of a semiconductor thin film layer;
FIG. 12 is a cross-sectional view of the epi-structure of FIG. 11 which is selectively doped with an impurity of second conductivity type to form impurity diffusion regions of the second conductivity type;
FIG. 13 illustrates the smoothing region disposed closer to the center of the integrated circuit region;
FIG. 14 illustrates the smoothing region disposed on the center area of the integrated circuit region;
FIG. 15 illustrates two smoothing regions disposed side by side on the integrated circuit region;
FIG. 16 illustrates two smoothing regions disposed and being apart each other on the integrated circuit region;
FIG. 17 is a top view illustrating a pertinent portion of a composite semiconductor device of a second embodiment;
FIG. 18 is a cross-sectional view of the extended region 610 taken along a line B-B of FIG. 17;
FIG. 19 is a partial enlarged view of the dummy patterns;
FIG. 20 illustrates a dummy pattern formed in an extended region;
FIG. 21 illustrates a modification to a dummy pattern formed in the extended region;
FIG. 22 illustrates another modification to the dummy pattern formed in the extended region;
FIG. 23 illustrates still another modification to the dummy pattern formed in the extended region;
FIG. 24 illustrates yet another dummy pattern formed in the extended region;
FIG. 25 illustrates another structure of the smoothing region and the integrated circuit region;
FIG. 26 illustrates still another configuration;
FIGS. 27 and 28 illustrate a composite semiconductor device before it is diced into individual chips;
FIG. 29 is a top view illustrating a pertinent portion of a composite semiconductor device of a third embodiment;
FIG. 30 illustrates a case in which the non-patterned metal layer occupies an area smaller than the smoothing region and larger than the bonding region;
FIG. 31 illustrates a case in which the non-patterned metal layer occupies an area larger than the smoothing region;
FIG. 32 is a cross-sectional view taken along a line C-C of FIG. 30, illustrating a semiconductor thin film formed on the smoothing region;
FIG. 33 is a cross-sectional view of a composite semiconductor device of a fourth embodiment, illustrating a pertinent portion;
FIG. 34 is a top view illustrating a pertinent configuration of a composite semiconductor device of a fifth embodiment;
FIG. 35 is a top view of a modification to the composite semiconductor device;
FIG. 36 illustrates a pertinent portion of a cross section of a composite semiconductor device of a sixth embodiment;
FIG. 37 illustrates a modification to the composite semiconductor device;
FIG. 38 illustrates an LED print head that employs the composite semiconductor device according to the invention;
FIG. 39 is a top view illustrating a configuration of the LED unit; and
FIG. 40 illustrates a pertinent portion of an image forming apparatus of an eighth embodiment.