COMPOSITE SEMICONDUCTOR DEVICE, LED HEAD THAT EMPLOYS THE COMPOSITE SEMICONDUCTOR DEVICE, AND IMAGE FORMING APPARATUS THAT EMPLOYS THE LED HEAD

Abstract
A composite semiconductor device includes a substrate, a plurality of circuits, a semiconductor thin film layer, and a dummy pattern. The circuits are formed on the substrate, and include one or more wiring layers. The semiconductor thin film layer includes semiconductor elements and is disposed on an uppermost surface of the one or more layers. A dummy pattern is formed in an area where the one or more wiring layers are absent. A spin-coated layer is formed between the semiconductor thin film layer and the wiring layers. The spin-coated layer may be formed of an organic material or an oxide material.
Description

BRIEF DESCRIPTION OF THE DRAWINGS

The present invention will become more fully understood from the detailed description given hereinbelow and the accompanying drawings which are given by way of illustration only, and thus are not limiting the present invention, and wherein:



FIG. 1 is a top view illustrating pertinent portions of a semiconductor device of a first embodiment;



FIG. 2 is a cross-sectional view of the composite semiconductor device taken along a line A-A of FIG. 1;



FIG. 3 illustrates the dummy pattern formed in the area of the multilayer interconnection;



FIG. 4 is a partial cross-sectional view of a semiconductor thin film having semiconductor elements fabricated on the smoothing region formed by the dummy pattern;



FIG. 5 is a top view of a composite semiconductor device incorporating the semiconductor thin film layer having a smoothing region in the circuit region;



FIG. 6 illustrates an example of the semiconductor thin film layer having a plurality of semiconductor layers;



FIG. 7 illustrates another configuration of the semiconductor thin film layer;



FIG. 8 illustrates still another configuration of the semiconductor thin film layer in which a plurality of semiconductor layers is formed;



FIG. 9 illustrates a configuration of a semiconductor thin film layer for forming light emitting elements;



FIG. 10 illustrates the semiconductor thin film layer in FIG. 9 in which etching is performed to define isolated light emitting regions;



FIG. 11 illustrates a structure of an epi-layer of a semiconductor thin film layer;



FIG. 12 is a cross-sectional view of the epi-structure of FIG. 11 which is selectively doped with an impurity of second conductivity type to form impurity diffusion regions of the second conductivity type;



FIG. 13 illustrates the smoothing region disposed closer to the center of the integrated circuit region;



FIG. 14 illustrates the smoothing region disposed on the center area of the integrated circuit region;



FIG. 15 illustrates two smoothing regions disposed side by side on the integrated circuit region;



FIG. 16 illustrates two smoothing regions disposed and being apart each other on the integrated circuit region;



FIG. 17 is a top view illustrating a pertinent portion of a composite semiconductor device of a second embodiment;



FIG. 18 is a cross-sectional view of the extended region 610 taken along a line B-B of FIG. 17;



FIG. 19 is a partial enlarged view of the dummy patterns;



FIG. 20 illustrates a dummy pattern formed in an extended region;



FIG. 21 illustrates a modification to a dummy pattern formed in the extended region;



FIG. 22 illustrates another modification to the dummy pattern formed in the extended region;



FIG. 23 illustrates still another modification to the dummy pattern formed in the extended region;



FIG. 24 illustrates yet another dummy pattern formed in the extended region;



FIG. 25 illustrates another structure of the smoothing region and the integrated circuit region;



FIG. 26 illustrates still another configuration;



FIGS. 27 and 28 illustrate a composite semiconductor device before it is diced into individual chips;



FIG. 29 is a top view illustrating a pertinent portion of a composite semiconductor device of a third embodiment;



FIG. 30 illustrates a case in which the non-patterned metal layer occupies an area smaller than the smoothing region and larger than the bonding region;



FIG. 31 illustrates a case in which the non-patterned metal layer occupies an area larger than the smoothing region;



FIG. 32 is a cross-sectional view taken along a line C-C of FIG. 30, illustrating a semiconductor thin film formed on the smoothing region;



FIG. 33 is a cross-sectional view of a composite semiconductor device of a fourth embodiment, illustrating a pertinent portion;



FIG. 34 is a top view illustrating a pertinent configuration of a composite semiconductor device of a fifth embodiment;



FIG. 35 is a top view of a modification to the composite semiconductor device;



FIG. 36 illustrates a pertinent portion of a cross section of a composite semiconductor device of a sixth embodiment;



FIG. 37 illustrates a modification to the composite semiconductor device;



FIG. 38 illustrates an LED print head that employs the composite semiconductor device according to the invention;



FIG. 39 is a top view illustrating a configuration of the LED unit; and



FIG. 40 illustrates a pertinent portion of an image forming apparatus of an eighth embodiment.


Claims
  • 1. A composite semiconductor device, comprising: a substrate;a plurality of circuits formed on said substrate, said circuits including one or more wiring layers;a semiconductor thin film layer including semiconductor device elements and disposed on an upper most surface of the one or more wiring layers; anddummy patterns formed in the areas where the wiring patterns are not formed in each wiring layer; andthe dummy patterns are not connected to the circuit.
  • 2. The composite semiconductor device according to claim 1, wherein a spin-coated layer is formed between said semiconductor thin film layer and said the wiring layers.
  • 3. The composite semiconductor device according to claim 2, wherein the spin-coated layer is formed of an organic material.
  • 4. The composite semiconductor device according to claim 2, wherein the spin-coated layer is formed of an oxide material.
  • 5. The composite semiconductor device according to claim 1, wherein the dummy patterns are formed of a plurality of individual island structure.
  • 6. The composite semiconductor device according to claim 1, wherein the dummy pattern has a substantially the same thickness as the one or more wiring layers.
  • 7. The composite semiconductor device according to claim 1, wherein a first thickness is the thickness of the wiring pattern plus the thickness of the insulating thin film on the wiring pattern in each wiring layer, a second thickness is the thickness of the insulating thin film at the areas where the wiring patterns are not formed in each wiring layer; wherein said dummy pattern has a thickness substantially equal to a difference between the first thickness and the second thickness.
  • 8. The composite semiconductor device according to claim 5, wherein the plurality of dummy patterns are disposed such that a distance between adjacent dummy patterns is not longer than a thickness of the dummy patterns.
  • 9. The composite semiconductor device according to claim 5, the plurality of dummy patterns are disposed such that a distance between adjacent dummy patterns is not longer than or equal to 1 μm.
  • 10. The composite semiconductor device according to claim 5, wherein the plurality of dummy patterns include square patterns and rectangular patterns.
  • 11. The composite semiconductor device according to claim 5, wherein the plurality of dummy patterns are of a plurality of sizes and are disposed such that a distance between adjacent dummy patterns is one of a plurality of distances.
  • 12. The composite semiconductor device according to claim 1, wherein a non-patterned layer is formed in a region at least in one of wiring layers.
  • 13. The composite semiconductor device according to claim 1, wherein a non-patterned layer is formed on the uppermost layer of the one or more wiring layers.
  • 14. The composite semiconductor device according to claim 1, wherein the thin film layers are formed on the upper surface and on the lower surface of the dummy pattern, and the material of the thin film layer on the upper surface is the same as that on the lower surface.
  • 15. The composite semiconductor device according to claim 1, wherein said dummy pattern is formed adjacent to a region in which said plurality of circuits are formed.
  • 16. The composite semiconductor device according to claim 1, wherein plurality of semiconductor thin film layers are disposed.
  • 17. The composite semiconductor device according to claim 1, wherein roughness of a layer surface on which said semiconductor thin film layer is bonded is not greater than or equal to 10 nm.
  • 18. The composite semiconductor device according to claim 1, wherein an uppermost layer of the one or more wiring layers below said semiconductor thin film layer has a surface roughness of not greater than or equal to 200 nm.
  • 19. The composite semiconductor device according to claim 1, wherein said substrate is formed of a single crystal of Si.
  • 20. The composite semiconductor device according to claim 19, wherein said plurality of circuits includes semiconductor circuit elements formed in the single crystal of Si.
  • 21. The composite semiconductor device according to claim 1, wherein said semiconductor thin film layer includes a compound semiconductor material.
  • 22. The composite semiconductor device according to claim 1, wherein said semiconductor thin film layer includes a material of single crystal Si.
  • 23. The composite semiconductor device according to claim 21, wherein said semiconductor thin film layer is formed of a plurality of materials.
  • 24. The composite semiconductor device according to claim 22, wherein said semiconductor thin film layer is formed of a plurality of materials.
  • 25. The composite semiconductor device according to claim 1, wherein said substrate is formed of an insulating material.
  • 26. The composite semiconductor device according to claim 25, wherein the insulating material is either glass or ceramic.
  • 27. The composite semiconductor device according to claim 1, wherein said substrate is formed of a metal.
  • 28. The composite semiconductor device according to claim 1, wherein said plurality of circuits are formed of one or more materials selected from the group of amorphous Si, polysilicon Si, and an organic material.
  • 29. An LED print head, comprising: a first substrate on which driver circuits are formed and including a first wiring layer to connect the driver circuits and the semiconductor devices driven by the drivers and a second wiring layer, wherein the second wiring layer includes a wiring pattern for wiring the driver circuits on the substrate, a dummy pattern not connected to the wiring pattern and not making a circuit, and an insulating film layer that covers the wiring pattern and the dummy pattern;a semiconductor thin film that is formed on a second substrate in which light emitting elements are formed, said semiconductor thin film being bonded to said substrate such that the light emitting elements are wired to driver circuits via the first wiring layer and the semiconductor thin film is bonded on the surface above said second wiring layer; anda rod lens array that focuses light emitted from the light emitting elements on a photosensitive drum.
  • 30. An image forming apparatus for forming an image on a recording medium, the image forming apparatus using the LED print head according to claim 28, comprising: an image bearing body;an exposing unit that illuminates a charged surface of said image bearing body to form an electrostatic latent image; anda developing section that develops the electrostatic latent image.
Priority Claims (1)
Number Date Country Kind
2006-085731 Mar 2006 JP national