Conventional computing systems may include a discrete graphics processing unit (dGPU) or an integral graphics processing unit (iGPU). The discrete GPU and integral GPU are heterogeneous because of their different designs. The integrated GPU generally has relatively poor processing performance compared to the discrete GPU. However, the integrated GPU generally consumes less power compared to the discrete GPU.
The conventional operating system does not readily support co-processing using such heterogeneous GPUs. Referring to
Thereafter, the application 110 makes graphics request to the user mode level runtime API (e.g., DirectX API d3d9.dll) 120 of the operating system. The runtime 120 sends graphics requests to the DDI 130 which configures command buffers. The DDI calls to the operating system kernel mode driver (e.g., DirectX driver dxgkrnl.sys) 150, through the runtime API 120, to schedule the graphics request. The operating system kernel mode driver then calls to the device specific kernel mode driver (e.g., kmd.sys) 150 to set the command register of the GPU 170 attached to the primary display 180 to execute the graphics requests from the command buffers. The device specific kernel mode driver 160 controls the GPU 170 (e.g., integral GPU) attached to the primary display 180.
Therefore, there is a need to enable co-processing on heterogeneous GPUs. For example, it may be desired to use a first GPU to perform graphics processing for a first class of applications and a second GPU for a second class of applications depending upon processing performance and power consumption parameters.
Embodiments of the present technology are directed toward graphics co-processing. The present technology may best be understood by referring to the following description and accompanying drawings that are used to illustrate embodiment of the present technology.
In one embodiment, a graphics co-processing method includes loading and initializing a device driver interface and a device specific kernel mode driver for a graphics processing unit on a primary adapter. A device driver interface and a device specific kernel mode driver for a graphics processing unit on an unattached adapter are also loaded without the device driver interface talking back to a runtime application programming interface. A frame of red, green, blue (RGB) data is rendered on the graphics processing unit on the unattached adapter. The frame of RGB data is converted to luminance-color difference (YUV) data on the graphics processing unit on the unattached adapter. The YUV data is copied from frame buffers of the graphics processing unit on the unattached adapter to buffers in system memory. The YUV data is copied from the buffers in the system memory to texture buffers of the graphics processing unit on the primary adapter. A frame of RGB data is recovered from the YUV data in the texture buffer of the graphics processing unit on the primary adapter. The recovered frame of RGB data may then be presented, by the graphics processing unit on the primary adapter, on the primary display.
In another embodiment, a graphics co-processing method includes loading a device specific kernel mode driver of a graphics processing unit tagged as a non-graphics device. A device driver interface and a device specific kernel mode driver are loaded and initialized for a graphics processing unit on a primary adapter. A device driver interface for the graphics processing unit on a non-graphics device tagged adapter is loaded and initialized without the device driver interface talking back to a runtime application programming interface. A frame of red, green, blue (RGB) data is rendered on the graphics processing unit on the non-graphics device tagged adapter. The frame of RGB data is converted to luminance-color difference (YUV) data on the graphics processing unit on the non-graphics device tagged adapter. The YUV data from frame buffers of the graphics processing unit on the non-graphics device tagged adapter is copied to buffers in system memory. The YUV data is copied from the buffers in the system memory to texture buffers of the graphics processing unit on the primary adapter. A frame of RGB data is recovered from the YUV data in the texture buffer of the graphics processing unit on the primary adapter. Thereafter, the recovered frame of RGB data may be presented, by the graphics processing unit on the primary adapter, on the primary display.
Embodiments of the present technology are illustrated by way of example and not by way of limitation, in the figures of the accompanying drawings and in which like reference numerals refer to similar elements and in which:
Reference will now be made in detail to the embodiments of the present technology, examples of which are illustrated in the accompanying drawings. While the present technology will be described in conjunction with these embodiments, it will be understood that they are not intended to limit the invention to these embodiments. On the contrary, the invention is intended to cover alternatives, modifications and equivalents, which may be included within the scope of the invention as defined by the appended claims. Furthermore, in the following detailed description of the present technology, numerous specific details are set forth in order to provide a thorough understanding of the present technology. However, it is understood that the present technology may be practiced without these specific details. In other instances, well-known methods, procedures, components, and circuits have not been described in detail as not to unnecessarily obscure aspects of the present technology.
Embodiments of the present technology introduce a shim layer between the runtime API (e.g., DirectX) and the device driver interface (DDI) (e.g., user mode driver (UMD)) to separate the display commands from the rendering commands, allowing retargeting of rendering commands to an adapter other than the adapter the application is displaying on. In one implementation, the shim layer allows the DDI layer to redirect a runtime (e.g., Direct3D (D3D)) default adapter creation to an off-screen graphics processing unit (GPU), such as a discrete GPU, not attached to the desktop. The shim layer effectively layers the device driver interface, and therefore does not hook a system component.
Referring to
The computing device-readable media 220, 225 may be characterized as primary memory and secondary memory. Generally, the secondary memory, such as a magnetic and/or optical storage, provides for non-volatile storage of computer-readable instructions and data for use by the computing device. For instance, the disk drive 225 may store the operating system (OS), applications and data. The primary memory, such as the system memory 220 and/or graphics memory, provides for volatile storage of computer-readable instructions and data for use by the computing device. For instance, the system memory 220 may temporarily store a portion of the operating system, a portion of one or more applications and associated data that are currently used by the CPU 205, GPU 210 and the like. In addition, the GPUs 210, 215 may include integral or discrete frame buffers 211, 216.
Referring to
The shim layer library 125 has the same entry points as a conventional display driver interface (DDI). The runtime API 120 passes one or more function pointers to the shim layer 125 when calling into the applicable entry point (e.g., OpenAdapter( )) in the shim layer 125. The function pointers passed to the shim layer 125 are call backs into the runtime API 120. The shim layer 125 stores the function pointers. The shim layer 125 loads and initializes the DDI on the primary adapter 130. The DDI on the primary adapter 130 returns a data structure pointer to the shim layer 125 representing the attached adapter. The shim layer 125 also loads and initializes the device driver interface on the unattached adapter 135 by passing two function pointers which are call backs into local functions of the shim layer 125. The DDI on the unattached adapter 135 also returns a data structure pointer to the shim layer 125 representing the unattached adapter. The data structure pointers returned by the DDI on the primary adapter 130 and unattached adapter 135 are stored by the shim layer 125. The shim layer 125 returns to the runtime API 120 a pointer to a composite data structure that contains the two handles. Accordingly, the DDI on the unattached adapter 135 is able to initialize without talking back to the runtime API 120.
In one implementation, the shim layer 125 is an independent library. The independent shim layer may be utilized when the primary GPU/display and the secondary GPU are provided by different vendors. In another implementation, the shim layer 125 may be integral to the display device interface on the unattached adapter. The shim layer integral to the display device driver may be utilized when the primary GPU/display and secondary GPU are from the same vendor.
The application initialization routine (e.g., appin.dll) injected in the application also includes other entry points, one of which includes an application identifier. In one implementation, the application identifier may be the name of the application. The shim layer 125 application makes a call to the injected application initialization routine (e.g., appin.dll) to determine the application identifier when a graphics command is received. The application identifier is compared with the applications in a white list (e.g., a text file). The white list indicates an affinity between one or more applications and the second graphics processing unit. In one implementation, the white list includes one or more applications that would perform better if executed on the second graphics processing unit.
If the application identifier is not on the white list, the shim layer 125 calls the device driver interface on the primary adapter 130. The device driver interface on the primary adapter 130 sets the command buffers. The device driver interface on the primary adapter then calls, through the runtime 120 and a thunk layer 140, to the operating system kernel mode driver (e.g., DirectX driver dxgkrnl.sys) 150. The operating system kernel mode driver 160 in turn schedules the graphics command with the device specific kernel mode driver (e.g., kmd.sys) 160 for the GPU 210 attached to the primary display 240. The GPU 210 attached to the primary display 240 is also referred to hereinafter as the first GPU. The device specific kernel mode driver 160 sets command register of the GPU 210 to execute the graphics command on the GPU 210 (e.g., integral GPU) attached to the primary display 240.
If the application identifier is a match to one or more identifiers on the white list, the handle from the runtime API 120 is swapped by the shim layer 125 with functions local to the shim layer 125. For a rendering command, the local function stored in the shim layer 125 will call into the DDI on the unattached adapter 135 to set command buffer. In response, the DDI on the unattached adapter 135 will call local functions in the shim layer 125 that route the call through the thunk layer 140 to the operating system kernel mode driver 150 to schedule the rendering command. The operating system kernel mode driver 150 calls the device specific kernel mode driver (e.g., dkmd.sys) 165 for the GPU on the unattached adapter 215 to set the command registers. The GPU on the unattached adapter 215 (e.g., discrete GPU) is also referred to hereinafter as the second GPU. Alternatively, the DDI on the unattached adapter 135 can call local functions in the thunk layer 140. The thunk layer 140 routes the graphics request to the operating system kernel mode driver (e.g., DirectX driver dxgkrnl.sys) 150. The operating system kernel mode driver 150 schedules the graphics command with the device specific kernel mode driver (e.g., dkmd.sys) 165 on the unattached adapter. The device specific kernel mode driver 165 controls the GPU on the unattached adapter 215.
For a display related command (e.g., Present( )), the shim layer 125 splits the display related command received from the application 110 into a set of commands for execution by the GPU on the unattached adapter 215 and another set of commands for execution by the GPU on the primary adapter 210. In one implementation, when the shim layer 125 receives a present call from the runtime 120, the shim layer 125 calls to the DDI on the unattached adapter 135 to cause a copy the frame buffer 216 of the GPU on the unattached adapter 215 to a corresponding buffer in system memory 220. The shim layer 125 will also call the DDI on the primary adapter 130 to cause a copy from the corresponding buffer in system memory 220 to the frame buffer 211 of the GPU on the attached adapter 210 and then a present by the GPU on the attached adapter 210. The memory accesses between the frame buffers 211, 216 and system memory 220 may be direct memory accesses (DMA). To synchronize the copy and presents on the GPUs 210, 215, a display thread is created, that is notified when the copy to system memory by the second GPU 215 is done. The display thread will then queue the copy from system memory 220 and the present call into the GPU on the attached adapter 210.
In another implementation, the operating system (e.g., Window7Starter) will not load a second graphics driver 165. Referring now to
Accordingly, the embodiments described with reference to
Referring now to
The frame buffers 211, 216 and shared system memory 220 may be double or ring buffered. In a double buffered implementation, the current rendering operations is stored in a given one of the double buffers 605 and the other one of the double buffers is blitted to a corresponding given one of the double buffers of the system memory. When the rendering operation is complete, the next rendering operation is stored in the other one of the double buffers and the content of the given one of the double buffers is blitted 620 to the corresponding other one of the double buffers of the system memory. The rendering and blitting alternate back and forth between the buffers of the frame buffer of the second GPU 215. The blit to system memory is executed asynchronously. In another implementation, the frame buffer of the second GPU 215 is double buffered and the corresponding buffer in system memory 220 is a three buffer ring buffer.
After the corresponding one of the double buffers of the frame buffer 216 in the second GPU 215 is blitted 620 to the system memory 220, the second GPU 210 generates an interrupt to the OS. In one implementation, the OS is programmed to signal an event to the shim layer 125 in response to the interrupt and the shim layer 125 is programmed to wait on the event before sending a copy command 635 and a present command 645 to the first GPU 210. In a thread separate from the application thread, referred to hereinafter as the display thread, the shim layer waits for receipt of the event indicating that the copy from the frame buffer to system memory is done, referred to herein after as the copy event interrupt. A separate thread is used so that the rendering commands on the first and second GPUs 210, 215 are not stalled in the application thread while waiting for the copy event interrupt. The display thread may also have a higher priority than the application thread.
A race condition may occur where the next rendering to a given one of the double buffers for the second GPU 215 begins before the previous copy from the given buffer is complete. In such case, a plurality of copy event interrupts may be utilized. In one implementation, a ring buffer and four events are utilized.
Upon receipt of the copy event interrupt, the display thread queues the blit from system memory 220 and the present call into the first GPU 210. The first GPU 210 blits the given one of the system memory 220 buffers to a corresponding given one of the frame buffers of the first GPU 210. When the blit operation is complete, the content of the given one of the frame buffers of the first GPU 210 is presented on the primary display 240. When the next copy and present commands are received by the first GPU 210, the corresponding other of the system memory 220 buffers is blitted into the other one of the frame buffer of the first GPU 210 and then the content is presented on the primary display 240. The blit and present alternate back and forth between the double buffered frame buffer of the first GPU 210. The copy event interrupt is used to delay programming, thereby effectively delaying the scheduling of the copy from system memory 220 to the frame buffer of the first GPU 210 and presenting on the primary display 240.
In one implementation, a notification on the display side indicates that the frame has been present on the display 240 by the first GPU 210. The OS is programmed to signal an event when the command buffer causing the first GPU 210 to present its frame buffer on the display is done executing. The notification maintains synchronization where an application runs with vertical blank (vblank) synchronization.
Referring now to
Generally, the second GPU 215 is coupled to the system memory 220 by a bus having a relatively high bandwidth. However, in some systems the bus coupling the second GPU 215 may not provide sufficient bandwidth for blitting the frame buffer 216 of the second GPU 215 to system memory 220. For example, an application may be rendered at a resolution of 1280×1024 pixels. Therefore, approximately 5 MB/frame of RGB data is rendered. If the application renders at 100 frame/s, than the second GPU needs approximately 500 MB/s for blitting upstream to the system memory 220. However, a Peripheral Component Interconnect Express (PCIe) 1× bus typically used to couple the second GPU 215 system memory 220 has a bandwidth of approximately 250 MB/s in each direction. Referring now to
In one implementation, each buffer of Y, U and V samples is double buffered in the frame buffer of the second GPU 215 and the system memory 220. In addition, the Y, U and V samples copied into the first GPU 210 are double buffered as textures. In another implementation, the Y, U and V sample buffers in the second GPU 215 and corresponding texture buffers in the first GPU 210 are each double buffered. The Y, U and V sample buffered in the system memory 220 may each be triple buffered.
In one implementation, the shim layer 125 tracks the bandwidth needed for blitting and the efficiency of transfers on the bus to enable the compression or not. In another implementation, the shim layer 125 enables the YUV compression or not based on the type of application. For example, the shim layer 125 may enable compression for game application but not for technical applications such as a Computer Aided Drawing (CAD) application.
In one embodiment the white list accessed by the shim layer 125 to determine if graphics requests should be executed on the first GPU 210 or the second GPU 215 is loaded and updated by the a vendor and/or system administrator. In another embodiment, a graphical user interface can be provided to allow the user to specific the use of the second GPU (e.g., discrete GPU) 215 for rendering a given application. The user may right click on the icon for the given application. In response to the user selection, a graphical user interface may be generated that allows the user to specify the second GPU for use when rendering image for the given application. In one implementation, the operating system is programmed to populate the graphical interface with a choice to run the given application on the GPU on the unattached adapter. A routine (e.g., dynamic linked library) registered to handle this context menu item will scan the shortcut link to the application, gather up the options and argument, and then call an application launcher that will spawn a process to launch the application as well as setting an environment variable that will be read by the shim layer 125. In response, the shim layer 125 will run the graphics context for the given application on the second GPU 215. Therefore, the user can override, update, or the like, the white list loaded on the computing device.
Referring now to
In another implementation, the second graphics processing unit may support a set of rendering application programming interfaces and the first graphics processing unit may support a limited subset of the same application programming interfaces. An application programming interface is implemented by a different runtime API 120 and a matching driver interface 130. Referring now to
The shim layer 125 includes a translation layer 126 that translates calls between the runtime API 120 device driver interface and the device driver interface class. In one implementation, the shim layer 125 translates display commands between the DirectX10 runtime API 120 and the DirectX9 DDI on the primary adapter 130. The shim layer, therefore, creates a Dx9 compatible context on the first GPU 210, which is the recipient of frames rendered by the Dx10 class second GPU 215. The shim layer 125 advantageously splits graphics commands into rendering and display commands, redirects the rendering commands to the DDI on the unattached adapter 135 and the display commands to the DDI on the primary adapter 130. The shim layer also translates between the commands for the Dx9 DDI on the primary adapter 130, the Dx10 DDI on the unattached adapter 135, the Dx10 runtime API 120 and Dx10 thunk layer 140, and provides for format conversion of necessary. The shim layer 125, in one implementation, intercepts commands from the Dx10 runtime 120 and translates these into the DX9 DDI on the primary adapter (e.g., iUMD.dll). The commands may include: CreateResource, OpenResource, DestroyResource, DxgiPresent—which triggers the surface transfer mechanism that ends up with the surface displayed on the iGPU, DxgiRotateResourceIdentities, DxgiBlt—present blits are translated, and DxgiSetDisplayMode.
The Dx9 DDI 130 for the first GPU 210 cannot talkback directly through the runtime 120 to talk to a graphics adapter handled by an OS specific kernel mode driver because the runtime 120 expects the call to come from a Dx10 device. The shim layer 125 intercepts callbacks from the Dx9 DDI and exchanges device handles, before forwarding the callback to the Dx10 runtime API 120, which expects the calls to come from a Dx10 device. Dx10 and Dx11 runtime APIs 120 use a layer for presentation called DXGI, which has its own present callback, not existing in the Dx9 callback interface. Therefore, when the display side DDI on the primary adapter calls the present callback, the shim layer translates it to a DXGI callback. For example:
PFND3DDDI_PRESENTCB->PFNDDXGIDDI_PRESENTCB
The shim layer 125 may also include a data structure 127 for converting display formats between the first graphics processing unit DDI and the second graphics processing unit DDI. For example, the shim layer 125 may include a lookup table to convert a 10 bit rendering format in Dx10 to an 8 bit format supported by the Dx9 class integrated GPU 210. The rendered frame may be copied to a staging surface, a two-dimensional (2D) engine of the discrete GPU 215 utilizes the lookup table to convert the rendered frame to a Dx9 format. The Dx9 format frame is then copied to the frame buffer of the integrated GPU 210 and then presented on the primary display 240. For example, the following format conversions may be performed:
DXGI_FORMAT_R16G16B16A16_FLOAT(render)->D3DDDIFMT_A8R8G8B8(display),
DXGI_FORMAT_R10G10B10A2_UNORM(render)->D3DDDIFMT_A8R8G8B8(display).
In one implementation, the copying and conversion can happen as an atomic operation.
The foregoing descriptions of specific embodiments of the present technology have been presented for purposes of illustration and description. They are not intended to be exhaustive or to limit the invention to the precise forms disclosed, and obviously many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the present technology and its practical application, to thereby enable others skilled in the art to best utilize the present technology and various embodiments with various modifications as are suited to the particular use contemplated. It is intended that the scope of the invention be defined by the claims appended hereto and their equivalents.
This claims the benefit of U.S. Provisional Patent Application No. 61/243,155 filed Sep. 16, 2009 and U.S. Provisional Patent Application No. 61/243,164 filed Sep. 17, 2009.
| Number | Name | Date | Kind |
|---|---|---|---|
| 4208810 | Rohner et al. | Jun 1980 | A |
| 4918626 | Watkins et al. | Apr 1990 | A |
| 5081594 | Horsley | Jan 1992 | A |
| 5212633 | Franzmeier | May 1993 | A |
| 5237460 | Miller et al. | Aug 1993 | A |
| 5287438 | Kelleher | Feb 1994 | A |
| 5313287 | Barton | May 1994 | A |
| 5432898 | Curb et al. | Jul 1995 | A |
| 5446836 | Lentz et al. | Aug 1995 | A |
| 5452104 | Lee | Sep 1995 | A |
| 5452412 | Johnson, Jr. et al. | Sep 1995 | A |
| 5483258 | Cornett et al. | Jan 1996 | A |
| 5543935 | Harrington | Aug 1996 | A |
| 5570463 | Dao | Oct 1996 | A |
| 5594854 | Baldwin et al. | Jan 1997 | A |
| 5623692 | Priem et al. | Apr 1997 | A |
| 5633297 | Valko et al. | May 1997 | A |
| 5664162 | Dye | Sep 1997 | A |
| 5734744 | Wittenstein et al. | Mar 1998 | A |
| 5790705 | Anderson et al. | Aug 1998 | A |
| 5815162 | Levine | Sep 1998 | A |
| 5854631 | Akeley et al. | Dec 1998 | A |
| 5854637 | Sturges | Dec 1998 | A |
| 5872902 | Kuchkuda et al. | Feb 1999 | A |
| 5977987 | Duluk, Jr. | Nov 1999 | A |
| 6003083 | Davies et al. | Dec 1999 | A |
| 6026180 | Wittenstein et al. | Feb 2000 | A |
| 6028608 | Jenkins | Feb 2000 | A |
| 6034699 | Wong et al. | Mar 2000 | A |
| 6072500 | Foran et al. | Jun 2000 | A |
| 6104407 | Aleksic et al. | Aug 2000 | A |
| 6104417 | Nielsen et al. | Aug 2000 | A |
| 6115049 | Winner et al. | Sep 2000 | A |
| 6118394 | Onaya | Sep 2000 | A |
| 6128000 | Jouppi et al. | Oct 2000 | A |
| 6137918 | Harrington et al. | Oct 2000 | A |
| 6160557 | Narayanaswami | Dec 2000 | A |
| 6160559 | Omtzigt | Dec 2000 | A |
| 6181822 | Miller et al. | Jan 2001 | B1 |
| 6188394 | Morein et al. | Feb 2001 | B1 |
| 6201545 | Wong et al. | Mar 2001 | B1 |
| 6204859 | Jouppi et al. | Mar 2001 | B1 |
| 6219070 | Baker et al. | Apr 2001 | B1 |
| 6249853 | Porterfield | Jun 2001 | B1 |
| 6259460 | Gossett et al. | Jul 2001 | B1 |
| 6323874 | Gossett | Nov 2001 | B1 |
| 6356588 | Otto | Mar 2002 | B1 |
| 6359623 | Larson | Mar 2002 | B1 |
| 6362819 | Dalal et al. | Mar 2002 | B1 |
| 6366289 | Johns | Apr 2002 | B1 |
| 6429877 | Stroyan | Aug 2002 | B1 |
| 6437780 | Baltaretu et al. | Aug 2002 | B1 |
| 6452595 | Montrym et al. | Sep 2002 | B1 |
| 6469707 | Voorhies | Oct 2002 | B1 |
| 6480205 | Greene et al. | Nov 2002 | B1 |
| 6501564 | Schramm et al. | Dec 2002 | B1 |
| 6504542 | Voorhies et al. | Jan 2003 | B1 |
| 6522329 | Ihara et al. | Feb 2003 | B1 |
| 6523102 | Dye et al. | Feb 2003 | B1 |
| 6525737 | Duluk, Jr. et al. | Feb 2003 | B1 |
| 6529207 | Landau et al. | Mar 2003 | B1 |
| 6545684 | Dragony et al. | Apr 2003 | B1 |
| 6606093 | Gossett et al. | Aug 2003 | B1 |
| 6611272 | Hussain et al. | Aug 2003 | B1 |
| 6614444 | Duluk, Jr. et al. | Sep 2003 | B1 |
| 6614448 | Garlick et al. | Sep 2003 | B1 |
| 6624823 | Deering | Sep 2003 | B2 |
| 6633197 | Sutardja | Oct 2003 | B1 |
| 6633297 | McCormack et al. | Oct 2003 | B2 |
| 6646639 | Greene et al. | Nov 2003 | B1 |
| 6671000 | Cloutier | Dec 2003 | B1 |
| 6693637 | Koneru et al. | Feb 2004 | B2 |
| 6693639 | Duluk, Jr. et al. | Feb 2004 | B2 |
| 6697063 | Zhu | Feb 2004 | B1 |
| 6704022 | Aleksic | Mar 2004 | B1 |
| 6717576 | Duluk, Jr. et al. | Apr 2004 | B1 |
| 6717578 | Deering | Apr 2004 | B1 |
| 6734861 | Van Dyke et al. | May 2004 | B1 |
| 6741247 | Fenney | May 2004 | B1 |
| 6747057 | Ruzafa et al. | Jun 2004 | B2 |
| 6765575 | Voorhies et al. | Jul 2004 | B1 |
| 6778177 | Furtner | Aug 2004 | B1 |
| 6788301 | Thrasher | Sep 2004 | B2 |
| 6798410 | Redshaw et al. | Sep 2004 | B1 |
| 6803916 | Ramani et al. | Oct 2004 | B2 |
| 6819332 | Baldwin | Nov 2004 | B2 |
| 6833835 | van Vugt | Dec 2004 | B1 |
| 6901497 | Tashiro et al. | May 2005 | B2 |
| 6906716 | Moreton et al. | Jun 2005 | B2 |
| 6938176 | Alben et al. | Aug 2005 | B1 |
| 6940514 | Wasserman et al. | Sep 2005 | B1 |
| 6947057 | Nelson et al. | Sep 2005 | B2 |
| 6956579 | Diard et al. | Oct 2005 | B1 |
| 6961057 | Van Dyke et al. | Nov 2005 | B1 |
| 6978317 | Anantha et al. | Dec 2005 | B2 |
| 7002591 | Leather et al. | Feb 2006 | B1 |
| 7009607 | Lindholm et al. | Mar 2006 | B2 |
| 7009615 | Kilgard et al. | Mar 2006 | B1 |
| 7039241 | Van Hook | May 2006 | B1 |
| 7061495 | Leather | Jun 2006 | B1 |
| 7061640 | Maeda | Jun 2006 | B1 |
| 7064771 | Jouppi et al. | Jun 2006 | B1 |
| 7075542 | Leather | Jul 2006 | B1 |
| 7081902 | Crow et al. | Jul 2006 | B1 |
| 7119809 | McCabe | Oct 2006 | B1 |
| 7126600 | Fowler et al. | Oct 2006 | B1 |
| 7154066 | Talwar et al. | Dec 2006 | B2 |
| 7158148 | Toji et al. | Jan 2007 | B2 |
| 7167259 | Varga | Jan 2007 | B2 |
| 7170515 | Zhu | Jan 2007 | B1 |
| 7184040 | Tzvetkov | Feb 2007 | B1 |
| 7224364 | Yue et al. | May 2007 | B1 |
| 7243191 | Ying et al. | Jul 2007 | B2 |
| 7307628 | Goodman et al. | Dec 2007 | B1 |
| 7307638 | Leather et al. | Dec 2007 | B2 |
| 7308146 | Becker et al. | Dec 2007 | B2 |
| 7317459 | Fouladi et al. | Jan 2008 | B2 |
| 7382368 | Molnar et al. | Jun 2008 | B1 |
| 7453466 | Hux et al. | Nov 2008 | B2 |
| 7478187 | Knepper et al. | Jan 2009 | B2 |
| 7483029 | Crow et al. | Jan 2009 | B2 |
| 7548996 | Baker et al. | Jun 2009 | B2 |
| 7551174 | Iourcha et al. | Jun 2009 | B2 |
| 7565028 | Saed | Jul 2009 | B2 |
| 7633506 | Leather et al. | Dec 2009 | B1 |
| 7634637 | Lindholm et al. | Dec 2009 | B1 |
| 7791617 | Crow et al. | Sep 2010 | B2 |
| 7965902 | Zelinka et al. | Jun 2011 | B1 |
| 8063903 | Vignon et al. | Nov 2011 | B2 |
| 8111928 | Van Hook et al. | Feb 2012 | B2 |
| 8411942 | Chen et al. | Apr 2013 | B2 |
| 8427487 | Crow | Apr 2013 | B1 |
| 8427496 | Tamasi et al. | Apr 2013 | B1 |
| 20010005209 | Lindholm et al. | Jun 2001 | A1 |
| 20020050979 | Oberoi et al. | May 2002 | A1 |
| 20020061063 | Otto | May 2002 | A1 |
| 20020097241 | McCormack et al. | Jul 2002 | A1 |
| 20020130863 | Baldwin | Sep 2002 | A1 |
| 20020140655 | Liang et al. | Oct 2002 | A1 |
| 20020158885 | Brokenshire et al. | Oct 2002 | A1 |
| 20020196251 | Duluk, Jr. et al. | Dec 2002 | A1 |
| 20030067468 | Duluk, Jr. et al. | Apr 2003 | A1 |
| 20030076325 | Thrasher | Apr 2003 | A1 |
| 20030122815 | Deering | Jul 2003 | A1 |
| 20030163589 | Bunce et al. | Aug 2003 | A1 |
| 20030194116 | Wong et al. | Oct 2003 | A1 |
| 20030201994 | Taylor et al. | Oct 2003 | A1 |
| 20040085313 | Moreton et al. | May 2004 | A1 |
| 20040130552 | Duluk, Jr. et al. | Jul 2004 | A1 |
| 20040183801 | Deering | Sep 2004 | A1 |
| 20040196285 | Rice et al. | Oct 2004 | A1 |
| 20040207642 | Crisu et al. | Oct 2004 | A1 |
| 20040246251 | Fenney et al. | Dec 2004 | A1 |
| 20050030314 | Dawson | Feb 2005 | A1 |
| 20050041037 | Dawson | Feb 2005 | A1 |
| 20050066148 | Luick | Mar 2005 | A1 |
| 20050122338 | Hong et al. | Jun 2005 | A1 |
| 20050134588 | Aila et al. | Jun 2005 | A1 |
| 20050134603 | Iourcha et al. | Jun 2005 | A1 |
| 20050152610 | Hagiwara et al. | Jul 2005 | A1 |
| 20050179698 | Vijayakumar et al. | Aug 2005 | A1 |
| 20050259100 | Teruyama | Nov 2005 | A1 |
| 20060044317 | Bourd et al. | Mar 2006 | A1 |
| 20060170690 | Leather | Aug 2006 | A1 |
| 20060203005 | Hunter | Sep 2006 | A1 |
| 20060215923 | Beatty | Sep 2006 | A1 |
| 20060245001 | Lee et al. | Nov 2006 | A1 |
| 20060267981 | Naoi | Nov 2006 | A1 |
| 20060282604 | Temkine et al. | Dec 2006 | A1 |
| 20070008324 | Green | Jan 2007 | A1 |
| 20070129990 | Tzruya et al. | Jun 2007 | A1 |
| 20070139440 | Crow et al. | Jun 2007 | A1 |
| 20070268298 | Alben et al. | Nov 2007 | A1 |
| 20070273689 | Tsao | Nov 2007 | A1 |
| 20070296725 | Steiner et al. | Dec 2007 | A1 |
| 20080024497 | Crow et al. | Jan 2008 | A1 |
| 20080024522 | Crow et al. | Jan 2008 | A1 |
| 20080034238 | Hendry et al. | Feb 2008 | A1 |
| 20080100618 | Woo et al. | May 2008 | A1 |
| 20080158233 | Shah et al. | Jul 2008 | A1 |
| 20080273218 | Kitora et al. | Nov 2008 | A1 |
| 20090153540 | Blinzer et al. | Jun 2009 | A1 |
| 20090172707 | Huang et al. | Jul 2009 | A1 |
| 20100226441 | Tung et al. | Sep 2010 | A1 |
| 20110194616 | He et al. | Aug 2011 | A1 |
| Number | Date | Country |
|---|---|---|
| 101093578 | Dec 2007 | CN |
| 06180758 | Jun 1994 | JP |
| 10134198 | May 1998 | JP |
| 11195132 | Jul 1999 | JP |
| 2005182547 | Jul 2005 | JP |
| 0013145 | Mar 2000 | WO |
| Entry |
|---|
| A Hardware Assisted Design Rule Check Architecture Larry Seller Jan. 1982 Proceedings of the 19th Conference on Design Automation DAC '82 Publisher: IEEE Press. |
| A Parallel Alogorithm for Polygon Rasterization Juan Pineda Jun. 1988 ACM. |
| A VLSI Architecture for Updating Raster-Scan Displays Satish Gupta, Robert F. Sproull, Ivan E. Sutherland Aug. 1981 ACM SIGGRAPH Computer Graphics, Proceedings of the 8th Annual Conference on Computer Graphics and Interactive Techniques SIGGRAPH '81, vol. 15 Issue Publisher: ACM Press. |
| Blythe, OpenGL section 3.4.1, Basic Line Segment Rasterization, Mar. 29, 1997, pp. 1-3. |
| Boyer, et al.; “Discrete Analysis for Antialiased Lines;” Eurographics 2000; 3 Pages. |
| Crow; “The Use of Grayscale for Improves Raster Display of Vectors and Characters;” University of Texas, Austin, Texas; Work supported by the National Science Foundation unser Grants MCS 76-83889; pp. 1-5: ACM Press. |
| Foley, J. “Computer Graphics: Principles and Practice”, 1987, Addison-Wesley Publishing, 2nd Edition, p. 545-546. |
| Fuchs; “Fast Spheres Shadow, Textures, Transparencies, and Image Enhancements in Pixel-Planes”; ACM; 1985; Department of Computer Science, University of North Carolina at Chapel Hill, Chapel Hill, NC 27514. |
| Number | Date | Country | |
|---|---|---|---|
| 20110063302 A1 | Mar 2011 | US |
| Number | Date | Country | |
|---|---|---|---|
| 61243155 | Sep 2009 | US | |
| 61243164 | Sep 2009 | US |