Embodiments of the invention relate generally to computation of processor clock frequency ratios on multi-processor systems without a common frequency clock source.
The speed at which a processor performs basic operations is known as the “clock rate”. These basic processor operations include, for example, adding two numbers or transferring a value from one register to another register. The clock rate is usually given in Mega-Hertz (millions of cycles per seconds). The clock rate of a processor is normally determined by the frequency of vibration of a quartz crystal that sends pulses (clock signals) to the processor.
In a processor, counters are used to count the sequence of operations that are performed by the processor in accordance with programmed instructions and to call forth the next operation from memory when the preceding instruction has been completed. When processors are accessing (e.g., reading) a shared memory in a multi-processor system, there is a delay between the read request from memory and the actual return of the data to the processor from shared memory. These delays are caused by an uncontrollable event such as, for example, another processor in the system attempting to read the same value in the shared memory or due to the instructions that need to be executed by the processor between the request occurrence and the actual read occurrence.
Multi-processor systems typically compute a processor clock frequency ratio that relates one processor's counter increment rate to another processor's counter increment rate. In a computer system where there is no common frequency clock source, the frequency ratio is calculated based on the difference in magnitude between two counters on different processors over a known interval. Therefore, the calculated frequency ratio can be used to translate one processor's counter value to the other processor's counter value. This translation of independent processor counter values to a common frequency can be used to implement a software based globally accessible common frequency counter within a multi-processor system. However, current methods do not use this frequency ratio to accurately compute a value of a counter in a processor when latencies occur in a multi-processor system.
Therefore, the current technology is limited in its capabilities and suffers from at least the above constraints and deficiencies.
Non-limiting and non-exhaustive embodiments of the present invention are described with reference to the following figures, wherein like reference numerals refer to like parts throughout the various views unless otherwise specified.
In the description herein, numerous specific details are provided, such as examples of components and/or methods, to provide a thorough understanding of embodiments of the invention. One skilled in the relevant art will recognize, however, that an embodiment of the invention can be practiced without one or more of the specific details, or with other apparatus, systems, methods, components, materials, parts, and/or the like. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring aspects of embodiments of the invention.
For purposes of describing the problems solved by embodiments of the invention
The time interval 202 is used to compute the processor clock frequency ratio (i.e., “Ratio”). In prior methods, the time interval 202 can be set to various suitable values (e.g., approximately 500 milliseconds) or is increased in time value (e.g., greater than approximately 500 milliseconds) as discussed below with reference to
The frequency ratio of Counter A to Counter B is equal to Ratio=1.00285 and is determined for the time interval 202 by use of equation (1):
The parameter, C1.start, is the counter B value at the beginning of time interval 202. In the example of
The frequency ratio, Ratio=1.00285, would be applied at the end of the time interval 203, where Counter A has a value of 0 at the beginning of time interval 203 and Counter A has a value of 15999 at the end of time interval 203. When the Counter A has a value of 16000, a new frequency ratio is computed in the time interval defined from Counter A value of 8000 to Counter A value of 16000, and the new frequency ratio will be applied at the end of a new time interval defined from Counter A value 0 to Counter A value 23999.
The frequency ratio is multiplied to value of Counter A at the end of time interval 203, in order to compute the value of Counter B at end of time interval 203 (i.e., “Computed B”), as shown in equation (2). At the end of time interval 203, Counter A has a value of 15999.
The expected value for counter B at then end of the time interval 203 where the frequency ratio is applied (i.e., “Expected B”), is determined by equation (3). The last known value of counter B of 8020 was previously measured at the end of time interval 202. The number of counts that have elapsed on Counter A (from the last known Counter A value of 8000 to the end of the time interval 203 where the frequency ratio is applied) is defined by the time interval 206. The time interval 206 in the example of
The measured error (i.e., “Max Error”) between the computed value of Counter B at the end of time interval 203 where the frequency ratio is used (Computed B) and the expected value for counter B at then end of the time interval 203 where the frequency ratio used is Max Error=25.59 counts, as shown in equation (4).
Therefore, prior methods do not accurately compute the Computed B value by use of the frequency ratio when latencies occur in a multi-processor system. As mentioned above, accurate computation of counter values when latencies occur is useful for time synchronization within a multi-processor system.
Specifically, in
The frequency ratio, Ratio=1.00000285, would be multiplied to the counter A value of 15999999 at the end of the time interval 303, in order to calculate the Computed B value as shown in equation (6).
The last known value of counter B of 8000020 was previously measured at the end of time interval 302. The number of counts that have elapsed on Counter A (from the last known Counter A value of 8000000 to the end of the time interval 303 where the frequency ratio is applied) is defined by the time interval 306. The time interval 306 in the example of
The measured error (i.e., “Max Error”) between the computed value of Counter B at the end of time interval 303 where the frequency ratio is used (Computed B) and the expected value for counter B at then end of the time interval 303 where the frequency ratio is used is Max Error=25.0 counts, as shown in equation (8).
Therefore, this prior method that increases the time interval 303 for calculating the frequency ratio also does not accurately compute the Computed B value.
The processor 415 includes a Counter B that counts the sequence of operations that are performed by the processor 415. The processor 415 also receives clock signals 416 from a clock source 417.
A computation engine 420 reads the Counters A and B, performs a calculation of the frequency ratio, the Computed B value, the Expected B value, and the Max Error value, and stores in a buffer 425 various values such as the frequency ratio values 450 for frequency ratio computation intervals 454 (e.g., time intervals 502 and 602 in
The buffer 425 is, for example, a circular buffer, FIFO buffer, or other suitable structure that permits a range of values to be stored, calculated, and modified over time, so that the computation engine 420 can perform the calculations discussed below with reference to
The computation engine 420 includes the hardware and software elements that permit reading of the Counters A and B values, the calculations of the values for the frequency ratio (Ratio), Computed B, Expected B, and Max Error, and the performing of the windowing algorithm that chooses intervals for computing the frequency ratio and the intervals where the frequency ratio is applied as discussed below in
The variation in the counters due to latencies in accessing the shared memory 405 (
The computation engine 425 applies this first frequency ratio value of 1.00285 to a time interval 503 (i.e., frequency ratio valid interval 503). The time interval 503 can be set in the engine 425 to various values (e.g., approximately 10 milliseconds) and can be adjusted to other values as well so that the Max Error value is reduced further. In an embodiment of the invention, the interval 503 occurs after the interval 502, and the interval 503 does not overlap with the interval 502 as shown in
Computed B=8999×1.00285
Computed B=9024.64 (10)
The last known value of counter B of 8020 was previously measured by the computation engine 420 at the end of time interval 502. The number of counts that have elapsed on Counter A (from the last known Counter A value of 8000 as measured by the computation engine 420, to the end of the time interval 503 where the frequency ratio is applied) is defined by the time interval 503 also. The time interval 303 in the example of
As a result, the measured error (i.e., “Max Error”) between the computed value of Counter B at the end of time interval 503 where the first frequency ratio is used (Computed B) and the expected value for counter B at the end of the time interval 503 where the frequency ratio is used is advantageously reduced to 5.64 counts, as shown in equation (12).
Therefore, the method in
Note that the computation engine 420 can be programmed so that the time intervals 502 and 503 can be set to other values. By varying the values of the time intervals 502 and 503, the Max Error value can potentially be decreased further in equation (12) above. For example, if the computation engine 420 is programmed so that the time interval 503 is decreased, resulting in only 888 counts for Counter A in the reduced time interval 503, then the Max Error value in equation (12) will advantageously decrease to 5.33 counts as compared to the previous value of 5.64 counts.
The time interval 602 begins with the Counter A value at 2000 and ends with the Counter A value at 9000. This next frequency ratio of Counter A to Counter B is equal to Ratio=1.00285 as determined by equation (13):
The computation engine 425 applies this frequency ratio value of 1.00 to time interval 603. This time interval 603 begins with the Counter A value at 9000 and ends with the Counter A value at 9999 in the example of
Computed B=9999×1.00
Computed B=9999 (14)
The last known value of counter B of 9000 was previously measured by the computation engine 420 at the end of time interval 602. The number of counts that have elapsed on Counter A (from the last known Counter A value of 9000 as measured by the computation engine 420, to the end of the time interval 603 where the frequency ratio is applied) is defined by the time interval 603 also. The time interval 603 in the example of
Therefore, the measured error (i.e., “Max Error”) between the computed value of Counter B at the end of time interval 503 where the first frequency ratio is used (Computed B) and the expected value for counter B at the end of the time interval 503 where the frequency ratio is used is 0.0 counts, as shown in equation (16).
Therefore, the method in
In block 710, the computation engine 420 determines the frequency ratio and the Computed B value. The computation engine 420 determines the values in block 710 by reading the counter values of a first counter and a second counter within the time intervals discussed above and based on the various equations discussed above.
In block 715, the computation engine 420 determines the Expected B value and the Max Error value. The Max Error value is the difference between the Computed B value and the Expected B value as discussed above.
Embodiments of the invention advantageously permit accurate computation of counter values when latencies occur, and these values are useful for time synchronization within a multi-processor system. Embodiments of the invention also advantageously provide a method of determining the frequency ratio and using the frequency ratio to calculate counter values when memory latency occurs in the multi-processor system. Additionally, embodiments of the invention advantageously do not require significant additional hardware and software overhead in order to perform the methods discussed above. In addition, embodiments of the invention advantageously permit various time intervals to be adjusted or fine-tuned so that the Max Error value can be further reduced as discussed above. As an additional advantage, embodiments of the invention avoids the complex floating points calculation of the Network Time Protocol (RFC-1305) which is designed for the different environment of synchronizing time in long latency networks such as the Internet.
It is also within the scope of the present invention to implement a program or code that can be stored in a machine-readable or computer-readable medium to permit a computer to perform any of the inventive techniques described above, or a program or code that can be stored in an article of manufacture that includes a computer readable medium on which computer-readable instructions for carrying out embodiments of the inventive techniques are stored. Other variations and modifications of the above-described embodiments and methods are possible in light of the teaching discussed herein.
The above description of illustrated embodiments of the invention, including what is described in the Abstract, is not intended to be exhaustive or to limit the invention to the precise forms disclosed. While specific embodiments of, and examples for, the invention are described herein for illustrative purposes, various equivalent modifications are possible within the scope of the invention, as those skilled in the relevant art will recognize.
These modifications can be made to the invention in light of the above detailed description. The terms used in the following claims should not be construed to limit the invention to the specific embodiments disclosed in the specification and the claims. Rather, the scope of the invention is to be determined entirely by the following claims, which are to be construed in accordance with established doctrines of claim interpretation.
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