Patent Application
20130017717
1. Technical Field
The present disclosure relates to power on self test (POST) cards, particular to a POST card which can electrically connect to computer motherboards with different interfaces.
2. Description of Related Art
Current POST cards typically have only one low pin count (LPC) bus and thus can only connect to computer motherboards that include an interface compatible with the LPC bus. However, there are many kinds of computer motherboards and not all may have an interface compatible with the bus on the POST card.
Therefore, there is room for improvement within the art.
Many aspects of the present disclosure can be better understood with reference to the following drawings. The elements in the drawings are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the disclosure.
The FIGURE is a block diagram of a POST card according to an embodiment.
In general, the word “module” as used herein, refers to logic embodied in hardware or firmware, or to a collection of detect module instructions, written in a programming language, such as, for example, Java, C, or in assembly. One or more detect module instructions in the module may be embedded in firmware, such as in an EPROM. It will be appreciated that a module may comprise connected logic units, such as gates and flip-flops, and may comprise programmable units, such as programmable gate arrays or processors. The modules described herein may be implemented as either detect module and/or hardware module and may be stored in any type of computing system-readable medium or other computing system storage device.
The connector module 20 is configured for connecting the POST card 100 to an LPC bus on a computer motherboard (not shown) to run a diagnostic check on the POST card. The connector module 20 is configured as universal connectors that can be used with any motherboard having an LPC bus. The connector module 20 includes a first connector 21, a second connector 23, and a third connector 25. The first connector 21, the second connector 23, and the third connector 25 are electrically connected to the logic unit 30, configured to enable the POST card 100 to electrically connect to a computer motherboard with different LPC buses. In the exemplary embodiment, both the first connector 21 and the second connector 23 are universal pin connector with different specified pin spacing and/or pin order, and the pin spacing of the first connector 21 is 2.54 mm, the pin spacing of the second connector 23 is 2.00 mm. The third connector 25 is a USB connector or a universal pin connector which is different from the first connector 21 and the second connector 23 in pin spacing and/or pin order, electrically connected to a motherboard by a suitable transmission line. As such, the connector module 20 can be directly connected to a computer motherboard with an interface compatible with either the first connector 21 or the second connector 23, and for motherboards not compatible with the connectors 21, 23 the module 20 can be connected via the third connector 25 and a suitable transmission line, for example, a coaxial-cable or a USB data line. Thus, the connector module 20 is an universal connector for LPC bus connections.
In the exemplary embodiment, the first connector 21 and the second connector 23 are positioned on opposite edges of the card body 10. In use, the POST card 100 can be connected to a computer motherboard via the first connector 21, or the card body 10 rotated and the second connector 23 used.
The logic unit 30 is configured to read a diagnostic signal generated by the computer motherboard which is connected to the connector module 20 during a boot up sequence of the computer motherboard, and then transmit the signal to the microchip 50.
The microchip 50 is programmed to diagnose problems with the computer motherboard and provide diagnostic codes accordingly. The microchip 50 pre-stores different kinds of POST codes and character information corresponding to the POST codes from different companies, for example, PHOENIX, AMI, AWARD, and so on. The microchip 50 is programmed to translate the signals from the motherboards to POST codes, and compare the translated POST codes to the pre-stored POST codes in the microchip 50, to find corresponding character information. The microchip 50 sends the translated POST codes and corresponding character information to the display module 70, to display the diagnostic results.
In the exemplary embodiment, the logic unit 30 can receive diagnostic signal from three different address-ports, for example, port 80, port 84, port 85, and so on. Thereafter, when the diagnostic signal is too large to transmit through a single address-port, the POST card 100 can use three address-ports at the same time.
In addition, the microchip 50 can detect whether the POST card 10 is connected to a motherboard via the first connector 21 or the second connector 23, and adjust how information is displayed on the display 70 accordingly for the convenience of the user.
In the exemplary embodiment, the display module 70 includes four display units. Three of the display units are mounted on one surface of the card board 10, to display diagnostic results from the three address-ports. The other display unit is mounted on the opposite surface of the card board 10, to display diagnostic results from any address-port. Thus, the diagnostic results can be read from either side of the card board 10.
The indicating module 90 may comprise three indicator lights such as a red, a green, and a yellow light. As an example, in this embodiment, a red light indicates the POST card 100 is on, green indicates the POST card 100 is performing diagnostic testing, and yellow indicates the POST card 100 clearing and resetting for next test.
It is believed that the exemplary embodiments and their advantages will be understood from the foregoing description, and it will be apparent that various changes may be made thereto without departing from the spirit and scope of the disclosure or sacrificing all of its material advantages, the examples hereinbefore described merely being preferred or exemplary embodiments of the disclosure.
| Number | Date | Country | Kind |
|---|---|---|---|
| 201120248309.4 | Jul 2011 | CN | national |
