This application claims priority to Chinese Patent Application No. 201510183288.5 filed on Apr. 17, 2015, the contents of which are incorporated by reference herein in its entirety.
The subject matter herein generally relates to a computer recovery circuit.
In electronics and particularly in computer electronics, the host computer sometimes malfunctions and shutdowns. A power button of the host computer needs to be pressed for a period of time to restart the host computer.
Implementations of the present technology will now be described, by way of example only, with reference to the attached figures.
It will be appreciated that for simplicity and clarity of illustration, where appropriate, reference numerals have been repeated among the different figures to indicate corresponding or analogous elements. In addition, numerous specific details are set forth in order to provide a thorough understanding of the embodiments described herein. However, it will be understood by those of ordinary skill in the art that the embodiments described herein can be practiced without these specific details. In other instances, methods, procedures and components have not been described in detail so as not to obscure the related relevant feature being described. Also, the description is not to be considered as limiting the scope of the embodiments described herein. The drawings are not necessarily to scale and the proportions of certain parts may be exaggerated to better illustrate details and features of the present disclosure.
Several definitions that apply throughout this disclosure will now be presented.
The term “coupled” is defined as connected, whether directly or indirectly through intervening components, and is not necessarily limited to physical connections. The connection can be such that the objects are permanently connected or releasably connected. The term “comprising,” when utilized, means “including, but not necessarily limited to”; it specifically indicates open-ended inclusion or membership in the so-described combination, group, series and the like. “Unit” means a collection of electronic hardware alone or in combination with software configured for a particular task or function, although units may overlap or share components.
The detection circuit 10 is configured to detect a working status of the computer 100. The first control terminal 11 is configured to receive the first voltage signal of high voltage level when the computer 100 malfunctions. The first output terminal 12 is configured to output a control signal of low voltage level to the second output terminal 22. The second output terminal 22 maintains the outputting of a recovery signal of low voltage level to the south bridge chip 30 to restart the computer 100.
The recovery control circuit 20 includes a second switch Q2 and a third resistor R3. The second switch Q2 includes a first terminal, a second terminal, and a third terminal. The first terminal of the second switch Q2 acts as the second control terminal 21 and is configured to receive the second voltage signal. The second terminal of the second switch Q2 is grounded. The third terminal of the second switch Q2 is configured to receive a fourth voltage signal via the third resistor R3. A connection point between the third terminal of the second switch Q2 and the third resistor R3 acts as the second output terminal 22 and is configured to output the recovery signal.
In at least one embodiment, the first switch Q1 and the second switch Q2 are n channel metal-oxide-semiconductor field-effect transistors (MOSFETs), and the first terminal, the second terminal, and the third terminal of each of the first switch Q1 and the second switch Q2 are gate, source, and drain respectively. The first voltage signal is +12 volts, the third voltage signal is +5 volts, and the fourth voltage signal is +3.3 volts.
In use, when the computer 100 malfunctions, the first terminal of the first switch Q1 is configured to receive the first voltage signal of high voltage level via the first resistor R1. The first switch Q1 turns on. The connection point between the third terminal of the first switch Q1 and the second resistor R2 is configured to output the control signal of low voltage level. The connection point between the third terminal of the second switch Q2 and the third resistor R3 is configured to receive the control signal of low voltage level and is configured to output the recovery signal of low voltage level. The south bridge chip 30 is configured to receive the recovery signal of low voltage level to restart the computer 100. The power button Si is pressed again to restart the computer 100.
The embodiments shown and described above are only examples. Many details are often found in the art such as the other features of a computer recovery circuit. Therefore, many such details are neither shown nor described. Even though numerous characteristics and advantages of the present technology have been set forth in the foregoing description, together with details of the structure and function of the present disclosure, the disclosure is illustrative only, and changes may be made in the detail, including in matters of shape, size and arrangement of the parts within the principles of the present disclosure up to, and including the full extent established by the broad general meaning of the terms used in the claims. It will therefore be appreciated that the embodiments described above may be modified within the scope of the claims.
| Number | Date | Country | Kind |
|---|---|---|---|
| 201510183288.5 | Apr 2015 | CN | national |