1. Field of the Invention
The present invention relates to a computer system capable of saving power consumption and a related method, and more particularly, to a computer system capable of saving power consumption of a stand-by/power off state (e.g. power states S3, S4, and S5) and a related method.
2. Description of the Prior Art
Recently, as for electronic products are concerned, demands for energy conservation have been increasing day by day. According to the standard of Eco-Design Requirements for Energy Using Products (EuP) announced by the European Union in 2005 A.D., the designs of future computer products must be satisfied with this standard to be able to import to the European Union. During the first stage, the power consumption of the computer system under a stand-by/power off state should be smaller than 1 watt. Behind 2013 A.D., the power consumption of the computer system under the stand-by/power off state should be smaller than 0.5 watt. In order to conform to this new standard, a power-saving mechanism for the computer system is provided in the present invention, such that the computer system is able to achieve the requirements of energy conservation under the stand-by/power off state.
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In general, the operating system (OS) and application programs of the computer system are still working under the normal state S0, and all of the battery power VBAT, the main power VCC, and the stand-by power VSB are power-supplied. The supplied situation of the power state S1 is similar to that of the normal state S0, and the difference between them is that the CPU stops executing instructions under the power state S1, but the power supply still needs to provide power to the CPU, the memory, and the other electronic elements at this time. The supplied situation of the power state S2 is similar to that of the power state S1, and the difference between them is that the CPU is not power-supplied under the power state S2, but the power supply still needs to provide power to the memory and the other electronic elements at this time. The power state S3 can be called as a Suspend to RAM (STR) state, wherein it is known as the “stand-by state” in Micro-Soft XP OS or Linux OS while it is known as the “sleeping state” in Micro-Soft Vista OS or Mac OS X. For the time being, only the memory needs to be supplied with power (i.e., the stand-by power VSB)/and the power supply has no need to output the main power VCC to the computer system anymore. The power state S4 can also be called as a Suspend to Disk (STD) state, wherein it is known as the “Hibernate state” in Micro-Soft OS while it is known as the “safe sleeping state” in Mac OS X. For the time being, the power supply has no need to output the stand-by power VSB to the memory. The power state S4 and the other power states S1, S2, S3 differ in several ways, be noted that the power state S4 is more similar to the soft off state “G2” and the mechanical off state “G3”.
As for ACPI standard is concerned, the stand-by/power off state (i.e., the power states S3, S4, and S5) is the most power-saving condition of the computer system. For this reason, few manufactures will be significant for power-saving designs upon the power states S3, S4, and S5. However, recently there is still unnecessary power waste under the power states S3, S4, and S5 of the computer system; for example, some non-working electronic elements are still supplied with power by the stand-by power VSB at this time. Hence, a power-saving design upon the stand-by/power off state of the computer system is required, so as to conform to the future concept of energy conservation.
It is one of the objectives of the claimed invention to provide a computer system for saving power consumption of a stand-by/power off state and a related control method to solve the above-mentioned problems.
According to one embodiment, a computer system for saving power consumption of a stand-by/power off state is provided. The computer system consists of a plurality of electronic elements and a switch control circuit. The switch control circuit is coupled to the plurality of electronic elements. When the computer system receives a stand-by/power off command under the normal state, the switch control circuit is used for controlling the computer system to enter the stand-by/power off state from a normal state, and for stopping outputting a stand-by power having at least one stand-by voltage level to at least one part of electronic elements among the plurality of electronic elements. At this time, the computer system has entered a simulated mechanical off state from the stand-by/power off state. Be noted that a number of electronic elements supplied by the stand-by power when the computer system lies under the simulated mechanical off state is smaller than a number of electronic elements supplied by the stand-by power when the computer system lies under the stand-by/power off state. When the computer system receives a wake-up event under the simulated mechanical off state, the switch control circuit is further used for restoring the output of the stand-by power to the plurality of electronic elements, and for controlling the computer system to return to the stand-by/power off state from the simulated mechanical off state and then return to the normal state from the stand-by/power off state. The stand-by/power off state comprises one of a stand-by state (S3), a sleeping state (S4) and a power off state (S5).
According to another embodiment, a computer system for saving power consumption of a stand-by/power off state is provided. The computer system consists of a power converting circuit, a plurality of electronic elements, and a switch control circuit. The power converting circuit converts an input power into a main power as well as a stand-by power comprising a plurality of stand-by voltage levels. The plurality of electronic elements are coupled to the power converting circuit, wherein power supplies of the plurality of electronic elements are derived from the main power as well as the stand-by power. The switch control circuit is coupled to the power converting circuit. When the computer system receives a stand-by/power off command under the normal state, the switch control circuit used for controlling the computer system to enter the stand-by/power off state from a normal state and for controlling the power converting circuit to stop converting the input power into at least one part of stand-by voltage levels among the plurality of stand-by voltage levels, such that the computer system has entered a simulated mechanical off state from the stand-by/power off state at this time.
According to another embodiment, a method for saving power consumption of a computer system under a stand-by/power off state is provided, wherein the computer system consists of a plurality of electronic elements. The method includes the steps of: when the computer system receives a stand-by/power off command under a normal state, controlling the computer system to enter the stand-by/power off state from the normal state; and stopping outputting a stand-by power having at least one stand-by voltage level to at least one part of electronic elements among the plurality of electronic elements, such that the computer system has entered a simulated mechanical off state from the stand-by/power off state at this time; wherein a number of electronic elements supplied by the stand-by power when the computer system lies under the simulated mechanical off state is smaller than a number of electronic elements supplied by the stand-by power when the computer system lies under the stand-by/power off state.
According to another embodiment, a method for saving power consumption of a computer system under a stand-by/power off state is provided, wherein the computer system consist of a plurality of electronic elements, and power supplies of the plurality of electronic elements are derived from a main power as well as a stand-by power comprising a plurality of stand-by voltage levels. The method includes the steps of: when the computer system receives a stand-by/power off command under the normal state, controlling the computer system to enter the stand-by/power off state from a normal state; and stopping converting an input power into at least one part of stand-by voltage levels among the plurality of stand-by voltage levels, such that the computer system has entered a simulated mechanical off state from the stand-by/power off state at this time.
These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.
The following embodiments are focused on that: if the computer system enters the stand-by/power state, the stand-by power VSB provided for one part (or all) of the electronic elements can be stopped and the computer system can enter a simulated mechanical off state; and if the computer system needs to wake up to work (for example, when a wake-up event is received), the computer system can return to the stand-by/power off state form the simulated mechanical off state and then return to the normal state from the stand-by/power off state timely. Therefore, an optimum power-saving performance can be achieved. What's more, in the following embodiments, the normal state includes the power state S0; the stand-by/power off state includes one of the stand-by state S3, the sleeping state S4, and the power off state S5; and the simulated mechanical off state is represented by G3′ or G3″. The simulated mechanical off state G3′/G3″ mentioned herein is similar to the mechanical off state G3 defined in the ACPI power management system, wherein the output power supply provided by the simulated mechanical off state G3′/G3″ only consists of the battery power VBAT as well as a small part of the stand-by power VSB (for example, the stand-by voltage level provided to the memory device and/or the wake-up device). Perfectly, all of the stand-by power VSB can be disabled while only the battery power VBAT is provided under the simulated mechanical off state G3′/G3″, such that the simulated mechanical off state G3′/G3″ can be viewed completely the same as the mechanical off state G3 in this condition.
Nowadays the power supply adopted in the computer system can be divided into two types: the first type of power supply is applied to a desktop computer, such as ATX, micro ATX, BTX, . . . and so on, which can directly convert an alternating current (AC) of 110V/220V into a plurality of direct currents (DC) (e.g., 3.3V, 5V, and 5VSB) to be outputted to the motherboard of the computer system; and the second type of power supply is applied to a notebook computer, which can convert the alternating current (AC) of 110V/220V into a single direct current (e.g., 19V or 24V), and then the direct current of 19V/24V is designed into various different voltage levels (e.g., 3.3V, 5V, 5VSB, 3VSB, . . . and so on) via a power converting device. In the embodiments below, the first embodiment disclosed in
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Please note that the abovementioned stand-by power VSB can include at least one stand-by voltage level (such as 1.8V, 3.3V, and 5V) for providing different voltage levels to different electronic elements, but this in no way should be considered as a limitation of the present invention. Moreover, a number of electronic elements supplied with power by the stand-by power VSB when the computer system 200 lies under the simulated mechanical off state (e.g., the power state G3′/G3″) is smaller than a number of electronic elements supplied with power by the stand-by power VSB when the computer system 200 lies under the stand-by/power off state (e.g., the power state S3, S4, or S5). For example, when the computer system 200 lies under the power state S3, the electronic elements supplied by the stand-by power VSB includes the memory device 230, the wake-up device 240, and the other electronic elements 250. Assume that a number of the other electronic elements 250 is equal to N, and thus a total number of the electronic elements supplied by the stand-by power VSB is equal to (N+2) under the power state S3. On the other hand, when the computer system 200 lies under the simulated mechanical off state G3′/G3″, the electronic elements supplied by the stand-by power VSB only includes the memory device 230 and the wake-up device 240. Namely, the total number of electronic elements supplied by the stand-by power VSB is equal to 2 under the simulated mechanical off state G3′/G3″. For this reason, if the computer system 200 is controlled to enter the stand-by/power off state from the normal state and then enter the simulated mechanical off state from the stand-by/power off state, the power consumption of the computer system 200 under the stand-by/power off state can be substantially reduced.
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To make it simply, if the switch control circuit 220 receives the stand-by/power off command CM1 during the computer system 200 lies under the normal state S0, it will firstly transmit the mode switch control signal SC2 for controlling the computer system 200 to enter the stand-by/power off state from the normal state S0 and then transmit the power switch control signal SC1 to stop outputting the stand-by power VSB to one part (or most) of the electronic elements. At this time, the computer system 200 has entered the simulated mechanical off state from the stand-by/power off state. That is, S0→S3→G3′ or S0→S4/S5→G3″. Therefore, the power consumption of the computer system 200 under the stand-by/power off state can be saved.
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To make it simply, if the switch control circuit 220 receives the wake-up event WE1 during the computer system 200 enters to the simulated mechanical off state G3′/G3″, it will hold the power supply start signal PS_ON# temporarily and generate the power switch control signal SC1 to restore the output of the stand-by power VSB to the plurality of electronic elements 230˜250. After that, the control circuit 220 outputs the power supply start signal PS_ON# as well as the output wake-up event WE2 to control the computer system 200 to return to the stand-by/power off state from the simulated mechanical off state and then return to the normal state from the stand-by/power off state. That is, G3′ →S3→S0 or G3″→S4/S5→S0. Therefore, even if the computer system 200 enters to the simulated mechanical off state G3′/G3″, it can still wake up to work if needed (for example, when a network wake-up event is received).
Please note that the abovementioned wake-up event WE1 can be generated from internal wake-up devices, such as a network card or a keyboard. However, if these devices are not supplied with power, an external wake-up device (such as a power button) is required so as to trigger such wake-up event WE1. In addition, the above-mentioned output wake-up event WE2 is corresponding to the wake-up event WE1 (e.g. a wake-on-LAN event), and it can be generated by delaying the wake-up event WE1 or by re-sending another wake-up event according to the wake-up event WE1, but this should not be considered as limitations of the present invention. What calls for special attention is that the power supply start signal PS_ON# is a signal received from the motherboard 260 used for controlling whether to enable the power supply. For example, when the power supply start signal PS_ON# is at a low logic level, it indicates that the power supply is enabled; when the power supply start signal PS_ON# is at a high logic level, it indicates that the power supply is disabled.
In the following descriptions, several examples are taken for illustrating how the control circuit 220 switches the stand-by power VSB and how the control circuit 220 switches the power states under different cases.
In a first case, the stand-by/power off state is the stand-by state S3, and the computer system 200 must be equipped with a wake-up function. As a result, when the computer system 200 receives a stand-by/power off command under the normal state S0, the switch control circuit 220 first controls the computer system 200 to enter the stand-by state S3 from the normal state S0, and then stops outputting the stand-by power VSB to the other electronic elements 250 among the plurality of electronic elements 230˜250. At this time, the computer system 200 has entered the simulated mechanical off state G3′ from the stand-by state S3. When the computer system. 200 receives a wake-up event under the simulated mechanical off state G3′, the switch control circuit 220 restores the output of the stand-by power VSB to the other electronic elements 250 among the plurality of electronic elements 230˜250, and controls the computer system 200 to return to the stand-by state S3 from the simulated mechanical off state G3′ and then return to the normal state S0 from the stand-by state S3.
In a second case, the stand-by/power off state is one of the sleeping state S4 and the power off state S5, and the computer system 200 must be equipped with a wake-up function. As a result, when the computer system 200 receives a stand-by/power off command under the normal state S0, the switch control circuit 220 first controls the computer system 200 to enter the power state S4/S5 from the normal state S0, and then stops outputting the stand-by power VSB to the memory 230 and the other electronic elements 250 among the plurality of electronic elements 230˜250. At this time, the computer system 200 has entered the simulated mechanical off state G3″ from the power state S4/S5. When the computer system 200 receives a wake-up event under the simulated mechanical off state G3″, the switch control circuit 220 restores the output of the stand-by power VSB to the memory device 230 and the other electronic elements 250 among the plurality of electronic elements 230˜250, and controls the computer system 200 to return to the power state S4/S5 from the simulated mechanical off state G3″ and then return to the normal state S0 from the power state S4/S5.
In a third case, the stand-by/power off state is the stand-by state S3, and the computer system 200 needs not have a wake-up function. As a result, when the computer system 200 receives a stand-by/power off command under the normal state S0, the switch control circuit 220 first controls the computer system 200 to enter the stand-by state S3 from the normal state S0, and then stops outputting the stand-by power VSB to the wake-up device 240 and the other electronic elements 250 among the plurality of electronic elements 230˜250. At this time, the computer system 200 has entered the simulated mechanical off state G3′ from the stand-by state S3. When the computer system 200 receives a wake-up event under the simulated mechanical off state G3′, the switch control circuit 220 restores the output of the stand-by power VSB to the wake-up device 240 and the other electronic elements 250 among the plurality of electronic elements 230˜250, and controls the computer system 200 to return to the stand-by state S3 from the simulated mechanical off state G3′ and then return to the normal state S0 from the stand-by state S3. What calls for special attention is that, in this third case, the wake-up device 240 inside the computer system 200 is not supplied with power under the simulated mechanical off state G3′. For this reason, the wake-up event needs to be triggered by means of external wake-up devices only, such as a power button.
In a fourth case, the stand-by/power off state is one of the sleeping state S4 and the power off state S5, and the computer system 200 needs not have a wake-up function. As a result, when the computer system 200 receives a stand-by/power off command under the normal state S0, the switch control circuit 220 first controls the computer system 200 to enter the power state S4/S5 from the normal state S0, and then stops outputting the stand-by power VSB to the memory 230, the wake-up device 240, and the other electronic elements 250 among the plurality of electronic elements. At this time, the computer system 200 enters the simulated mechanical off state G3″ from the power state S4/S5. When the computer system 200 receives a wake-up event under the simulated mechanical off state G3″, the switch control circuit 220 restores the output of the stand-by power VSB to the memory device 230, the wake-up device 240, and the other electronic elements 250 among the plurality of electronic elements 230˜250, and controls the computer system 200 to return to the power state S4/S5 from the simulated mechanical off state G3″ and then return to the normal state S0 from the power state S4/S5. In this fourth case, all of the stand-by power VSB can be powered off under the simulated mechanical off state G3″, except the battery power VBAT is provided. By this time, the simulated mechanical off state G3″ herein can be viewed to be completely identical to the mechanical off state G3. What calls for special attention is that in this fourth case, the wake-up device 240 inside the computer system 200 is not supplied with power under the simulated mechanical off state G3″. For this reason, the wake-up event needs to be triggered by means of external wake-up devices only, such as a power button.
The abovementioned embodiments are presented merely for describing the present invention, and in no way should be considered to be limitations of the scope of the present invention. Those skilled in the art should appreciate that the switch control circuit 220 can decide the type and the number of the electronic elements have no need to be supplied with the stand-by power VSB depends upon different design demands and different conditions. In addition, the computer system 200 can be a desktop computer, but the present invention is not limited to this only.
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Please note that a number of the converted stand-by voltage levels when the computer system 500 lies under the simulated mechanical off state (e.g., the power state G3′/G3″) is smaller than a number of the converted stand-by voltage levels when the computer system 500 lies under the stand-by/power off state (e.g., the power state S3, S4, or S5). For example, when the computer system 500 lies under the power state S3, the converted stand-by voltage levels include VSB1 (provided for the memory device 530), VSB2 (provided for the wake-up device 540), and VSB3 (provided for the other electronic elements 550). And thus a total number of the converted stand-by voltage levels is equal to 3 under the power state S3. On the other hand, when the computer system 500 lies under the simulated mechanical off state G3′/G3″, the total number of the converted stand-by voltage levels is equal to 2, wherein only VSB1 and VSB2 are included. For this reason, if the computer system 500 is controlled to enter the stand-by/power off state from the normal state and then enter the simulated mechanical off state from the stand-by/power off state, the power consumption of the computer system 500 under the stand-by/power off state can be substantially reduced.
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To make it simply, if the switch control circuit 520 receives the stand-by/power off command CM1 during the computer system 500 lies under the normal state S0, it will firstly transmit the mode switch control signal SC2 for controlling the computer system 500 to enter the stand-by/power off state from the normal state S0 and then transmit the power switch control signal SC1 to control the power converting circuit 570 to stop converting the second input power PDC into at least one part of stand-by voltage levels among the plurality of stand-by voltage levels VSB1 ˜VSB3. At this time, the computer system 500 has entered the simulated mechanical off state from the stand-by/power off state. That is, S0→S3→G3′ or S0→S4/S5→G3″. Therefore, the power consumption of the computer system 500 under the stand-by/power off state can be saved.
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To make it simply, if the switch control circuit 520 receives the wake-up event WE1 during the computer system 500 enters to the simulated mechanical off state G3′/G3″, it will hold the power supply start signal PS_ON# temporarily and generate the power switch control signal SC1 to control the power converting circuit 570 to continue converting the second input power Ppc into the plurality of stand-by voltage levels. After that, the control circuit 520 outputs the power supply start signal PS_ON# as well as the output wake-up event WE2 to control the computer system 500 to return to the stand-by/power off state from the simulated mechanical off state and then return to the normal state from the stand-by/power off state. That is, G3′→S3→S0 or G3″→S4/S5→S0. Therefore, even if the computer system 500 enters to the simulated mechanical off state G3′/G3″, it can still wake up to work if needed (for example, when a network wake-up event is received).
Please note that the computer system 500 can be a laptop computer or a notebook computer, but the present invention is not limited to this only.
The abovementioned embodiments are presented merely for describing the present invention, and in no way should be considered to be limitations of the scope of the present invention. Those skilled in the art should appreciate that other circuit architectures can be adopted to implement the switch control circuits 220 and 520 without departing from the spirit of the present invention, which also belongs to the scope of the present invention.
Please refer to
Step 802: Start.
Step 804: The computer system lies under the normal state.
Step 806: When the computer system lies under the normal state, detect whether a stand-by/power off command is received. When the stand-by/power off command is detected to be received, go to Step 808; otherwise, go to Step 804.
Step 808: When the stand-by/power off command is detected to be received, transmit a mode switch control signal.
Step 810: When the mode switch control signal is received, control the computer system to enter the stand-by/power off state from the normal state.
Step 812: Transmit a power switch control signal.
Step 814: When the power switch control signal is received, stop outputting the stand-by power to at least one part electronic elements among the plurality of electronic elements.
Step 816: At this time, the computer system has entered the simulated mechanical off state from the stand-by/power off state.
How each element operates can be known by collocating the steps shown in
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Step 852: Start.
Step 854: The computer system enters the simulated mechanical off state.
Step 856: When the computer system enters the simulated mechanical off state, detect whether a wake-up event is received. When the wake-up event is detected to be received, go to Step 858; otherwise, go to Step 854.
Step 858: When the wake-up event is detected to be received, temporarily hold a power supply start signal and generate a power switch control signal.
Step 860: When the power switch control signal is received, restore the output of the stand-by power to the plurality of electronic elements.
Step 862: After restoring the output of the stand-by power to the plurality of electronic elements, output the power supply start signal as well as the output wake-up event.
Step 864: When the power supply start signal as well as the output wake-up event are received, control the computer system to return to the stand-by/power off state from the simulated mechanical off state and then return to the normal state from the stand-by/power off state.
How each element operates can be known by collocating the steps shown in
Please refer to
Step 802: Start.
Step 804: The computer system lies under the normal state.
Step 806: When the computer system lies under the normal state, detect whether a stand-by/power off command is received. When the stand-by/power off command is detected to be received, go to Step 808; otherwise, go to Step 804.
Step 808: When the stand-by/power off command is detected to be received, transmit a mode switch control signal.
Step 810: When the mode switch control signal is received, control the computer system to enter the stand-by/power off state from the normal state.
Step 812: Transmit a power switch control signal.
Step 914: When the power switch control signal is received, stop converting the input power into at least one part of stand-by voltage levels among the plurality of stand-by voltage levels.
Step 816: At this time, the computer system has entered the simulated mechanical off state from the stand-by/power off state.
Please note that the steps shown in
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Step 852: Start.
Step 854: The computer system enters the simulated mechanical off state.
Step 856: When the computer system enters the simulated mechanical off state, detect whether a wake-up event is received. When the wake-up event is detected to be received, go to Step 858; otherwise, go to Step 854.
Step 858: When the wake-up event is detected to be received, temporarily hold a power supply start signal and generate a power switch control signal.
Step 960: When the power switch control signal is received, continue converting the input power into the plurality of stand-by voltage levels.
Step 862: After restoring the output of the stand-by power to the plurality of electronic elements, output the power supply start signal as well as the output wake-up event.
Step 864: When the power supply start signal as well as the output wake-up event are received, control the computer system to return to the stand-by/power off state from the simulated mechanical off state and then return to the normal state from the stand-by/power off state.
Please note that the steps shown in
Please note that, the steps of the abovementioned flowcharts are merely practicable embodiments of the present invention, and in no way should be considered to be limitations of the scope of the present invention. Those skilled in the art should appreciate that the methods shown in
The abovementioned embodiments are presented merely for describing features of the present invention, and in no way should be considered to be limitations of the scope of the present invention. In summary, the present invention provides a computer system for saving power consumption of a stand-by/power state (e.g. the power state S3, S4, or S5) and a related method. When the computer system enters the stand-by/power state, the stand-by power VSB provided for one part (or all) of the electronic elements can be stopped and the computer system can enter the simulated mechanical off state G3′/G3″. On the other hand, if the computer system needs to wake up to work (for example, when a wake-up event is received), the computer system can return to the stand-by/power off state form the simulated mechanical off state and then return to the normal state from the stand-by/power off state timely. Therefore, an optimum power-saving performance can be achieved. In addition, the switch control circuit 220/520 disclosed in the present invention can be implemented easily and is not power-consuming, which has a good control upon cost and power consumption. Moreover, the power-saving mechanism disclosed in the present invention has a wide range of applications, which is suitable for a desktop computer, a laptop computer, a notebook computer, or a computer system of other types.
Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention.
Number | Date | Country | Kind |
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098117510 | May 2009 | TW | national |