This is a continuation of application Ser. No. 09/747,422 filed on Dec. 22, 2000 now U.S. Pat. No. 6,557,068, which is hereby incorporated by reference herein. This patent application is related to commonly owned U.S. patent application Ser. No. 08/873,636 filed on Jun. 12, 1997, U.S. Pat. No. 6,067,590, entitled “REGISTERED PCI” by Dwight D. Riley and Christopher J. Pettey; and Ser. No. 08/873,420, filed on Jun. 2, 1997, U.S. Pat. No. 5,597,173, entitled “APPARATUS, METHOD AND SYSTEM FOR REGISTERED PERIPHERAL COMPONENT INTERCONNECT BUS USING ACCELERATED GRAPHICS PORT LOGIC CIRCUITS” by Sonipong Paul Olarig, Dwight D. Riley, and Ronald T. Horan, and are hereby incorporated by reference for all purposes.
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Entry |
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Number | Date | Country | |
---|---|---|---|
Parent | 09/747422 | Dec 2000 | US |
Child | 10/424896 | US |