The present invention generally relates to data processor systems, and more particularly to a data processor system implemented on a programmable logic device having user selectable peripheral devices.
Microprocessors are one of the most versatile electronic devices used by engineers. Typically, a microprocessor is able to recognize and execute a predetermined set of instructions (e.g., add, compare, subtract, jump, etc.). Engineers can direct a microprocessor to handle different tasks by writing different computer programs using the same set of instructions. As a result, different types of products can use the same microprocessor by changing the associated computer programs.
A microprocessor is typically used with a number of peripheral integrated circuit (IC) devices (such as serial interface, parallel input-output device, interrupt controller, disk drive controller, etc.). In many cases, a microprocessor manufacturer supplies a family of peripheral ICs that works best with its microprocessors. Because microprocessors are used in many types of products, these peripheral ICs also need to be flexible enough to be used in many types of products. This flexibility comes with a price: it is more difficult to use the peripheral ICs and the cost of the extra registers, logic, memory, etc. required to make the peripheral flexible, increases the cost of the peripheral. Another reality of casting peripherals into silicon is that it is extremely difficult to anticipate future changes to standards. If such “future” standards could be incorporated into a peripheral, the value of the peripheral would be greatly enhanced.
The above problems can be solved by having a single IC that includes a processor core and one or more peripheral devices selected by a user. Because the peripheral device is configurable, the user can select just the features he/she needs in the IC. As a result, the peripheral devices included in the IC do not have to be flexibly designed in the same manner as commercially available peripheral devices. Consequently, they are easy to use. Because the peripheral device is configurable, the peripheral can be modified over the lifetime of the system. This provides the possibility to adapt to future changes in standards, even after the microprocessor system has been deployed in the field. It also affords the possibility to increase the performance or alter the operation of the peripheral after deployment.
In one embodiment of the present invention, a menu system is used to help the user configure the peripherals and select which peripherals are to be connected to the microprocessor.
The above summary of the present invention is not intended to describe each disclosed embodiment of the present invention. The figures and detailed description that follow provide additional example embodiments and aspects of the present invention.
The present invention is illustrated by way of example, and not by way of limitation, in the following figures, in which like reference numerals refer to similar elements.
Several examples of configurable peripheral devices will be described. In the following description, numerous specific details are set forth in order to provide a more thorough understanding of the present invention. However, it will be apparent to one skilled in the art that the present invention may be practiced without these specific details. In other instances, well-known features have not been described in detail in order to avoid obscuring the present invention.
In one embodiment of the present invention, IC 100 is a field programmable gate array that further contains a plurality of input-output (I/O) blocks, such as blocks 122–125, and a plurality of configurable logic blocks (CLBs) which provide functional elements for constructing logic, such as blocks 127–128. Detail description of these blocks can be found in “The Programmable Logic Data Book 2000,” Chapter 3, published by Xilinx, Inc, the content of which is incorporated herein by reference. These blocks can be used to build other circuits that may be connected to the system of the present invention. The circuit of
The present invention allows a user to include one or more peripheral devices in IC 100. In this invention, a peripheral device is defined as a circuit that (a) delivers signals to a device external to IC 100 in response to commands by processor core 104 and (b) receives signals from the external device and delivers the signals (sometimes in a modified form) to processor core 104. Examples of peripheral devices are universal asynchronous receiver transmitter (UART), parallel port interface, Ethernet interface, flash memory controller, etc. In the present invention, these peripheral devices can be tailor-made to meet the needs of the users. As an example, consider a prior art UART 160 of
Prior art UART 160 is designed to serve general engineering usage. As a result, it includes baud rate register 166 and associated control logic to allow users to easily change the baud rate of UART 160. In the present invention, a user may only need to use a single baud rate, and there is no need to include register 166 and associated logic. As a result, the complexity of the design is reduced.
It should be noted that other peripheral devices may be configured using the same principle to reduce the complexity of the design.
The user can select his/her design choices using a menu system.
Those having skill in the relevant arts of the invention will now perceive various modifications and additions which may be made as a result of the disclosure herein. Accordingly, all such modifications and additions are deemed to be within the scope of the invention, which is to be limited only by the appended claims and their equivalents.
Number | Name | Date | Kind |
---|---|---|---|
4748654 | Gray | May 1988 | A |
4761763 | Hicks | Aug 1988 | A |
5307464 | Akao et al. | Apr 1994 | A |
5428748 | Davidson et al. | Jun 1995 | A |
5812867 | Basset | Sep 1998 | A |
5968161 | Southgate | Oct 1999 | A |
6029155 | Bass et al. | Feb 2000 | A |
6085337 | Mattheis et al. | Jul 2000 | A |
6145020 | Barnett | Nov 2000 | A |
6189052 | Nilsson et al. | Feb 2001 | B1 |