Patent Application
20240305026
Embodiments of the disclosure relate generally to connectors for circuits and, more specifically, to a connector assembly with integrated data and backup energy connections, which can be used to electrically couple together two or more printed circuit boards and electrically couple at least one of those printed circuit boards to a backup energy source.
A memory sub-system can be a storage device, a memory module, or a hybrid of a storage device and memory module. Certain memory sub-systems comprise two or more circuit components, such as printed circuit boards (PCBs), that are physically and electrically coupled together within a housing assembly. Conventional methodologies for connecting two or more circuit boards, especially circuit boards that are stacked (e.g., vertically or horizontally) next to each other, includes rigid PCBs (e.g., with edge card connectors disposed thereon), or flex or semi-flex PCBs (e.g., rigid-flex-rigid (RFR) PCB).
The disclosure will be understood more fully from the detailed description given below and from the accompanying drawings of various embodiments of the disclosure. The drawings, however, should not be taken to limit the disclosure to the specific embodiments, but are for explanation and understanding only.
Aspects of the present disclosure are directed to a connector assembly with integrated data and backup energy connections, which can be used to electrically couple together two or more printed circuit boards and electrically couple at least one of those printed circuit boards to a backup energy source. For example, a connector assembly of an embodiment can be used to implement a memory sub-system by coupling together two or more printed circuit boards of the memory sub-system and coupling the memory sub-system to a backup energy source, such as a set of capacitors or a set of batteries, which can be used to power the memory sub-system in the event of a main power loss.
According to some embodiments, the connector assembly comprises a first slot configured to receive a first edge of a first printed circuit board (PCB), a second slot configured to receive a second edge of a second PCB, and a set of electrical connectors configured to be electrically coupled to a backup energy source. For some embodiments, the first slot comprises a first plurality of electrically-conductive biased contacts (e.g., biased contacts) configured to electrically couple with corresponding electrically-conductive surface contacts disposed (e.g., mounted) on the first edge of the first PCB after the first edge is received by and inserted into the first slot, and the second slot comprises a second plurality of electrically-conductive biased contacts configured to electrically couple with corresponding electrically-conductive surface contacts disposed (e.g., mounted) on the second edge of the second PCB after the second edge is received by and inserted into the second slot. For some embodiments, a first set of electrically-conductive biased contacts of the first plurality is electrically coupled to a second set of electrically-conductive biased contacts of the second plurality. In doing so, some embodiments facilitate a board-to-board connection (e.g., data connection) between the first and the second PCBs. For some embodiments, a third set of electrically-conductive biased contacts of the first plurality is electrically coupled to the set of electrical connectors. In doing so, some embodiments permit a backup energy source to provide power (e.g., voltage) to the first PCB through the connection assembly in the event that a primary energy source (e.g., main power supply) to the first PCB fails to (or can no longer) provide energy (e.g., power) to the first PCB. Additionally, for some embodiments, a fourth set of electrically-conductive biased contacts of the second plurality is electrically coupled to the set of electrical connectors, which can permit the backup energy source to provide power (e.g., voltage) to the second PCB through the connection assembly in the event that a primary energy source (e.g., main power supply) to the second PCB fails to provide energy (e.g., power) to the second PCB.
Various embodiments described herein can be used in a number of different applications or environments where a board-to-board connection is needed and a backup energy source is involved. For instance, the connector assembly can be used where a first printed circuit board and a second printed circuit board implement a memory sub-system. The first printed circuit board can comprise a separate connector configured to electrically couple to, and receive main power from, a host system, where the separate connector is separate from the conductive surface contacts disposed on the first edge of the first printed circuit board. In the event of a main power loss (e.g., from a main energy source), the first printed circuit board can be configured to receive backup power from the third set of electrically-conductive biased contacts by way of the third set of electrically-conductive biased contacts of the first plurality.
With respect to electrically-conductive contacts, for some embodiments, the first plurality of electrically-conductive biased contacts is disposed on at least one side of the first slot, and the second plurality of electrically-conductive biased contacts is disposed on at least one side of the second slot. Depending on the embodiment, the first slot can be a first edge board connector, and the second slot can be a second edge board connector. Each biased contact of the first plurality of electrically-conductive biased contacts can be part of a horseshoe shaped element (e.g., horseshoe shaped metal piece), and each biased contact of the second plurality of electrically-conductive biased contacts can be part of a horseshoe shaped (e.g., horseshoe shaped metal piece). In various embodiments, the connector assembly is constructed from plastic, and each biased contact of the first plurality of electrically-conductive biased contacts can be over-molded in the plastic, or each biased contact of the second plurality of electrically-conductive biased contacts can be over-molded in the plastic.
For some embodiments, the set of electrical connectors of the connector assembly are lugs (e.g., two lugs) configured to electrically connect to a positive terminal of a backup energy source and a negative terminal of the backup energy source. Additionally, for some embodiments, the connector assembly comprises a set of pins accessibly outside of the connector assembly, where the set of pins is configured to provide debug access to (and to electrically couple to) at least one of the first printed circuit board or the second printed circuit board.
According to some embodiments, the first printed circuit board is manufactured using a surface-mount technology (SMT) process. For some embodiments, the first edge of the first printed circuit board functions as an edge connector, and the second edge of the second printed circuit board functions as another edge connector.
For some embodiments, the first slot and the second slot are positioned parallel and adjacent to each other (e.g., parallel in a spaced relationship) in a housing of the connector assembly. For instance, the first slot and the second slot can be positioned such that the first printed circuit board and the second circuit board are stacked in parallel and next to each other (e.g., parallel in a spaced relationship) after the first printed circuit board is inserted into the first slot and the second printed circuit board is inserted into the second slot. In doing so, depending on the orientation of the connector assembly within an apparatus (e.g., device), the first printed circuit board and the second printed circuit board can be stacked horizontally or vertically next to each other.
With respect to a housing of a connector assembly, the connector assembly can comprise a main housing that comprises (e.g., contains or houses) the first slot and the second slot, and an extended housing that extends away from the main housing and that comprises (e.g., contains or houses) the set of electrical connectors for the backup energy source (e.g., separate from the first slot and the second slot). For some embodiments, the set of electrical connectors can be electrically coupled to the third set of electrically-conductive biased contacts of the first plurality by an electrically-conductive path (e.g., metal wire or metal trace) contained within the extended housing and the main housing.
As used herein, a biased contact can comprise a biased contact. A memory sub-system can be a storage device, a memory module, or a hybrid of a storage device and memory module. Examples of storage devices and memory modules are described below in conjunction with
Though various embodiments are described herein with respect to two printed circuit boards (PCBs), a connector assembly of some embodiments can be used with three or more PCBs and provide features similar to those described herein.
Disclosed herein are some examples of connector assemblies with integrated data and backup energy connections, which can be used in implementing a memory sub-system.
The extended housing 104 comprises electrical connectors 110, which can connect to an energy source, such as a backup energy source (e.g., a set of batteries or a set of capacitors). As shown in view 100B, the electrical connectors 110 can comprise lugs that can connect to positive and negative terminals of an energy source. As also shown in view 100B, a set of the first plurality of electrically-conductive biased contacts 122 and a set of the second plurality of electrically-conductive biased contacts 120 are each electrically coupled to the electrical connectors 110 by way of a conductive path 124, thereby permitting a backup energy source that is connected to the electrical connectors 110 to provide backup power to each of the first printed circuit board inserted into the first slot 106 and the second printed circuit board inserted into the second slot 108.
After a first printed circuit board is inserted into the first slot 106, a first surface contact disposed on a side of the edge of the first printed circuit board (the side facing the biased contact 202) comes in contact with the biased contact 202, thereby electrically coupling the first surface contact with the biased contact 202. After a second printed circuit board is inserted into the second slot 108, a second surface contact disposed on a side of the edge of the second printed circuit board (the side facing the biased contact 208) comes in contact with the biased contact 208, thereby electrically coupling the second surface contact with the biased contact 208. By way of the horseshoe-shaped metal element 210 and the biased contacts 202 and 208, the connector assembly 100 can electrically couple the first surface contact of the first printed circuit board with the second surface contact of the second printed circuit board.
Similarly, after the first printed circuit board is inserted into the first slot 106, a third surface contact disposed on the other side of the edge of the first printed circuit board (the side facing the biased contact 204) comes in contact with the biased contact 204, thereby electrically coupling the third surface contact with the biased contact 204. After the second printed circuit board is inserted into the second slot 108, a fourth surface contact disposed on the other side of the edge of the second printed circuit board (the side facing the biased contact 206) comes in contact with the biased contact 206, thereby electrically coupling the fourth surface contact with the biased contact 206. By way of the horseshoe-shaped metal element 212 and the biased contacts 204 and 206, the connector assembly 100 can electrically couple the third surface contact of the first printed circuit board with the fourth surface contact of the second printed circuit board.
The main housing 102 of the connector assembly 100 can comprise additional “inner” horseshoe-shaped metal elements (like the horseshoe-shaped metal element 212) and “outer” horseshoe-shaped metal elements (like the horseshoe-shaped metal element 210) that correspond to other surface contacts disposed on the edges of the first and the second printed circuited boards and that electrically couple those surface contacts in a similar manner.
For some embodiments, the connector assembly 100 is configured to electrically couple together the first printed circuit board 310 and the second printed circuit board 320. Further, for some embodiments, the connector assembly 100 is configured to electrically couple the first printed circuit board 310, the second printed circuit board 320, or both to a backup energy source connected to the electrical connectors 110 of the connector assembly 100. For example,
A memory sub-system 710 can be a storage device, a memory module, or a hybrid of a storage device and memory module. Examples of a storage device include a solid-state drive (SSD), a flash drive, a universal serial bus (USB) flash drive, an embedded Multi-Media Controller (eMMC) drive, a Universal Flash Storage (UFS) drive, and a hard disk drive (HDD). Examples of memory modules include a dual in-line memory module (DIMM), a small outline DIMM (SO-DIMM), and a non-volatile dual in-line memory module (NVDIMM).
The computing environment 700 can include a host system 720 that is coupled to one or more memory sub-systems 710. In some embodiments, the host system 720 is coupled to different types of memory sub-system 710.
The host system 720 can be a computing device such as a desktop computer, laptop computer, network server, mobile device, embedded computer (e.g., one included in a vehicle, industrial equipment, or a networked commercial device), or such computing device that includes a memory and a processing device. The host system 720 can be coupled to the memory sub-system 710 via a physical host interface. Examples of a physical host interface include, but are not limited to, a serial advanced technology attachment (SATA) interface, a peripheral component interconnect express (PCIe) interface, universal serial bus (USB) interface, Fibre Channel, Serial Attached SCSI (SAS), etc. The physical host interface can be used to transmit data between the host system 720 and the memory sub-system 710. The host system 720 can further utilize an NVM Express (NVMe) interface to access the memory components (e.g., memory devices 730) when the memory sub-system 710 is coupled with the host system 720 by the PCIe interface. The physical host interface can provide an interface for passing control, address, data, and other signals between the memory sub-system 710 and the host system 720.
The memory devices can include any combination of the different types of non-volatile memory devices and/or volatile memory devices. The volatile memory devices (e.g., memory device 740) can be, but are not limited to, random access memory (RAM), such as dynamic random-access memory (DRAM) and synchronous dynamic random-access memory (SDRAM).
An example of non-volatile memory devices (e.g., memory device 730) includes a negative-and (NAND) type flash memory. Each of the memory devices 730 can include one or more arrays of memory cells such as single-level cells (SLCs) or multi-level cells (MLCs) (e.g., triple-level cells (TLCs) or quad-level cells (QLCs)). In some embodiments, a particular memory component can include an SLC portion, and an MLC portion, a TLC portion, or a QLC portion of memory cells. Each of the memory cells can store one or more bits of data used by the host system 720. Furthermore, the memory cells of the memory devices 730 can be grouped as memory pages or memory blocks that can refer to a unit of the memory component used to store data.
Although non-volatile memory components such as NAND type flash memory are described, the memory device 730 can be based on any other type of non-volatile memory, such as read-only memory (ROM), phase change memory (PCM), magneto random access memory (MRAM), negative-or (NOR) flash memory, electrically erasable programmable read-only memory (EEPROM), and a cross-point array of non-volatile memory cells. A cross-point array of non-volatile memory can perform bit storage based on a change of bulk resistance, in conjunction with a stackable cross-gridded data access array. Additionally, in contrast to many flash-based memories, cross-point non-volatile memory can perform a write in-place operation, where a non-volatile memory cell can be programmed without the non-volatile memory cell being previously erased.
The memory sub-system controller 715 can communicate with the memory devices 730 to perform operations such as reading data, writing data, or erasing data at the memory devices 730 and other such operations. The memory sub-system controller 715 can include hardware such as one or more integrated circuits and/or discrete components, a buffer memory, or a combination thereof. The memory sub-system controller 715 can be a microcontroller, special purpose logic circuitry (e.g., a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), etc.), or other suitable processor.
The memory sub-system controller 715 can include a processor (processing device) 717 configured to execute instructions stored in local memory 719. In the illustrated example, the local memory 719 of the memory sub-system controller 715 includes an embedded memory configured to store instructions for performing various processes, operations, logic flows, and routines that control operation of the memory sub-system 710, including handling communications between the memory sub-system 710 and the host system 720.
In some embodiments, the local memory 719 can include memory registers storing memory pointers, fetched data, etc. The local memory 719 can also include read-only memory (ROM) for storing micro-code. While the example memory sub-system 710 in
In general, the memory sub-system controller 715 can receive commands or operations from the host system 720 and can convert the commands or operations into instructions or appropriate commands to achieve the desired access to the memory devices 730. The memory sub-system controller 715 can be responsible for other operations such as wear leveling operations, garbage collection operations, error detection and error-correcting code (ECC) operations, encryption operations, caching operations, and address translations between a logical block address and a physical block address that are associated with the memory devices 730. The memory sub-system controller 715 can further include host interface circuitry to communicate with the host system 720 via the physical host interface. The host interface circuitry can convert the commands received from the host system into command instructions to access the memory devices 730 as well as convert responses associated with the memory devices 730 into information for the host system 720.
The memory sub-system 710 can also include additional circuitry or components that are not illustrated. In some embodiments, the memory sub-system 710 can include a cache or buffer (e.g., DRAM) and address circuitry (e.g., a row decoder and a column decoder) that can receive an address from the memory sub-system controller 715 and decode the address to access the memory devices 730.
In some embodiments, the memory devices 730 include local media controllers 735 that operate in conjunction with memory sub-system controller 715 to execute operations on one or more memory cells of the memory devices 730.
As shown, the memory sub-system 710 includes a backup energy component 750 that can represent a backup energy source (e.g., the backup energy source 402), such as a set of batteries or a set of capacitors (e.g., power backup capacitor banks). The backup energy component 750 can provide various components of the memory sub-system 710 with backup power in the event of primary power loss to the memory sub-system 710. As shown, according to some embodiments, the first printed circuit board 310 comprises the memory sub-system controller 715, the second printed circuit board 320 comprises the memory devices 730, 740, and the connector assembly 100 electrically-couples together the first printed circuit board 310 and the second printed circuit board 320, and electrically-couples the backup energy component 750 to the first printed circuit board 310.
In the foregoing specification, embodiments of the disclosure have been described with reference to specific example embodiments thereof. It will be evident that various modifications can be made thereto without departing from the broader spirit and scope of embodiments of the disclosure as set forth in the following claims. The specification and drawings are, accordingly, to be regarded in an illustrative sense rather than a restrictive sense.
This application claims the benefit of priority to U.S. Provisional Application Ser. No. 63/451,126, filed Mar. 9, 2023, which is incorporated herein by reference in its entirety.
| Number | Date | Country | |
|---|---|---|---|
| 63451126 | Mar 2023 | US |
