Claims
- 1. In a data carrier configuration having predetermined dimensions, the improvement comprising:
- a semiconductor chip having given dimensions;
- a first conductor loop connected to said semiconductor chip, said first conductor loop having at least one winding and a cross-sectional area with approximately the given dimensions;
- at least one second conductor loop having at least one winding, a cross-sectional area with approximately the predetermined dimensions and a region forming a third loop with approximately the given dimensions;
- said third loop inductively coupling said first conductor loop and said at least one second conductor loop to one another; and
- said first and third conductor loops disposed substantially concentrically.
- 2. The data carrier configuration according to claim 1, including a carrier element carrying said semiconductor chip, said first conductor loop disposed on said carrier element.
- 3. The data carrier configuration according to claim 1, wherein said first conductor loop is disposed on said semiconductor chip.
- 4. The data carrier configuration according to claim 1, wherein said first conductor loop and said at least one second conductor loop have different numbers of windings.
- 5. The data carrier configuration according to claim 1, wherein said conductor loops have inductances to be used in frequency filters.
CROSS-REFERENCE TO RELATED APPLICATION
This application is a continuation of International Application Serial No. PCT/DE96/00359, filed Feb. 29, 1996.
US Referenced Citations (11)
Foreign Referenced Citations (5)
Number |
Date |
Country |
0505905A1 |
Sep 1992 |
EPX |
3721822C1 |
Nov 1988 |
DEX |
4308193A1 |
Sep 1994 |
DEX |
9100347 |
Mar 1992 |
NLX |
9100176 |
Mar 1992 |
NLX |
Continuations (1)
|
Number |
Date |
Country |
Parent |
PCT/DE96/00359 |
Feb 1996 |
|