Patent Application
20160226483
The subject matter herein generally relates to control circuitry.
A universal serial bus (USB) device is usually charged by a battery of a notebook computer through a USB connector coupled to the notebook computer.
Implementations of the present technology will now be described, by way of example only, with reference to the attached FIGURE.
The FIGURE is a circuit diagram of an embodiment of an electronic device using a control circuit.
Numerous specific details are set forth in order to provide a thorough understanding of the embodiments described herein. However, it will be understood by those of ordinary skill in the art that the embodiments described herein can be practiced without these specific details. In other instances, methods, procedures, and components have not been described in detail so as not to obscure the related relevant feature being described. Also, the description is not to be considered as limiting the scope of the embodiments described herein.
Several definitions that apply throughout this disclosure will now be presented.
The term “coupled” is defined as connected, whether directly or indirectly through intervening components, and is not necessarily limited to physical connections. The connection can be such that the objects are permanently connected or releasably connected. The term “comprising” when utilized, means “including, but not necessarily limited to”; it specifically indicates open-ended inclusion or membership in the so-described combination, group, series and the like.
The FIGURE shows an electronic device 100 comprising a control circuit 10, a power module 20, and a connecting module 30. The control circuit 10 can comprise a control module 40 and a switch module 50.
In the embodiment, the electronic device 100 can be a notebook computer. The power module 20 can be a battery of the notebook computer. The power module 20 supplies power for the electronic device 100. The control module 40 can be an integrated controller in the notebook computer. The connecting module 30 can be a universal serial bus (USB) connector. The power module 20 supplies power for the connecting module 30 when the power module 20 is coupled to the connecting module. The connecting module 30 comprises a power pin 1, a signal pin 2, a signal pin 3, and ground pins 4-8. The signal pin 2 and the signal pin 3 are used to transmit signals when the electronic device 100 is coupled to an external USB device through the connecting module 30.
The control module 40 can comprise a first port 1 and a second port 2. The first port 1 is coupled to the power module 20 and the second port 2 is coupled to the switch module 50.
The switch module 50 can comprise power terminals V1 and V2, a resistor R, a capacitor C, and transistors Q1 and Q2. In the embodiment, the transistor q1 is a NPN transistor and the transistor Q2 is an n-channel FET. A base of the transistor Q1 as a control terminal is coupled to the second port 2 of the control module 40. An emitter of the transistor Q1 as a second terminal is grounded. A collector of the transistor Q1 as a first terminal is coupled to the power terminal V1 through the resistor R. A gate of the transistor Q2 as a control terminal is coupled to the collector of the transistor Q1. A drain of the transistor Q2 as a first terminal is coupled to the power terminal V2. A source of the transistor Q2 as a second terminal is coupled to the power pin of the connecting module 30. The drain of the transistor Q2 is also grounded through the capacitor C. In the embodiment, the power terminal V1 receives a first voltage from the power module 20 through a motherboard of the electronic device 100. The second power terminal V2 receives a second voltage from the power module 20 through the motherboard of the electronic device 100.
In use, the control module 40 detects a level of power in the power module 20 and outputs a control signal to the second port 2.
When the level of power in the power module 20 exceeds a preset value, the control signal is at a low level, such as logic 0. The transistor Q1 is turned off and the FET Q2 is turned on. The power terminal V2 is connected to the power pin 1 of the connecting module 30 and the second voltage is output to the connecting module 30.
When the level of power in the power module 20 does not exceed the preset value, the control signal is at a high level, such as logic 1. The transistor Q1 is turned on and the transistor Q2 is turned off. The power terminal V2 is disconnected from the power pin 1 of the connecting module 30 and the second voltage is not output to the connecting module 30, thus the power module stops supplying power for the connecting module.
While the disclosure has been described by way of example and in terms of the embodiment, it is to be understood that the disclosure is not limited thereto. On the contrary, it is intended to cover various modifications and similar arrangements as would be apparent to those skilled in the art. Therefore, the range of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.
| Number | Date | Country | Kind |
|---|---|---|---|
| 201510052613.4 | Feb 2015 | CN | national |
