BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention is related to a control circuit of light emitting diodes, and particularly to a control circuit of light emitting diodes that can shift noise caused by a low frequency dimming signal.
2. Description of the Prior Art
A plurality of series of light emitting diodes can act as backlight of a liquid crystal display. When the plurality of series of light emitting diodes are driven, a conventional driving circuit can be considered a two-stage circuit. A first stage circuit of the two-stage circuit is a voltage regulator which sinks power from a main power supply (such as an AC power or a DC power) to provide a stable output voltage. For example, the first stage circuit is an inductor-inductor-capacitor (LLC) power circuit or a quasi-resonant power circuit. A second stage circuit is a current balancing circuit for providing a plurality of roughly equal constant currents to drive the plurality of series of light emitting diodes. For example, in FIG. 1, a quasi-resonant power circuit 10 acts as a first stage circuit for receiving an alternating current voltage VAC from AC power. A bridge rectifier 32 rectifies the alternating current voltage VAC to a rough direct current voltage VIN. A transformer 20 has a primary winding 24, a secondary winding 22, and an auxiliary winding 25 for storing and releasing power of the AC power. A quasi-resonant controller 18 controls a power switch 15. Power released by the secondary winding 22 can set an output voltage VOUT through an output capacitor 13. The output voltage VOUT can be controlled through a feedback loop composed of a voltage divider 12, an LT431, a photo coupler 14, and the quasi-resonant controller 18. Further, operational principles of the quasi-resonant power circuit 10 are known by those skilled in the prior art, so further description thereof is omitted for simplicity. As shown in FIG. 1, a current balancing circuit 30 provides each series of light emitting diodes with a corresponding current source, so current flowing through each series of light emitting diodes is roughly the same. In FIG. 1, the current balancing circuit 30 only provides two series of light emitting diodes with corresponding current sources, but number of series of light emitting diodes is determined by a system in practice. A dimming signal VDIM controls the current balancing circuit 30 through a DIM terminal. In general, the dimming signal VDIM controls luminance of each series of light emitting diodes through changing a duty cycle of a corresponding current source.
However, when a user utilizes the dimming signal VDIM to dim luminance of each series of light emitting diodes, a resonance of an operational frequency of the quasi-resonant power circuit 10 may enter the range of human hearing and generate noise because of a corresponding current source toggling between a heavy load and a light load.
SUMMARY OF THE INVENTION
An embodiment provides a control circuit of light emitting diodes. The control circuit includes a driver and a target voltage adjuster. The driver is used for providing an output power to drive at least one series of light emitting diodes, and the driver forces a smallest terminal voltage on the terminals of the at least one series of light emitting diodes to approach a target voltage. The target voltage adjuster is used for adjusting the target voltage according to the smallest terminal voltage.
Another embodiment provides a control circuit of light emitting diodes for driving at least one series of light emitting diodes, where the at least one series of light emitting diodes is coupled to an output power. The control circuit includes a smallest voltage feedback circuit and a target voltage adjuster. The smallest voltage feedback circuit is used for generating an adjusting signal according to a smallest terminal voltage of the at least one series of light emitting diodes and a target voltage, wherein the adjusting signal influences the output power and forces the smallest terminal voltage to approach the target voltage. The target voltage adjuster is used for adjusting the target voltage according to the smallest terminal voltage.
The present invention provides a control circuit of light emitting diodes. The control circuit can limit noise caused by round-trip time to 60 Hz or lower than 60 Hz, which is out of the range of human hearing by a mechanism through adjusting a target voltage.
These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a diagram illustrating a quasi-resonant power circuit for driving light emitting diodes according to the prior art.
FIG. 2 is a diagram illustrating a control circuit of light emitting diodes according an embodiment.
FIG. 3 is a timing diagram illustrating signals in FIG. 2.
FIG. 4 is a diagram illustrating the toggling value of the target voltage according to another embodiment.
FIG. 5 is a diagram illustrating the toggling value of the target voltage according to another embodiment.
DETAILED DESCRIPTION
Please refer to FIG. 2. FIG. 2 is a diagram illustrating a control circuit 100 of light emitting diodes according an embodiment. The control circuit 100 includes a quasi-resonant power circuit 10, a smallest voltage feedback circuit 60, a target voltage adjuster 80, and a current balancing circuit 30. The quasi-resonant power circuit 10, the smallest voltage feedback circuit 60, and the current balancing circuit 30 can act together as a driver for providing an output power to drive a plurality of series of light emitting diodes for forcing a smallest terminal voltage VCAT-MIN on the terminals of the plurality of series of light emitting diodes VCAT1 to VCATN to approach a target voltage VTAR or stabilize at the target voltage VTAR. The target voltage adjuster 80 maintains or changes the target voltage VTAR according to a dimming signal VDIM and the smallest terminal voltage VCAT-MIN.
As those skilled in the prior art know, the quasi-resonant power circuit 10 can control a voltage of a node ADJ of a voltage divider 12 to approach a predetermined voltage (such as 2.5V defined by the LT431) . When the voltage of the node ADJ is fixed, an output voltage VOUT can be determined.
The smallest voltage feedback circuit 60 detects the terminal voltages of the plurality of series of light emitting diodes VCAT1 to VCATN to find the smallest terminal voltage VCAT-MIN. The smallest voltage feedback circuit 60 can determine a value and a direction of an adjusting current IADJ according to the smallest terminal voltage VCAT-MIN. For example, when the smallest terminal voltage VCAT-MIN is lower than the target voltage VTAR, the adjusting current IADJ is 0. Meanwhile, the output voltage VT of the quasi-resonant power circuit 10 is increased to an output target of 80V (the output target of 80V is only an example), and the smallest terminal voltage VCAT-MIN is pulled up simultaneously. If the smallest terminal voltage VCAT-MIN is higher than the target voltage VTAR, the adjusting current IADJ is a high adjusting current IADJ-HIGH, resulting in the voltage of the node ADJ being higher than 2.5V defined by the LT431. Meanwhile, in order to stabilize the voltage of the node ADJ at 2.5V, the output voltage VOUT of the quasi-resonant power circuit 10 starts to be decreased to an output target of 40V (the output target of 40V is also only an example) and the smallest terminal voltage VCAT-MIN is pulled down simultaneously. That is to say, the smallest voltage feedback circuit 60 works with the quasi-resonant power circuit 10 to force the smallest terminal voltage VCAT-MIN to approach the target voltage VTAR or stabilize at the target voltage VTAR.
FIG. 3 is a timing diagram illustrating signals in FIG. 2, and FIG. 3 is used for explaining a control method of the target voltage adjuster 80. In FIG. 3, the signals from top to bottom are the output voltage VOUT, the smallest terminal voltage VCAT- MIN, the target voltage VTAR, the adjusting current IADJ, and a dimming signal VDIM, respectively.
In FIG. 3, the dimming signal VDIM is a digital signal. When the dimming signal VDIM is at a logic-high voltage “1”, the current balancing circuit 30 sinks current. Meanwhile, the smallest terminal voltage VCAT-MIN needs at least a predetermined value for current sources of the current balancing circuit 30 to have sufficient operation voltage. In FIG. 2, the smallest terminal voltage VCAT-MIN is 0.8V. When the dimming signal VDIM is at a logic-low voltage “0”, the current balancing circuit 30 stops sinking current, so the smallest terminal voltage VCAT-MIN can be decreased (the smallest terminal voltage VCAT-MIN can be even lower than 0.8V) to save power.
In FIG. 3, when the dimming signal VDIM is at the logic-high voltage “1”, the target voltage VTAR toggles between 1V and 0.8V. When the smallest terminal voltage VCAT-MIN is lower than the target voltage VTAR, the target voltage adjuster 80 forces the target voltage VTAR to 1V. Meanwhile, because the adjusting current IADJ is 0 and the output voltage VOUT is increased, the adjusting current IADJ and the output voltage VOUT together boost the smallest terminal voltage VCAT-MIN to approach 1V. When the smallest terminal voltage VCAT-MIN is higher than 1V, the target voltage adjuster 80 forces the target voltage VTAR to 0.8V. Meanwhile, because the adjusting current IADJ is a high value IADJ-1 and the output voltage VOUT is decreased, the adjusting current IADJ and the output voltage VOUT together force the smallest terminal voltage VCAT-MIN to approach 0.8V. That is to say, hysteresis range VHYS of the target voltage VTAR is 0.2V (1.0V-0.8V).
In FIG. 3, when the dimming signal VDIM is at the logic-low voltage “0”, the target voltage VTAR is lower than 0.8V, and can even go to 0V. Meanwhile, the adjusting current IADJ is the high value IADJ-1 or a higher value IADJ-OFF. Because the target voltage VTAR is decreased, the output voltage VOUT is decreased gradually.
As shown in FIG. 3, an interval for the smallest terminal voltage VCAT-MIN being gradually increased to 1.0V is defined as rising time T1, an interval for the smallest terminal voltage VCAT-MIN being gradually decreased to 0.8V is defined as falling time T2, and an interval for the smallest terminal voltage VCAT-MIN rising and falling once between 1.0V and 0.8V is defined as round-trip time TRAMP. In FIG. 2, as long as a toggling value of the target voltage VTAR is chosen properly, the round-trip time TRAMP can be controlled properly, resulting in noise not generated by the round-trip time TRAMP easily. For example, if the round-trip time TRAMP is limited to not being lower than 16 ms (that is, a frequency corresponding to 16 ms is lower than 60 Hz which is the minimum of range of human hearing), noise can not be heard by humans easily.
When the dimming signal VDIM is at the logic-high voltage “1”, the smallest terminal voltage VCAT-MIN is toggled with the target voltage VTAR to approach a high target voltage VTAR-HIGH or a low target voltage VTAR-LOW. In FIG. 3, the high target voltage VTAR-HIGH (1.0V) , the low target voltage VTAR-LOW (0.8V), and the hysteresis range VHYS (0.2V) are fixed. But, in another embodiment, the high target voltage VTAR-HIGH, the low target voltage VTAR-LOW, and the hysteresis range VHYS can be changed according to a practical condition. Please refer to FIG. 4. FIG. 4 is a diagram illustrating the toggling value of the target voltage VTAR according to another embodiment. In FIG. 4, if the round-trip time TRAMP is higher than 20 ms, the target voltage VTAR-HIGH is reduced to reduce the round-trip time TRAMP; if the round-trip time TRAMP is lower than 16 ms the target voltage VTAR-HIGH is increased to increase the round-trip time TRAMP. Thus, the round-trip time TRAMP is between 16 ms and 20 ms. In another embodiment, the target voltage VTAR-LOW can be increased or decreased to limit the round-trip time TRAMP.
As shown in FIG. 3 and FIG. 4, the target voltage VTAR is not changed until the smallest terminal voltage VCAT-MIN reaches the target voltage VTAR. However, in the embodiment in FIG. 5, the target voltage VTAR can be changed when the smallest terminal voltage VCAT-MIN has not yet reached the target voltage VTAR. In FIG. 5, when the smallest terminal voltage VCAT-MIN is increased to the high target voltage VTAR-HIGH the rising time T1 is increased gradually. If the rising time T1 is greater than 8 ms and the target voltage VTAR is not yet changed to the low target voltage VTAR-LOW, the target voltage VTAR is directly changed to the low target voltage VTAR-LOW; if the rising time T1 is lower than 8 ms and the target voltage VTAR is changed to the low target voltage VTAR-LOW the high target voltage VTAR-HIGH is increased. Thus, the rising time T1 is limited to about 8 ms. Similarly, if the falling time T2 is greater than 8 ms and the target voltage VTAR is not yet changed to the high target voltage VTAR-HIGH the target voltage VTAR is directly changed to the high target voltage VTAR-HIGH; if the falling time T2 is lower than 8 ms and the target voltage VTAR is changed to the high target voltage VTAR-HIGH the low target voltage VTAR-LOW is decreased. Thus, the round-trip time TRAMP is limited to about 16 ms.
Although the above embodiments take the quasi-resonant power circuit 10 as the first stage circuit, the above embodiments can also take other power circuits (such as an LLC power circuit) as the first stage circuit.
To sum up, the above embodiments of the present invention limit noise caused by the round-trip time TRAMP to 60 Hz or lower than 60 Hz, which is out of the range of human hearing, by the abovementioned mechanisms through adjusting the target voltage VTAR.
Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.
Patent Application
20120086347
