The disclosed embodiments relate to control circuitry for receiving power on electronic devices and computers.
With reference to
With use of the regulator 120, a device can utilize power input from different sources, which may exist at different voltages. The regulator 120 can, for example, regulate input power from different sources to a voltage level required by the device (e.g., 3 volts for many small form factor devices).
Diode elements 110 typically incur voltage drop which is inefficient, and can result in the generation of heat and other detrimental effects. To avoid such problems, many circuits employ ideal diode circuits 140. Ideal diode circuits are exemplified by
The descriptions provided with respect to
For example,
According to some embodiments, a switching OR buck power supply (which can also be called an OR-ing buck convertor) is described to provide several benefits or advantages for controlling circuitry for receiving power.
Embodiments described herein include a power receiver or power receiving circuit that includes a plurality of power input lines arranged in parallel, a controller, and a buck circuit element. Each power input line is connectable to a corresponding power source, and further includes a switching element. The controller is configured to detect a voltage at an input of the switching element of each power input line. The controller determines which of the plurality of switching elements are to be switched on or off based at least in part on the detected voltage at the input of each of the switching elements. The buck circuit element includes components that buck a voltage at an output node of the plurality of power input lines.
Among some benefit provided by embodiments described herein, a switching OR-ing buck power supply circuit is provided that enhances power transfer efficiencies over conventional approaches such as described with
Furthermore, in contrast to ideal diode circuits, points of indecision or avoided or eliminated. Under conventional designs that use ideal diode circuits, points of indecision occur when the voltage drop across the pass element (e.g. FET) on a given diode or element becomes small (e.g., less than a particular threshold). Additionally, embodiments recognize that ideal diode circuits can also have momentary latching, which causes chatter a reverse current flow between various input power supplies.
Additionally, as described herein, embodiments include a switching OR-ing buck power supply circuit that enable switching between anyone of multiple input power supplies, on a per cycle basis. In such embodiments, an incorrect selection of a power input source can be corrected on a very next cycle with no detrimental effects.
According to embodiments described herein, an ideal-diode OR circuits can be integrated with switching buck or low-drop-out regulators to combine power sources and form a unified stable power supply. Embodiments recognize that the use of such circuits can be greatly improved by combining aspects of switching power supplies to physically multiplex the input supplies with minimal energy loss. Embodiments described herein are (i) efficient in total use electronic switching devices, and (ii) inherently stable from a control systems analysis point of view.
Among other benefits, embodiments described herein (i) enable maximum power transfer efficiency—minimize drops in real world pass elements and parasitic; (ii) minimize or avoid indecision inherent in “ideal diode” circuits, such as provided in prior art, which can occur when the voltage drop across a pass FET on the diode OR become small; (iii) minimize or avoid momentarily latching, which can causing either chatter or reverse current flow between the various input power supplies; and/or (iv) enable true sharing and decision correction so that if any one of multiple input supplies is incorrectly selected at a particular cycle, it can be corrected on the next cycle.
According to an embodiment, the switching logic includes logic for minimum error recovery time proportion to 1/Fs, where Fs is the switching frequency. This allows the output to survive a time period (by proper L/C component selection) when the input does not provide any power (e.g. when the wrong input line is selected, such as by false reading). The correction will occur in the next cycle. In implementation, the pulse wave modulation (PWM) may have to increase to accommodate the lost power cycle, but this is transparent to the output.
According to an embodiment, a switching OR buck circuit 200 includes multiple power input lines 210, 212 aligned in parallel to provide an input node to a buck portion (or buck circuit element) 202 of the circuit. Each power input line 210, 212 includes a switching element 221, 223, respectively, that is controlled by logic (as described with an embodiment of
The buck portion 202 includes a switching element 222 (or alternatively a diode element, as described with
The buck portion 202 of circuit 200 includes the inductor component 230 and capacitor component 240, which are charged by voltage supplied to the node A by one of the power input lines 210, 212. As an example, in
The circuit 200 operates on a duty cycle (e.g., 2 MHz), so that the switching element 221 is closed. When the switching elements 221, 223 are opened in the next cycle, no power is being received by node A from the input lines 210, 212. In this portion of the duty cycle,
Among other benefits, embodiments such as described include inherent corrective capabilities for instances when the selected power input line 210, 212 is actually not the best source of power. For example, the power input lines 210, 212 can include a parasitic value that causes a false sensing of the power input. Given the timed decay discharge of the inductor component 230 and the capacitor component 240, the buck portion 202 can compensate for instances when the logic selects to close the wrong switching element 221, 223.
Furthermore, an embodiment such as described by
Furthermore, according to an embodiment, the buck portion 202 includes a switching element 322 (e.g. FET) that is positioned to maintain the charge of the inductor element 230. The controller 310 can control the switching element using gate signal 325 and sense input 327 that is based on a voltage output (indicating state of inductive element 230).
Power received through the receiver 920 is used to power one or more internal components 930 of the device 900. In some implementations, the input power is used to charge a battery 940 and/or power components 930 such as memory or processing resources.
With such implementations, some embodiments enable the switching OR buck power receiver 920 to identify the single best power source on a per cycle basis. Other embodiments may enable load sharing among multiple suitable power sources. For example, a mobile computing device may use power supply sources from the connector and a wireless charging dock. [0038] In embodiments in which the power supply is switched from one source to another, the switching OR buck power receiver 920 minimizes the voltage drop when the switching occurs. Furthermore, if the determination on a particular cycle is incorrect (e.g. a false sense reading), the per cycle basis enables the correct selection to be made on the very next cycle, thereby eliminating or reducing any negative effects from selecting the wrong power source.
Extensions and Variations
According to an embodiment, a system (or device) can be configured to include multiple power inlets, multiple power receiver circuits and multiple loads. Each power receiver circuit can be configured in accordance with one or more embodiments described herein. In addition to power receiver circuits, the system can include control logic for selecting one of the power inlets for one of the loads. The control logic may synchronize the user of the various power receiver circuits to enable power inlet/load pairing and load sharing. For example, a system or device may include multiple power inlets A, B, C (each connecting to different power supplies), multiple receiver circuits, and control logic associated with each power receiver circuit.
According to some embodiment, the control logic associated with each power receiver circuit may be centralized or synchronized. The control logic for one receiver circuit may select, for example, power inlet B for the load handled by that receiver circuit, but if both B and C are above minimum necessary voltage (e.g. criteria), then another receiver circuit for another load may pull power from C to maintain load sharing. In this respect, multiple receiver circuits may operate in synchronized fashion to load share and use power supplied with synchronized logic.
Embodiments described herein include individual elements and concepts described herein, independently of other concepts, ideas or systems, as well as combinations of elements recited anywhere in this application. Although illustrative embodiments of the invention have been described in detail with reference to the accompanying drawings, it is to be understood that the described embodiments are not limited to those precise embodiments, but rather include modifications and variations as provided. Furthermore, a particular feature described either individually or as part of an embodiment can be combined with other individually described features, or parts of other embodiments, even if the other features and embodiments make no mention of the particular feature.
Embodiments described herein include individual elements and concepts described herein, independently of other concepts, ideas or systems, as well as combinations of elements recited anywhere in this application. Although illustrative embodiments of the invention have been described in detail with reference to the accompanying drawings, it is to be understood that the described embodiments are not limited to those precise embodiments, but rather include modifications and variations as provided. Furthermore, a particular feature described either individually or as part of an embodiment can be combined with other individually described features, or parts of other embodiments, even if the other features and embodiments make no mention of the particular feature.
This application claims benefit of priority to Provisional U.S. Patent Application No. 61/392,453, entitled SWITCHING OR BUCK POWER SUPPLY, filed on Oct. 12, 2010; the aforementioned priority application being hereby incorporated by reference in its entirety.
Number | Date | Country | |
---|---|---|---|
61392453 | Oct 2010 | US |