The present invention pertains to a control device employed in a switched electrical power supply system.
A switched electrical power supply system (also called SMPS for “Switched Mode Power Supply”) makes it possible to deliver as output one or more DC voltages on the basis of a DC voltage tapped off at input. This type of switched electrical power supply system is in particular employed in a variable speed drive. In a variable speed drive, the switched electrical power supply system is then charged with providing an auxiliary DC voltage making it possible to power all the electronics of the variable speed drive, from a main DC voltage tapped off from the DC power supply bus of the variable speed drive.
The DC power supply bus provides a main DC voltage that may range from 350 Vcc to more than 1000 Vcc. The control device employed in the switched electrical power supply system must thus be able to switch a current of up to 2 A under 1700 Vcc. In a known manner, the control device can comprise a single transistor of MOSFET type having a breakdown voltage of between 1200 V and 1700V. However, at these breakdown voltages, the MOSFET transistor is at its technological limits. Moreover, its cost is high and, during operation, its losses through the Joule effect are particularly high.
To alleviate these drawbacks, it is known to associate two MOSFET transistors in series, having lower breakdown voltages, ranging from 600V to 900V. Each of the two transistors in series thus supports a lesser electrical voltage, compatible with optimal employment of MOSFET technology.
In the prior art, several setups with two transistors in series have been proposed. The publication entitled “Transformerless Capacitive Coupling of Gate Signals for Series Operation of Power MOS Devices”—Robert L. Hess and Russel Jacob Baker—IEEE transactions on power electronics, vol. 15, No. 5, September 2000, describes a control device comprising at least two transistors of MOSFET type in series. This topology is represented in
So as not to be contingent on these two conditions, it has in particular been proposed to replace the capacitor by a Zener diode Dz1, which then makes it possible to fix the voltage across the terminals of the first transistor T1. This second known topology is represented in
In these two setups, the control of the second transistor T2 depends on the capacitance of the capacitor, whether the latter be intrinsic or additional, and the level of the voltage across the terminals of the capacitor. To control the second transistor T2 in an suitable manner, on the basis of a voltage which is low across the terminals of the capacitor (intrinsic to the Zener diode Dz1 or additional), it is necessary to increase the capacitance of the capacitor connected in series to the gate G of the transistor T2. However, the capacitance of the capacitor cannot be increased indefinitely.
Various control solutions have been described in patent applications EP0453376A2 and EP0140349A2 as well as in the publication by Herbert L Hess entitled “Transformerless Capacitive coupling of Gate Signals for Series Operation of Power MOS Devices” of 1 Sep. 2000—XP011043472.
The aim of the invention is to propose a control device with two transistors in series, intended to be employed in a switched electrical power supply system, the control device allowing suitable control of the second transistor whatever the level of the main DC voltage, and without increasing the capacitance of a capacitor.
This aim is achieved by a control device intended to be employed in a switched electrical power supply system to control a DC/DC converter of said switched electrical power supply system, said control device comprising a first input terminal and a second input terminal, a first transistor connected via its source to the second input terminal and furnished with a gate intended to receive control signals originating from a control unit and a second transistor furnished with a gate and connected via its drain to the first input terminal and via its source to the first transistor, characterized in that the control device comprises:
According to a particular feature, the device comprises one or more superimposed identical patterns, each pattern comprising:
The invention also relates to a switched electrical power supply system comprising a first terminal and a second terminal between which is connected a DC voltage source, a DC/DC converter connected to the first terminal and a control device connected in series with the DC/DC converter and to the second terminal, said control device being in accordance with that defined hereinabove.
According to a particular feature, the DC/DC converter is of insulated “flyback” type, of insulated “forward” type, of step-up type or of step-down type.
The invention finally relates to a variable speed drive intended to control an electrical load, said variable drive comprising:
Other characteristics and advantages will become apparent in the detailed description which follows given with regard to the appended drawings in which:
The solutions presented in
In the subsequent description, certain references employed in the description of
The invention relates to a control device 1 intended to be employed in a switched electrical power supply system. Such a switched electrical power supply system is employed in a variable speed drive, such as represented in
With reference to
The main DC voltage Vbus is employed to power the switched electrical power supply system. The switched electrical power supply system is in particular employed to provide a control voltage to the transistors of the inverter module INV.
A switched electrical power supply system, such as represented in
With reference to
The control device 1 comprises two transistors T1, T2 connected in series between its first input terminal A and its second input terminal B. Preferably, each of the transistors is a MOSFET, an IGBT or a transistor fabricated in a material with a large forbidden band energy (“wide-band gap material”) such as silicon carbide or gallium nitride. Choosing two transistors in series makes it possible to halve the voltage supported across the terminals of each of the transistors, and therefore to decrease their cost and their bulk with respect to a single transistor supporting the entire voltage.
Each transistor T1, T2 possesses a gate G whose control enables a current to be passed between a drain D and a source S. As represented in
The gate G of the first transistor T1 is connected to a control unit U delivering control signals, for example of PWM (Pulse Width Modulation) type, to turn the first transistor T1 on or off. The gate G of the second transistor T2 is of floating-control type. Thus, it is connected to the second input terminal B through a specific control assembly, the subject of the invention.
This control assembly comprises a capacitor Ca connected in series to the second input terminal B and a clipping/routing device, a Zener diode Dz1, for example, connected to the capacitor Ca and to the gate G of the second transistor T2. The Zener diode Dz1 is connected in series with the capacitor Ca.
The control assembly also comprises a second Zener diode Dz2 connected between the gate G and the source S of the second transistor T2.
The capacitor Ca is thus auto-supplied by the discharging of the gate G of the second transistor T2 and by the charging of the drain-source stray capacitance Co2 of the transistor T2. This auto-power supply occurs during the turn-off phase of the first transistor T1. During this phase, the Zener diode Dz1 is clamped and conducts in reverse.
The turn-off phase and the turn-on phase of the control assembly are explained hereinbelow:
Turning-Off Phase:
Initially, both transistors T1, T2 are on.
The current Ip continues the charging and the discharging of the stray capacitances Co2, Cp respectively of the second transistor T2 and of the diode D1 as long as they are not fully charged. The Zener diode Dz2 conducts in forward mode and the Zener diode Dz1 conducts in reverse mode until the respective complete charging and discharging of the stray capacitances Co2, Cp.
Turning-On Phase:
Initially, both transistors T1, T2 are off.
The control unit U dispatches a turn-on signal on the gate of the first transistor T1. The Drain-Source voltage VDS1 across the terminals of the first transistor T1 drops until the full conduction of the first transistor, representing its resistive state.
The voltage Va across the terminals of the capacitor Ca is then sufficient to correctly pilot the second transistor T2. This auto-adaptive voltage Va is expressed in the following manner:
Va=VfwDz1+VDz2+(IdT1*RdSON_T1)
In which:
Starting from the architecture described hereinabove, the invention also consists in cascading transistors above the second transistor T2.
To do this, it is possible to superimpose one or more identical patterns on the architecture described previously and comprising the two transistors T1, T2. The first pattern is connected to the gate G and to the drain D of the second transistor T2.
With reference to
Each added pattern is connected up by its second connection point N to the drain D of the transistor (T3_n−1) of the previous pattern and by its first connection point M to the gate G of the transistor (T3_n−1) of the previous pattern.
The drain D of the transistor of the last pattern (T3_n) is connected to the first input terminal A described hereinabove.
When the first transistor T1 is turned off by the control unit U, the stray capacitances of the transistors in cascade are charged by the current Ip. The voltage across the terminals of each transistor T3_i is clipped to the voltage of its Zener diode Dz1. The Zener diodes conduct and charge the capacitors Cb of the patterns.
Upon turning on, the voltage across the terminals of each capacitor Cb of the patterns compensates for the voltage drops. This voltage V1 across the terminals of each capacitor Cb of a pattern is expressed in the following manner:
V1=(VDZ3−VDz2)+VfwDz1+IdT2*Rdson_T2
Vn=(VDz3−VDz2)+VfwDz1+IdTn−1*RdSon_Tn
If VDz3=VDz2, and the conducting state resistances of the transistors are identical (Rdson_Tn), we then obtain:
V1=V2=Vn=VfwDz1+IdT2*Rdson_Tn
Employing a so-called “floating” capacitor in the cascading of more than two transistors of MOSFET type makes it possible to compensate the voltage drops of the associated Zener diodes Dz1 and the voltage drop related to the conducting state resistance of the transistor.
Number | Date | Country | Kind |
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13 51622 | Feb 2013 | FR | national |
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Entry |
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French Preliminary Search Report and Written Opinion issued Oct. 18, 2013, in Patent Application No. FR 1351622, filed Feb. 25, 2013. |
Herbert L. Hess, et al., “Transformerless Capacitive Coupling of Gate Signals for Series Operation of Power MOS Devices”, IEEE Transactions on Power Electronics, vol. 15, No. 5, XP 011043472, Sep. 2000, pp. 923-930. |
Number | Date | Country | |
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20140241015 A1 | Aug 2014 | US |