Claims
- 1. A wafer sliced from a single crystal silicon ingot grown in accordance with the Czochralski method, the wafer comprising:
a front surface, a back surface, an imaginary central plane approximately equidistant between the front and back surfaces, a front surface layer which comprises a region of the wafer between the front surface and a distance, D1, measured from the front surface and toward the central plane, and a bulk layer which comprises the imaginary central plane but not the front surface layer, and a non-uniform concentration of crystal lattice vacancies, the concentration of the vacancies in the bulk layer being greater than the concentration of vacancies in the front surface layer, wherein (i) D1 is at least about 5 microns but less than about 30 microns, (ii) the surface layer has a resistivity of greater than about 50 ohm cm, and (iii) upon being subjected to an oxygen precipitation heat-treatment at a temperature in excess of about 700° C., the surface layer has less than about 1×107 cm−3 oxygen precipitates while the bulk layer has more than about 1×107 cm−3 oxygen precipitates.
- 2. The wafer of claim 1 wherein D1 is greater than about 5 microns and less than 25 microns.
- 3. The wafer of claim 1 wherein D1 is greater than about 5 microns and less than 20 microns.
- 4. The wafer of claim 1 wherein D1 is greater than 5 microns but less than 15 microns.
- 5. The wafer of claim 1 wherein the surface layer has a resistivity of greater than 100 ohm cm.
- 6. The wafer of claim 1 wherein the surface layer has a resistivity of greater than 200 ohm cm.
- 7. The wafer of claim 1 wherein the surface layer has an interstitial oxygen concentration of less than about 10 ppma.
- 8. The wafer of claim 1 wherein, upon being subjected to a two-step heat-treatment consisting of a thermal donor annihilation step in which the wafer is annealed at about 650° C. for about one hour followed by a thermal donor generation step in which the wafer is annealed at about 450° C. for about one hour, the surface layer has a thermal donor density less than about 1013 cm−3.
- 9. The wafer of claim 1 wherein the wafer further comprises an epitaxial layer on the front surface.
- 10. The wafer of claim 1 wherein the bulk layer has more than about 1×108 cm−3 oxygen precipitates.
- 11. A process for preparing a silicon wafer, the wafer being sliced from a single crystal silicon ingot grown in accordance with the Czochralski method and having a front surface, a back surface, an imaginary central plane approximately equidistant between the front and back surfaces, a front surface layer which has a resistivity of greater than about 50 ohm cm and which comprises a region of the wafer between the front surface and a distance, D1, which as measured from the front surface and toward the central plane is greater than about 5 microns but less than about 30 microns, and a bulk layer which comprises the imaginary central plane but not the front surface layer, the process comprising:
heat-treating the single crystal silicon wafer in a rapid thermal annealer to form crystal lattice vacancies in the front surface layer and in the bulk layer; and rapidly cooling the heat-treated wafer to form a template for oxygen precipitation.
- 12. The process of claim 11 wherein upon being subjected to an oxygen precipitation heat-treatment at a temperature in excess of about 700° C., oxygen precipitates form in the bulk layer and in the front surface layer.
- 13. The process of claim 11 wherein upon being subjected to an oxygen precipitation heat-treatment at a temperature in excess of about 700° C., oxygen precipitates form in the bulk layer but not in the front surface layer.
- 14. The process of claim 11 wherein the process additionally comprises subjecting the wafer to an oxygen precipitation heat-treatment at a temperature in excess of about 700° C. to form a wafer having a denuded zone in the front surface layer and oxygen precipitates in the bulk layer wherein the bulk layer has an oxygen precipitate density of greater than about 1×107 cm−3.
- 15. The process of claim 11 wherein the process additionally comprises subjecting the wafer to an oxygen precipitation heat-treatment at a temperature in excess of about 700° C. to form a wafer having a denuded zone in the front surface layer and oxygen precipitates in the bulk layer wherein the bulk layer has an oxygen precipitate density of greater than about 1×108 cm−3.
- 16. The process of claim 11 wherein prior to the oxygen precipitation heat treatment, the wafer had an interstitial oxygen concentration of less than about 10 ppma.
- 17. The process of claim 11 wherein the silicon wafer is heat-treated, and the heat-treated wafer cooled, in an atmosphere comprising a mixture of an oxygen-containing gas and a nitrogen-containing gas.
- 18. The process of claim 17 wherein the atmosphere comprises a nitrogen-containing compound gas.
- 19. The process of claim 18 wherein the nitrogen-containing compound gas is ammonia.
- 20. The process of claim 17 wherein the nitrogen-containing gas is elemental nitrogen.
- 21. The process of claim 17 wherein the oxygen-containing gas is elemental oxygen or pyrogenic steam.
- 22. The process of claim 17 wherein the gaseous mixture further comprises an inert gas.
- 23. The process of claim 22 wherein the inert gas is selected from argon, helium, neon, carbon dioxide or a mixture thereof.
- 24. The process of claim 17 wherein the atmosphere comprises nitrogen, argon and oxygen.
- 25. The process of claim 24 wherein the ratio of nitrogen-containing gas to inert gas ranges from about 1:5 to about 5:1.
- 26. The process of claim 24 wherein the ratio of nitrogen-containing gas to inert gas ranges from about 1:4 to about 4:1.
- 27. The process of claim 24 wherein the ratio of nitrogen-containing gas to inert gas is about 1:5.
- 28. The process of claim 24 wherein the ratio of nitrogen-containing gas to inert gas is about 1:3.
- 29. The process of claim 17 wherein the concentration of nitrogen-containing gas in the gaseous mixture ranges from about 10% to about 90%.
- 30. The process of claim 17 wherein the concentration of nitrogen-containing gas in the gaseous mixture ranges from about 20% to about 80%.
- 31. The process of claim 17 wherein the atmosphere has an oxygen partial pressure of less than about 400 ppma.
- 32. The process of claim 17 wherein the atmosphere has an oxygen partial pressure of less than about 200 ppma.
- 33. The process of claim 11 wherein the heat-treated wafer is cooled at a rate of at least about 20° C./second through the temperature range at which crystal lattice vacancies are relatively mobile in silicon.
- 34. The process of claim 11 wherein the heat-treated wafer is cooled at a rate of at least about 50° C./second through the temperature range at which crystal lattice vacancies are relatively mobile in silicon.
- 35. The process of claim 11 wherein the wafer is heated-treated to form crystal lattice vacancies at a temperature of at least about 1175° C. for a period of less than about 60 seconds.
- 36. The process of claim 11 wherein the process additionally comprises the step of bonding the wafer to another wafer to form a bonded composite.
- 37. The process of claim 11 wherein the process additionally comprises the step of implanting ions into the wafer.
- 38. The process of claim 11 wherein the process additionally comprises the step of depositing an epitaxial layer onto the surface of the wafer.
- 39. The process of claim 11 wherein the front surface layer of the wafer has a resistivity of greater than about 100 ohm cm.
- 40. A process for preparing a silicon wafer, the wafer being sliced from a single crystal silicon ingot grown in accordance with the Czochralski method, the wafer having an interstitial oxygen concentration of less than about 10 ppma, a front surface, a back surface, an imaginary central plane approximately equidistant between the front and back surfaces, a front surface layer which has a resistivity of greater than about 50 ohm cm and which comprises a region of the wafer between the front surface and a distance, D1, which as measured from the front surface and toward the central plane is greater than about 5 microns but less than about 30 microns, and a bulk layer which comprises the imaginary central plane but not the front surface layer, the process comprising:
heat-treating the single crystal silicon wafer to form crystal lattice vacancies in the front surface layer and in the bulk layer; and, cooling the heat-treated wafer to produce a non-uniform vacancy concentration profile in which the peak vacancy concentration is in the bulk layer.
- 41. The process of claim 40 wherein the oxygen concentration of the wafer is less than about 9 ppma.
- 42. The process of claim 40 wherein D1 is greater than about 5 microns and less than about 20 microns.
- 43. The process of claim 40 wherein the surface layer has a resistivity of greater than about 100 ohm cm.
- 44. The process of claim 40 wherein the surface layer has a resistivity of greater than about 200 ohm cm.
- 45. The process of claim 40 wherein the heat-treated wafer is cooled at a rate of at least about 50° C./second through the temperature range at which crystal lattice vacancies are relatively mobile in silicon.
- 46. The process of claim 40 wherein the wafer is heated-treated to form crystal lattice vacancies at a temperature of at least about 1150° C. for a period of less than about 60 seconds.
- 47. A silicon on insulator structure comprising a device layer, a supporting layer and an insulating layer there between, the supporting layer comprising
a first stratum and a second stratum, the first stratum (i) having a greater resistivity than the second stratum, (ii) extending from the insulating layer to the second stratum, and (iii) having a thickness, T1, as measured from the insulating layer to the second stratum, and a non-uniform concentration of crystal lattice vacancies, the concentration of the vacancies in the second stratum being greater than the concentration of vacancies in the first stratum, wherein (i) T1 is at least about 5 microns but less than about 30 microns, (ii) the first stratum has a resistivity of greater than about 50 ohm cm, and (iii) upon being subjected to an oxygen precipitation heat-treatment at a temperature in excess of about 700° C., the first stratum has an oxygen precipitate density of less than about 1×107 cm−3 while the second stratum has an oxygen precipitate density of greater than about 1×107 cm−3.
- 48. The silicon on insulator structure of claim 47 wherein T1 is greater than about 5 microns and less than about 25 microns.
- 49. The silicon on insulator structure of claim 47 wherein the first stratum has a resistivity of greater than about 100 ohm cm.
- 50. The silicon on insulator structure of claim 47 wherein the first stratum has a resistivity of greater than about 500 ohm cm.
- 51. The silicon on insulator structure of claim 47 wherein the first stratum has an interstitial oxygen concentration of less than about 10 ppma.
- 52. The silicon on insulator structure of claim 47 wherein the insulating layer consists essentially of implanted ions.
- 53. The silicon on insulator structure of claim 52 wherein said implanted ions are oxygen or nitrogen.
- 54. A silicon in insulator structure comprising a silicon wafer, sliced from a single crystal silicon ingot grown in accordance with the Czochralski method, having
(i) a front surface, a back surface, an imaginary central plane approximately equidistant between the front and back surfaces, (ii) a surface stratum which comprises a region of the wafer between the front surface and a distance, D, measured from the front surface and toward the central plane, and which includes a device layer and an insulating layer, the device layer extending from the front surface to the insulating layer, (iii) a bulk stratum which comprises the imaginary central plane but not the first stratum, and (iv) a non-uniform concentration of crystal lattice vacancies, the concentration of the vacancies in the bulk stratum being greater than the concentration of vacancies in the surface stratum, wherein (a) D is at least about 5 microns but less than about 30 microns, (b) the surface stratum has a resistivity of greater than about 50 ohm cm, and (c) upon being subjected to an oxygen precipitation heat-treatment at a temperature in excess of about 700° C., the surface stratum has an oxygen precipitate density of less than about 1×107 cm−3 and the bulk stratum has an oxygen precipitate density of greater than about 1×107 cm−3.
- 55. The silicon on insulator structure of claim 54 wherein the insulating layer comprises implanted ions.
- 56. The silicon on insulator structure of claim 55 wherein the ion layer is composed of oxygen or nitrogen.
- 57. The silicon on insulator structure of claim 55 wherein the insulating implanted ion layer within the surface stratum has a peak concentration less than 1000 angstroms beneath the front surface.
- 58. The silicon on insulator structure of claim 55 wherein the insulating implanted ion layer within the surface stratum has a peak concentration ranging from greater than about 250 angstroms to less than about 1000 angstroms.
- 59. The silicon on insulator structure of claim 55 wherein the insulating implanted ion layer within the surface stratum has a peak concentration ranging from greater than about 500 angstroms to less than about 750 angstroms.
- 60. The silicon on insulator structure of claim 54 wherein D is greater than about 10 microns and less than about 25 microns.
- 61. The silicon on insulator structure of claim 54 wherein the surface layer has an interstitial oxygen concentration of less than about 10 ppma.
- 62. The silicon on insulator structure of claim 54 wherein the bulk layer has an oxygen precipitate density of greater than about 1×108 cm−3.
CROSS REFERENCE TO RELATED APPLICATIONS
[0001] This application claims the benefit of U.S. Provisional Application Serial Nos. 60/283,103 filed Apr. 11, 2001 and 60/300,364 filed Jun. 22, 2001, as well as U.S. Provisional Application by M. Binns et al. entitled “Process for Controlling Denuded Zone Depth in an Ideal Oxygen Precipitating Silicon Wafer” filed Apr. 10, 2002, all of which are incorporated herein by reference.
Provisional Applications (3)
|
Number |
Date |
Country |
|
60283103 |
Apr 2001 |
US |
|
60300364 |
Jun 2001 |
US |
|
60371324 |
Apr 2002 |
US |