The invention relates to the field of field effect transistors (FETs), and in particular to adjusting threshold voltage in organic FETs by introducing a layer of traps at the gate dielectric/semiconductor interface.
Significant advances have been made over the past 5 years in the field of organic field effect transistors. Improvements have been made in contact behavior, processability, mobility, on/off ratio, and a number of other figures of merit.
Virtually all high performance organic field effect transistor work is performed using pentacene as the organic semiconductor. Pentacene is a short, 5-ring aromatic molecule which sublimes in vacuum and can be deposited on substrates at or near room temperature. Holes are significantly more mobile than electrons in pentacene, and PMOS accumulation or depletion mode transistors are usually formed (depending on the threshold voltage). Most other organic semiconductors are also hole-carrying, although there are significant exceptions (e.g. fluorinated pthalalocyanines).
A major stumbling block in OFET technology has been the inability to deterministically control the threshold voltage. Management of the threshold voltage is key to optimization of device performance. In a PMOS device, a threshold voltage which is too positive requires multi-level logic and power supplies to make regenerating logic gates, and too negative of a VT requires a large voltage swing (and consequently more power) to operate. The converse is true for an NMOS device.
According to one aspect of the invention, there is provided a field effect transistor (FET). The FET includes a substrate and a gate layer formed on the substrate. An oxygen plasmarized polymeric gate dielectric is formed on the gate layer so as to increase the threshold voltage of the FET. A semiconductor layer is formed on the oxygen plasmarized polymeric gate dielectric.
According to another aspect of the invention, there is provided a method of forming field effect transistor (FET). The FET includes providing a substrate. A gate layer is formed on the substrate. An oxygen plasmarized polymeric gate dielectric is formed on the gate layer so as to increase the threshold voltage of the FET. The method includes forming a semiconductor layer on the oxygen plasmarized polymeric gate dielectric.
The invention comprises a three step process, which helps manage the threshold voltage of OFETs. In pentacene OFETs, this can be summarized in the following manner: (1) use a polymer gate dielectric for the OFET; (2) use an oxygen-containing plasma to dope the semiconductor with holes and move the threshold voltage more positive; and (3) apply cyclo-hexane to the organic gate dielectric surface to satisfy dangling bonds and move the threshold voltage of the finished device more negative.
OFETs are often modeled using conventional semiconductor device equations. More refined models have been developed to include the contributions of trap states at the semiconductor/dielectric interface by modeling them as a gate voltage dependent mobility or as localized band-gap states. The contribution of process-induced, traps in the FET linear region can be modeled as a fixed charge, Qfixed, that shifts VT and mobile charge, Qmobile, that adds parasitic bulk conductivity. One can assume a constant mobility and model the interface states as electron acceptors.
The following model assumes a parallel conduction mechanism comprising of (a) a surface channel in which the carrier density in the surface accumulation layer is modulated by gate voltage and (b) a “bulk” layer away from the surface channel whose mobile carrier density is not modulated by the gate voltage. Fixed charge shifts the threshold voltage, VT, such that VTmeasured=VT−Qfixed/Cins where Cins=insulator capacitance. Mobile charge Qmobile adds parasitic bulk conductivity, i.e. ΔID=W/L*μVDS*Qmobile. The overall current equation for an OFET in the linear region becomes
where W=width of the OFET, L=length, μ=field effect mobility, VGS=gate to source voltage, and VDS=drain to source voltage. The additional fixed charge ΔQfixed in treated devices compared to untreated devices can be calculated from the difference in measured VT:
ΔQfixed=ΔVT*Cins Eq. 2
Although only the relative difference in Qfixed can be calculated, values for Qmobile can be determined for both treated and untreated devices. Since the measured values of VT include the contribution of Qfixed, Qmobile can be solved for after differentiating equation (1) with respect to VDS:
For the O2 plasma treated devices, Cins=1.5×10−8 F/cm2 and the change in fixed charge ΔQfixed=2.0×10−6 C/cm2. The corresponding Qmobile=1.1×10−6 C/cm2, an order of magnitude greater than Qmobile=1.1×10−7 C/cm2 in the control device. Extracted values for Qmobile in the O2 treated device show that the parasitic conductivity is independent of gate voltage and on the same order of magnitude as ΔQfixed.
The interface states are observable in photocurrent measurements, as suggested by the enhanced photosentivity plasma treated devices, as shown in
The invention demonstrates that the threshold voltage can be adjusted in organic devices by introducing a layer of traps at the gate dielectric/semiconductor interface. This operates by generating a fixed charge right next to the accumulation region of the transistor. One can also reverse this effect by saturating the dangling bonds using cyclo-hexane. When using an organic dielectric, this layer of dangling bonds can be introduced by exposing the dielectric to an oxygen containing plasma.
Organic field effect transistors (OFETs) are candidates for application in large area, flexible, and/or inexpensive circuit applications. A major challenge in the development of OFET technology has been a lack a technique to control of the threshold voltage. This invention describes such a technique. A set of process steps are developed which allows control of the threshold voltage through management of traps at the semiconductor/gate dielectric interface. These traps can be created or eliminated through two chemical treatments which are described herein. These treatments allow the placement of fixed charges at the semiconductor/gate dielectric interface, allowing control of the OFET's threshold voltage. This control is key to the design and creation of useful circuitry.
This procedure can likely be extended to other organic semiconductors, gate dielectric materials, and stacks of organic materials. Other oxidizing and reducing treatments, such as exposure with hydrogen peroxide or ozone to oxidize, or hydrogen plasma to reduce, are likely to also help shift the threshold voltage.
Although the present invention has been shown and described with respect to several preferred embodiments thereof, various changes, omissions and additions to the form and detail thereof, may be made therein, without departing from the spirit and scope of the invention.
This application claims priority from provisional application Ser. No. 60/624,586 filed Nov. 3, 2004, which is incorporated herein by reference in its entirety.
Number | Date | Country | |
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60624586 | Nov 2004 | US |