Patent Application
20130175861
Aspects of the present invention relate generally to the field of electronic signal processing and more specifically to limiting the number of control signals input to a component.
In certain power sensitive applications, it is necessary to power down electronic components whenever possible to conserve resources or to limit the generation of heat among the components. Such components may be powered down whenever they are not required or in use. Traditionally, components are powered down with a control input that signals the power down mode. Thus components having a power down option require two inputs, the signal being input into the component and a control signal. For example, a conventional buffer amplifier will have two input signals, an input analog signal and a control signal that indicates whether the component should enter or exit the power down state and resume standard operations.
Some components that utilize a power down feature may additionally be placed on an integrated circuit behind an isolation barrier. For example, in certain battery stack monitoring systems, some monitoring components may be electrically connected with the high voltage generated by the battery stack. Then each input to the component that crosses the barrier may require its own electrical isolation barrier. Thus it is desirable to limit the number of signals that are required to cross the electronic isolation barrier.
Therefore, there is a need in the art to reduce the number of control lines necessary to achieve power down functionality.
The foregoing and other aspects of various embodiments of the present invention will be apparent through examination of the following detailed description thereof in conjunction with the accompanying drawing figures in which similar reference numbers are used to indicate functionally similar elements.
Embodiments of the present invention provide a system and method for implementing a power down functionality for a component while limiting the number of signals input to the component. A single analog signal may serve the dual purpose of both a conventional input analog signal and a power down control, thereby eliminating the need for a separate and distinct control signal. In an embodiment, the power off threshold may be set as the predefined minimum operating input voltage such that any ‘invalid’ or improperly low input signals may be interpreted as a power down command. Alternate signal ranges may additionally be defined as indicating a power down command. According to an embodiment, an input signal having an improperly high voltage may additionally be interpreted as a power down or other predefined command such that any input signals outside of the defined operating range may be interpreted as a power down command.
As shown in
As previously noted, the buffer amplifier 100 may have a predefined operating range, for example, +1.25V to +4.5V, and the amplifier 120 may power down whenever the voltage for the input signal 101 is below a predefined power down threshold. According to an embodiment, the power down threshold may be set equivalent to the minimum of the defined operating range (e.g., +1.25V).
To determine whether the voltage of the input 101 is below the minimum, and therefore whether the amplifier 120 is to be powered down, the comparator 105 may compare the voltage of the input 101 with the predetermined power down threshold. For example, if the power down threshold is set equivalent to the comparator reference voltage 110, and if the comparator 105 identifies an input voltage less than the comparator reference voltage 110, then the power down signal 106 may be set and the amplifier 120 may enter a power down state. If the voltage of the input 101 then rises above the comparator reference voltage 110, the power down signal 106 may be reset, the amplifier 120 may emerge from the power down state, and the input 101 may be amplified. While the input 101 is above the comparator reference voltage 110, then the power down signal 106 may not be set and the amplifier 120 may continue to operate uninterrupted.
According to an embodiment, the power down threshold may be different than the comparator reference voltage 110. Then, the power down threshold may be determined in relation to a supply voltage VDD or derived from the comparator reference voltage 110. Then the amplifier 120 may be powered down when the voltage of the input 101 is below that set threshold. For example, if the comparator reference voltage 110 is +1.25V and the input 101 has a voltage less than 1.25V below the positive supply voltage VDD, then the component might be set to a power down state. Similarly, according to an embodiment, an input 101 with a voltage above an upper threshold or above the maximum operating range may additionally trigger the power down state, or may signal an alternate instruction.
As shown in
When the component or amplifier powers down, the output signal may not immediately go to GND potential, but rather may gradually drift to GND potential if there is a conductive load between the amplifier output and GND (a transformer for example). When the amplifier does not have a high load, the output signal may drift near the last output signal until a new output is determined.
Once the component is in a power down state, the voltage of the input signal may be sampled (block 425). The voltage of the input signal may be sampled until the detected voltage is above the threshold (blocks 425-430). If the sampled voltage is below the predetermined threshold (block 430), then no action need be taken and the voltage of the input signal may again be sampled. If the sampled voltage is not below the predetermined threshold, then the power down signal may be reset (block 435) which may cause the component to exit the power down state and resume operation.
For example, if a pack 605 is composed of 12 cells 606, each cell 606 nominally developing 4V, then the pack 605 may develop a potential difference of 48V across the pack. However, although the cells are similar, they are not identical, so the cells may develop unequal voltages across individual packs within the stack. Ideally each pack voltage is the same. In the passive balancing scheme of
The controller 630 may be implemented to monitor or to receive an indication of the voltage developed across each pack, determine whether the packs are balanced, and discharge the battery cells of the packs that are out of balance (terminal voltage higher than others). For each pack 605, the balancing system 600 may additionally include a bias circuit implemented in parallel with the pack 605, the bias circuit comprising a variable conductance switch 610 and resistor 615 implemented in series to drain the cells within the pack. The switch 610, and consequently the magnitude of the discharge current, may be controlled by a buffer amplifier 620 which in turn is controlled by the controller 630. The buffer amplifier may be implemented in accordance with
The controller 630 may pass a control voltage Vcontrol 601 to the buffer amplifier 620 via the analog isolator 625. The control voltage 601 may cause the switch 610 to drain off just enough charge from the cells 606 of pack 605 to bring it down to the determined level. In accordance with the preferred embodiment variable conductance switch 610 is a linear switch ie., it can have not only on and off states but various conduction levels between on and off.
When the packs have all reached an equivalent potential, the balancing efforts may be terminated. However, to shut down the components that are no longer needed once the packs have been balanced conventionally requires two isolators, an analog isolator to bring the control voltage across the isolation barrier, as isolator 625, setting the “drain” or balance current from the module, and a digital isolator to bring an on/off signal (or power down signal) across the barrier (not shown), turning on or off the balancing functionality.
However, in accordance with an embodiment of the present invention, the buffer amplifier 620 may be controlled with a single analog input. Then the amplifier buffer 620 may be turned off when the control voltage 601 falls below the predetermined threshold.
Various embodiments may be implemented using hardware elements, software elements, or a combination of both. Determining whether an embodiment is implemented using hardware elements and/or software elements may vary in accordance with any number of factors, such as desired computational rate, power levels, heat tolerances, processing cycle budgets, input data rates, output data rates, memory resources, data bus speeds and other design or performance constraints.
Although the present application is described primarily with reference to a buffer amplifier, it would be understood by an ordinarily skilled artisan that this application may have applicability to other components that receive an input signal and have a power down option.
The foregoing discussion identifies functional blocks that may be used in signal processing systems constructed according to various embodiments of the present invention. In some applications, the functional blocks described hereinabove may be provided as elements of an integrated software system, in which the blocks may be provided as separate elements of a computer program. In other applications, the functional blocks may be provided as discrete circuit components of a processing system, such as functional units within a digital signal processor or application-specific integrated circuit. Still other applications of the present invention may be embodied as a hybrid system of dedicated hardware and software components.
Moreover, the functional blocks described herein need not be provided as separate units. Such implementation details are immaterial to the operation of the present invention unless otherwise noted above. Further, it is noted that the arrangement of the blocks in
While the invention has been described in detail above with reference to some embodiments, variations within the scope and spirit of the invention will be apparent to those of ordinary skill in the art. Thus, the invention should be considered as limited only by the scope of the appended claims.
