Claims
- 1. In a computer system having a CPU and a disk drive, means for adapting different rates of data transfer between the CPU and the disk drive to correspond to a selected data transfer rate comprising:
- means for generating a first clock signal and a second clock signal, said first clock signal and said second clock signal being derived from a single oscillator;
- first logic means drive by said first clock signal for generating a first set of intermediate signals synchronous with said first clock signal;
- second logic means driven by said second clock signal for generating a second set of intermediate signals synchronous with said second clock signal, said second logic means being operable in parallel with said first logic means; and
- means for combining signals of said first set of intermediate signals and said second set of intermediate signals to create disk drive control signals corresponding to the selected data transfer rate.
- 2. In a computer system having a CPU and a disk drive, means for adapting different rates of data transfer between the CPU and the disk drive, as recited in claim 1, wherein said first clock signal and said second clock signal are of like frequency and opposite phase.
- 3. In a computer system having a CPU and a disk drive, means for adapting different rates of data transfer between the CPU and the disk drive, as recited in claim 1, wherein said first clock signal and said second clock signal are 24 MHz square wave signals.
- 4. A method for adapting different rates of data transfer between a CPU and a disk drive to correspond to a selected data transfer rate comprising:
- generating a first clock signal and a second clock signal, said first clock signal and said second clock signal being derived from a single oscillator;
- generating a first set of intermediate signals in accordance with the selected data transfer rate, said first set of intermediate signals being synchronous with said first clock signal;
- generating a second set of intermediate signals concurrent with said first set of intermediate signals in accordance with the selected data transfer rate, said second set of intermediate signals being synchronous with said second clock signal; and
- combining signals of said first set of intermediate signals and said second set of intermediate signals to create a set of disk drive control signals adapted for the selected data transfer rate.
- 5. The method of claim 4 wherein said second clock signal is of like frequency and opposite phase with respect to said first clock signal.
- 6. A method for controlling different rates of data transfer between a CPU and a disk drive in a computer system comprising:
- generating a first clock signal and a second clock signal, said first clock signal and said second clock signal being derived from a single oscillator;
- generating a rate signal representative of a selected data transfer rate;
- generating a first intermediate signal in response to said rate signal, said first intermediate signal being synchronous with said first clock signal;
- generating a second intermediate signal in response to said rate signal, said second intermediate signal being synchronous with said second clock signal, said second intermediate signal being generated in parallel with said first intermediate signal; and
- combining said first intermediate signal and said second intermediate signal to generate disk drive control signals for said selected data transfer rate.
- 7. The method of claim 6 wherein said second clock signal is of a same frequency and opposite phase as said first clock signal.
- 8. In a computer system having a CPU and a disk drive and means for selecting one of a plurality of rates of data transfer between the CPU and the disk drive, means for adapting different rates of data transfer between the CPU and the disk drive to correspond to a selected data transfer rate comprising:
- means for generating a first clock signal and a second clock signal, said first clock signal and said second clock signal being derived from a single oscillator;
- latch means responsive to the selecting means for generating a rate signal representative of the selected data transfer rate;
- first logic means responsive to said rate signal and driven by said first clock signal for generating a first set of intermediate signals in accordance with the selected data transfer rate and synchronous with said first clock signal;
- second logic means responsive to said rate signal and drive by said second clock signal for generating a second set of intermediate signals in accordance with the selected data transfer rate and synchronous with said second clock signal, said second logic means being operable in parallel with said first logic means; and
- means for combining signals of said first set of intermediate signals and said second set of intermediate signals to create a set of disk drive control signals adapted for the selected data transfer rate.
- 9. A method for accommodating two or more rates of data transfer between a processor and a disk drive comprising:
- driving a single oscillator to generate at least first and second clock signals, said second clock signals of opposite phase with respect to said first clock signals;
- generating a first set of intermediate signals compatible with a selected data transfer rate, said first set of intermediate signals being synchronous with said first clock signal;
- generating a second set of intermediate signals compatible with said selected data transfer rate, said second set of intermediate signals being synchronous with said second clock signal and being generated in parallel with said first set of intermediate signals; and
- combining at least a part of each of said first and second sets of intermediate signals to create disk control signals adapted for accessing said disk drive at said selected rate.
- 10. A method for providing data transfer between a processor and a disk drive in a computer system comprising:
- generating first and second clock signals from a single oscillator, said second clock signals of opposite phase with respect to said first clock signals;
- generating a first intermediate signal synchronous with said first clock signal;
- generating a second intermediate signal synchronous with said second clock signal said second intermediate signal being generated in parallel with said first intermediate signal; and
- combining said first and second intermediate signals to generate disk drive control signals for a selected data transfer rate.
Parent Case Info
This application is a continuation of application Ser. No. 208,354, filed Jun. 17, 1988, now abandoned.
US Referenced Citations (2)
Continuations (1)
|
Number |
Date |
Country |
Parent |
208354 |
Jun 1988 |
|