Patent Grant
7646357
1. Field of the Invention
This invention relates to a remote control system for an electrically controlled sign. The system accepts input data in analog video, digital video, digital or similar forms, converts it to sign and control signals, and transmits the converted signal
2. Description of the Prior Art
Prior art display sign control systems have been technology dependent and have not provided sharply defined images when combining animation or other signals developed in a character generator and video. The problem arises when the sign control system attempts to fit the digitized version of the original analog character generator signal into the pixel matrix elements of the sign. Since there is not an exact match between the digitized version and the available pixels, the resulting output signal to the individual pixels varies from the optimum representation. The resulting display provided images in which the character generator output looked “fuzzy”.
Further, prior art sign control systems did not accommodate different sizes of signs, but were generally limited to a specific size and/or type of sign. The prior art systems did not always provide for the combination of live video, graphics, animation, real time data, information such as sports statistics, text information, or such features as instant replay. Prior art sign control systems usually represented a highly specialized, specific control system and did not use, as an example, an off-the-shelf personal computer as a primary element of the control system.
The present invention overcomes the disadvantages of the prior art by providing an advanced video display control system for displaying live video, graphics, animation, real time data, informational, such as sports statistics, text information, and instant replay, alone or in combinations.
The general purpose of the present invention is to provide a dynamic sign control system including; a personal computer or similar device for supplying digital display data in a format which corresponds exactly to the pixels available in the sign, a video link controller, which accepts sign display data from the personal computer and other sources in a variety of analog and digital formats, generates clock and command signals which are converted and combined to provide sign data signals in a format suitable for transmission over a high speed data transmission link such as a fiber optic system to a data receiver and distributor, located at the sign site, which receives the transmitted signals and converts them into sign display device control signals for controlling the individual display (pixel) elements of the sign.
The video link controller, preferably implemented by a programmed personal computer and several special purpose cards, includes a control program executed on the personal computer, a video interface card having, for example, provisions for three composite video inputs and two S-video inputs, which may selected, processed and converted to digital form by a dedicated video processor, and sent, over a fiber optic cable, to the transmitter link control card, where the selected video signal may be combined with digital signals representing text, graphics, and other digital data signals provided from the personal computer, or other suitable source, over an RS232 interface line, where it is buffered prior to high speed optical transmission to the data receiver and distributor located in, or at the site of, the controlled sign. The transmitter link control card has an RS232 line interface which is connected to an RS232 output line of the personal computer. Depending on the commands received by the transmitter link control over the RS232 line, any one of the five video input lines, or the data signals provided to the RS232 input from the personal computer, may be individually selected for conversion and transmission to the data receiver and distributor through a fiber optic cable connected to a modulator which is driven by the selected signal.
Alternatively, in overlay mode, the data signals may be combined with a selected digitized video signal and sent to the data receiver and distributor through the fiber optic cable connected to a modulator which is driven by the combined signal.
It will be appreciated that, as previously mentioned, the digital display signals from the personal computer correspond exactly to the individual display elements of the sign.
The data receiver and distributor includes an optical sensor connected to the fiber optic cable, a receiver for converting the signals to digital form, a programmable logic array, a dedicated microprocessor for configuring the programmable logic array and executing commands sent to the device and contained in the programs which run on the microprocessor, a flash memory, which stores certain program data for use in configuring the system at start-up, a plurality of FIFO buffer devices, an EPROM memory for storing the configuration of the programmable logic arrays, and associated I/O devices for interfacing the receiver and distributor to the various input and output lines and devices. Typically, on power-up, the dedicated microprocessor will configure the programmable logic arrays and the output devices according to the program data stored in the flash memory.
The receiver and data distributor is configured according to data and display intensity dimming data supplied from the sign configuration selected from flash memory in response to the command signal portion of the TAXI signal sent to the data receiver and distributor from the video link controller over the fiber optic cable.
The receiver board receives a serial TAXI encoded signal, via the fiber optic cable, and uses the TAXI receiver chip to decode the signal. The TAXI signal includes two types of information: one is a command signal and the other is display data.
The command bytes are used to receive sign configuration data and display intensity dimming information. When new sign configuration information is received, the dedicated microprocessor activates the appropriate programming sequence, reads the selected sign configuration program out of FLASH, and programs the receiver board and the output cards. The display intensity dimming information is passed on to the output cards which then distribute it out throughout the display.
Display data is received and then organized to be passed on to the addressed output card address. The received display data is stored in the RAM located on the output cards.
The data receiver and distributor also includes an RS232 port that can be accessed from the personal computer to directly interact with the dedicated microprocessor, a light detector input for automatic display dimming, a relay output to control the display fans, and a fan/temperature detector input to blank the display in the case of a failure.
It is an object of the invention to provide an improved remote controller for an electronic sign.
Another object of the invention is to provide a remote electronic sign controller including a personal computer.
Still another object of the invention is to provide a remote electronic sign controller having the ability to select from a variety of video inputs and transmit the selected video input in digital form to a remote sign.
A still further object of the invention is to provide a input remote electronic sign controller having the ability to combine a selected input from a variety of video inputs and data inputs, combine the selected inputs into a single composite digital signal for transmit the ability to combine a selected input from a variety of video inputs and data inputs, combine the selected inputs into a single composite digital signal for transmission to a remote sign location and transmit the single composite signal video to a remote sign over a high speed fiber optic cable.
A still further object of the invention is to provide a remote electronic sign controller having the ability to combine a selected input from a variety of video inputs and data inputs, combine the selected inputs into a single composite digital signal for transmission to a remote sign location and transmit the single composite signal video to a remote sign over a high speed fiber optic cable where the signal is received, buffered and distributed to the individual display elements of the electronic sign.
Still another object of the invention is to provide remote electronic sign controller having the ability to combine a selected input from a variety of video inputs and data inputs, combine the selected inputs into a single composite digital signal for transmission to a remote sign location and transmit the single composite signal video to a remote sign over a high speed fiber optic cable where the signal is received, buffered and distributed to the individual display elements of the electronic sign in accordance with a command signal representing the type of electronic sign being controlled.
Other objects, features and advantages of this invention will become apparent from the following, more detailed, description of an embodiment of the invention.
The Venus 7000 also has the ability to communicate with the V-LINK through a standard COM port on the computer. Through this communication the Venus 7000 has the ability to control the video input selection on the V-LINK, as well as other display adjustments such as brightness, contrast, saturation, etc.
The VMAX3 transmitter card was developed by Daktronics to provide a means of transmitting large volumes of data from a control computer to the sign. It is designed to operate on a PCI bus. The transmitter card has a programmable logic device that is programmed. The card receives data through the PCI bus from software, such as the Venus 7000, and organizes it to send it out on a high speed serial line. A TAXI transmitter chip is used to make the 8 bit parallel to serial conversion at data rates up to and exceeding 175 Mbaud. This serial signal is transmitted out of the card via fiber optic cable.
The V-LINK II controller is a video interface to provide direct video capability to the VMAX3 display architecture. It is made up of two components: the video interface board and the V-LINK II board. The Video Processor board is a daughter card that is connected the V-LINK II through a header.
The Video interface board has three composite video inputs available and two S-video inputs. The video processor chip on the board receives these inputs, processes them and passes the information on to the V-LINK II board on a bus through the header.
The V-LINK II board has a VMAX3 fiber optic input that receives Venus display data. It also has an RS232 port that allows the V-LINK II to communicate with the Venus 7000. This port allows the Venus 7000 operator to select the display output to be a video input, a Venus input, or a video input with Venus data overlaid. Other display controls such as display brightness, contrast and saturation can be adjusted through this port.
The V-LINK II buffers both the Venus data and the video data as it is received. Depending on the configuration received form the RS232 port, the V-LINK II will either send out the buffered video data, the buffered Venus data, or in overlay mode, buffered data from both the video and the Venus data will be sent out. This data is output as a VMAX3 fiber optic output. This information is intended to be received by the data distributor in the sign. A composite video output of the data is also an option. The V-LINK™ II controller has the ability to receive animation data from the Venus 7000 controller and can also receive data from multiple video sources. An input to the V-LINK II controller is used to select which input should be sent to the display. An additional feature is the ability to overlay the animation data from the Venus 7000 controller over the top of a video source digitally and send the combined information to the display.
The data distributor receiver board is a display technology independent component in the VMAX3 system. It is not a standalone unit. At least one data distributor output card must be used with the receiver board to function as a unit, typically located inside the display. The main components of the receiver board include the fiber optic receiver, the TAXI receiver chip, a programmable logic device, a microprocessor, FLASH memory, some FIFOs, an EPROM, and some I/O. On power up the processor programs the programmable logic devices on the receiver board, as well as the devices on the output cards. There is a different program for each technology type. These programs are all stored in the FLASH memory.
The output card is a display technology independent component in the VMAX3 system. It is not a standalone unit. It must be used in conjunction with the data distributor receiver board which is typically located inside the display. The output card uses a connection scheme that is mechanically similar to a PC104 connection, with a proprietary electrical connections, to connect to the data bus on the data distributor/receiver board. The output card has a 16 position rotary switch that sets the address of the card. This card address sets the data that this output card will receive from the data distributor/receiver board. This data is then stored into the on-board RAM.
The output card has two separate data outputs. Each of these outputs include four parallel output ports with identical data. Each output consists of two signal lines, one data line, and one encoded clock line. Additional data lines may be used in future designs. The output card generates an encoded clock signal which includes the following signals:
The output card generates these signals at a rate to ensure a display frame rate of 30 frames per second.
The dual line controller (DLC) is a component in the VMAX3 system that combines the functions of the line controller and the column director into one circuit. It is located inside the display. In some cases it may include the combination of several line controllers with a column director. It is a display technology dependent component that replaces the line controller and the column director for some display technologies. For more information regarding its function, refer to “line controller” and “column director.”
The column director (CD) is a technology independent component in the VMAX3 system located inside the display. Its primary function is to direct the data stream into the correct column of line controllers. Its function is implemented by a programmable logic device and some I/O components. The column director has one input and two outputs. Each of these I/O ports consists of two signal lines, one data line, and one encoded clock line. Additional data lines may be used in future designs. The encoded clock line contains a couple of signals that the column director decodes and uses. They are the column director latch and the frame latch.
The clock decode function watches the encoded clock line on the input port. It ignores the following encoded signals: the data clock, the command clock, and the line controller latch. When a column director latch is decoded, it triggers the output control function. When a frame latch is decoded, the output control function is reset.
The line controller OUT port on the column director passes data to the line controller. This is an unaltered data and clock from the input port.
The column director OUT port on passes data on to the next column director. The data line is passed through unaltered from the input port. The encoded clock line is not allowed to passed the clock signal to the next column director until a column director latch is detected. The clock line will then pass through unaltered from the input port until the column director is reset. A reset takes place when a frame latch is detected.
The line controller (LC) is the component at the end of the VMAX3 data stream. It is located inside the display. The line controller receives serial data from the column director and retransmits it out to the next line controller. The line controller is made up from only a few core components including a programmable logic device, RAM and I/O components. The line controller is a technology dependent component in the VMAX3 system; therefore, several models of line controllers will be developed.
The input data is received serially on two signal lines, one data line, and one encoded clock line. Additional data lines may be used in future designs. The encoded clock line contains several signals that the line controller decodes and uses. They include a data clock, a command clock, a line controller latch, and a frame latch. The input function of the line controller uses this information to organize the data received and store it into RAM.
The output function of the line controller reads the data out of RAM and controls the display modules to look like the image that is currently stored in RAM. The methods to control the module vary depending on the display module technology.
The data transmission scheme from the data distributor output cards to the dual line controller, the column director and the line controller. This data stream is the method to transmit all the data from the data distributor out to all the appropriate locations in the sign. This data stream is transmitted over a Category 5, RJ-45 cable with four twisted pairs of signal wire. This data stream consists of one encoded clock line signal and anywhere from one and three data signal lines. These signal lines are transmitted over a twisted pair in the cable as a RS-422 signal. The function of this encoded clock line would be a big part of this patent idea.
We have no configuration switches in our signs (auto configurable). The dual linen. This provides great flexibility for manufacturing and for long term maintenance for the customer.
The dual line controller or line controller is the only technology dependent component in the VMAX3 system. The data distributor receiver card, the data distributor output card, the column director, the V-LINK II controller and the VMAX3 transmitter card are all completely technology independent. This means that the same electronics that are used to run a 16.7 million color RGB LED display can also be used to run a 16.7 million color incandescent display or a 256 color RG LED display, etc.
The data distributor is auto-configurable. The data distributor receives its configuration data from the Venus 7000 controller. The Venus 7000 controller sends command bytes over the VMAX3 fiber optic data transmission. The data distributor then reads these command bytes and configures itself appropriately. This configuration information includes technology type and sign size.
The display module is actually not a part of VMAX3, but needs to be explained to fully understand how the VMAX3 system interacts with the display. The display module is a technology dependent component which is a part of the actual display. The module contains the light emitting or reflecting components as well as the drive electronics required to activate each pixel in ht module. The size of the module is determined by the technology. A 8×16, 8×4, 8×8, 16×32, and 16×16 (# pixels high×# pixels wide) are some examples of the resolution of a module, although others may be developed. The center/center spacing between pixels on the module may vary. The combination of the center/center spacing and the module resolution determine the physical size of the module.
The drive electronics for the module has been designed to receive and retransmit data using a shift register approach.
Module calibration and pixel to pixel calibration information is stored on each RGB LED driver board. When the system powers up, the dual line controller retrieves the calibration information from the module and stores it. This information is used to help the dual line controller drive the modules in a way that gives the display a nice consistent appearance. The dual line controller can receive an additional module intensity offset from the VMAX3 system to allow the operator some adjustment on a module by module basis.
a-1c constitute a block diagram of the remote control system for an electronic sign;
a-3o illustrate a sign control electrical circuit schematic diagram;
a-5d illustrate a transmitter fiber optic electrical circuit schematic diagram;
a-7i illustrate a video interface electrical circuit schematic diagram;
a-9ab illustrate a V-LINK;
a-11ab illustrate a data distributor receiver;
a-13o illustrate a data distributor output electrical circuit schematic diagram;
a-15k illustrate a dual line controller electrical circuit schematic diagram;
a-17u illustrate a RGB driver electrical circuit schematic diagram;
a-21h illustrate an incandescent line controller electrical circuit schematic diagram;
a-23b illustrate signal timing diagrams;
a-24b illustrate a system flow chart for transmission of data;
a-1c are a block diagram of a control system 10 for a video sign 40, including a controller or computer 12, having a plurality of special purpose cards such as the video interface card 14 and the transmission link control card 16 which are connected to, for example, a personal computer data bus such as the PCI bus 18.
Information to be displayed may be supplied to controller 12 through video interface card 14 at composite video inputs 140, 141, 142, S-video inputs 143, 144, RGB video input 145, or the RS 232 input 146 line. The output signal from a video mixer 150 may be connected to the composite video input 140. The output of a VHS tape deck 153 may be connected to the S-video video input 143. The RS232 line, connected to serial digital input 146, carries commands and display data input supplied to the computer 12 from a keyboard 30 or from some other source such as a communication line, not shown.
Similarly, the video interface card 14 may include a parallel digital input line 147a to accommodate a parallel output 147b from computer 12 or other suitable source of parallel digital signals to be displayed. Other suitable signal sources may be connected to the remaining video input lines 141, 142, 144 and 145 to provide data to be displayed on a selected one of signs 40a-40n. Additionally, a fiber optic port 148a is provided to accommodate the input of data supplied on optical line 148b in the form of an optical signal from computer 12 at optical output port 148c.
As will be described in greater detail, analog video data at the selected of inputs 140-145 and 148 representing information to be displayed on the selected one of signs 40a-40n, is converted to digital form by an analog to digital converter (ADC)1-151, and placed in buffer storage 153 located on video interface card 14.
Buffered data representing information selected for display, is read from buffer storage 153 and loaded on PCI bus 18 for transfer to the transmission link control card 16 in accordance with the data selection command at the RS232 input 146 supplied by the operator, or the computer program.
Display data may also be transferred to the fiber optic input 161 on the transmission link control card 16 from the fiber optic output port 149 on the video interface card 14 in accordance with commands transferred to the video interface card via an optical cable connected to the fiber optic input port 148a. The optic input port 161 accommodates data transmitted at speeds up to 150 MBaud using currently available conventional technology.
The transmission link control card 16 includes a programmable logic array 161 which is configured by microprocessor 163 according to commands and data supplied from computer 12 over line 165a from the RS232 output 165b to the RS232 input 165c. Data received by programmable logic array 161 on PCI bus 18 from computer 12, is organized for transmission and supplied to TAXI transmitter 166, which makes a parallel to serial conversion at data rates up to 175 Mbaud, providing a signal at fiber optic output port 167a, for transmission on fiber optic cable 167b to the optical input 171 of data distributor/receiver 170, located a the remote sign location.
Data distributor/receiver 170 contains an optical receiver 172 connected to receive display information optical provided at optical input port 171 and transfer it to TAXI receiver 173. The decoded output from TAXI receiver 173 is processed by programmable logic array 174, configured by an on-board microprocessor 175, buffered in a FIFO buffer 176, and sent to controlled signs 40a-40n for display, over data lines 41a41n connected to output ports 177a-177n.
Data output port 177a-177n consists of two signal line one data line and an encoded clock line. Each of signs 40a-40n have a line controller and column director, located within the sign, responsive to clock signals and display data, which are effective to decode the display data and generate signals for controlling the intensity of individual pixel display elements in the sign. Further information relating to the elements of the system is provided in the following descriptions thereof.
a-30 illustrate a sign control electrical circuit schematic diagram which is a PCI bus interface card which plugs into the controller or computer 12, comprising a PCI bus interface 40, PCT interface boot ROM 42, port expander 44, control microprocessor 46, programmable control logic 48, SRAMs 50 and 52, voltage monitor 54, adapter interface port 56, and oscillator 58.
a-5d illustrate a transmitter fiber optic electrical circuit schematic diagram which is a daughter card onto the PCE bus interface card, comprising a high speed parallel-to-serial data conversation parallel input/serial output (TAXI) 60, schmidt trigger inverters 62, fiber optic output 64, and temperature and photocell detector input 66.
a-7i illustrate a video interface electrical circuit schematic diagram, comprising video inputs 70, analog-to-digital converter 72, video decoder 74, data output-to-video interface board connection 76, and oscillator 78.
a-9ab illustrate a video display interface electrical circuit schematic diagram, comprising a micro processor which communicates with V7000 via RS-232 port and programs all programmable logic 80 (96,104,124), fiber optic input (160 Mbaud) 81, address latch 82, general purpose storage SRAM 84, PLD program control 86, status latch 88, status indicators 90, process program storage EPROM 92, PLD program storage 94, video receiver programmable logic 96, video data buffers (FIFO) 98, 100 and 102, programmable logic transmitter of transmit out device 104, high speed parallel-to-serial data conversion parallel input/serial output (TAXI) 106, fiber data transmitters 108 and 110, high speed serial-to-parallel conversion serial input/parallel output (TAXI) 112, latches 114 and 116, data buffers (FIFO) 118 and 120, Venus receiver with programmable logic 124, display data storage SRAMs 126, 128 and 130, oscillator 132, watchdog monitor 136, and configuration data storage (serial EPROM) 136.
ia-11ab illustrate a data distribution receiver electrical circuit schematic diagram, comprising a microprocessor used to program (M8 and 200) 140, general purpose data storage SRAM 142, PLD program storage flash 144, processor program storage EPROM 146, programmable logic VMAX3 148, diagnostic command output 150, configuration data outputs (TTL buffer) 152, 154 and 156, display data outputs (TTL buffer) 158, 160 and 162, data transfer controls (TTL buffer) 164 and 166, JTAG port 168, fiber optic in 170, high speed serial-to-parallel conversion serial input/parallel output (TAXI) 172, latches 174 and 176, data buffers (FIFO) 178 and 180, oscillator 182, watchdog 184, fan sense 186, light sensor input 188, latches 190, 192 and 194, and status indicators 198.
a-13o illustrate a data distributor electrical circuit schematic diagram which can be multiple circuits depending on the size of the sign and generating RS422 outputs, comprising a programmable logic device to generate encoded clock signals (receives program from 140) 200, display data storage (SRAM) 202, 204 and 206, configuration control 208, display data latches 210, 212 and 214, inverters 216, channel 1 output 218, channel 2 output 220, oscillator 222, and status indicators 224.
a-15k illustrate a dual-line controller electrical circuit schematic diagram including programmable logic 260 with the column director and RAM 262-266, EPROM 268, RAM 270, 272 and 274, programmable logic without column director 276 and EPROM 278, comprising EPROM 261, red RAM 262, green RAM 264, blue RAM 266, latches 270 and 272 (RGB data signal output TTL levels), oscillator 274, programmable logic without column director and with line controller 276, EPROM program storage 278, red RAM 279, green RAM 280, blue RAM 282, latches 284 and 286 (RGB data signal output TTL levels), LC data out 288, 290 and 292, and CD/LC IN 294, 296 and 298.
a-17u illustrate a RGB driver electrical circuit schematic diagram, comprising modulation calibration interface 302, 2:1 mix drives 304 and 306, octal bus transceivers 308 and 310, red calibration current control 312, green calibration current control 314, blue calibration current control 316, red sink drivers 318 (shift register), green sink drivers 320 (shift register), and blue sink drivers 322 (shift register)
a-21h illustrate an incandescent line controller, comprising programmable logic 420, EPROM program and configuration ROM 422, data storage RAM 424, oscillator 426, LC data/clock input/output 428 and 430, lamp bank module data 432, lamp driver circuit 434, and lamps 436a-436n.
a-23b illustrate signal timing diagrams.
a-24b illustrate a system flow chart for transmission of data.
1. General Overview
The Venus® series controllers of
These controllers generally have four (4) major functions: create images for display, schedule the images for display, interface to external data sources, and send the image data to the display.
The Venus® 7000 controller is the most recent member of the Venus® family and is based on the Windows® NT operating system running on Intel based processor systems. It provides all of the functions of earlier Venus® controllers and extends the capabilities to support larger, video-type displays.
This document will describe the basic operations of the Venus® 7000 Sign Service. This module of the controller is responsible to receive display control information from other modules, retrieve the image data, format it for transmission to the display, and send the data.
These services are provided for multiple signs that could be controlled from a single system.
2. File Formats
The Venus® 7000 Sign Service uses two (2) file types to store and display data. These files use a RIFF file structure and are briefly described below.
2.1 Animation Sequence
String of graphic images that are retrieved by the sign service and displayed consecutively to the display. Shown below are some of the characteristics of the animation sequence.
2.2 Scheduling File
List of sequences and specific times at which they should be displayed.
The Venus® 7000 Sign Service communicates to other modules using Remote Procedure Calls (RPC). By selecting RPC as the messaging service, it allows the Sign Service to simultaneously communicate to a variety of control programs that could be operating (a) on the same machine, (b) on a Local Area Network, or (c) through a remote dial-up connection.
Daktronics typically provides modules to allow an operator to interactively send images directly to the display or configure a schedule that changes the display images over time. However, it is possible for other programs to be written that communicate to the Sign Service through the RPC interface for different applications.
4. Scheduler
If the RPC communications requests a schedule to be displayed, the Sign Service evokes the scheduling function to retrieve the schedule file from disk and instructs to load the appropriate sequences.
5. Loader
If the RPC communications requests a sequence to be displayed, the Sign Service evokes the loader to parse out the frames contained in the file and send them sequentially to the frame buffer.
6. Frame Buffer
The frame buffer acts to smooth out performance differences between the loader and frame generation modules by allowing the loader to “work ahead” to ensure that once the frame generation module begins to construct the actual bit data it will not have to wait for subsequent frames to be loaded from disk (or other storage device). This is a circular buffer that can be sized by the Venus® 7000 controller configuration program.
7. Frame Generation
Assembles all of the chunks of the current frame and assembles the bitmap that will be transmitted to the sign. Depending on the frame type, the Frame Generation module will be required to create transition frames, read RTD buffers, construct characters from font information, assemble data to be transmitted, and other possible tasks on future frame types.
8. Write Buffers
The Write Buffers contain a series of fully assembled frames that are waiting to be read by the Output Device Driver.
9. Output Device Driver
This is a Windows® NT kernel mode device driver. It performs the final timing of when the frames are delivered to the sign and controls all communication to the transmitter card.
10. Transmitter Card
PCI based card that resides in the computer. Assembles data and control information and transmits it to the sign via fiber optic cable.
Various modifications can be made to the present invention without departing from the apparent scope hereof.
This patent application is a divisional of U.S. Ser. No. 09/135,944 filed Aug. 17, 1998 now U.S. Pat. No. 6,819,303 entitled “Control System for an Electronic Sign (Video Display System),” to issue, which is a continuation-in-part of U.S. Ser. No. 08/909,761 filed Aug. 12, 1997 entitled “Display System”, U.S. Pat. No. 5,949,581.
| Number | Name | Date | Kind |
|---|---|---|---|
| 3228288 | Marien | Jan 1966 | A |
| D214939 | Arrigoni | Aug 1969 | S |
| 4145685 | Farina | Mar 1979 | A |
| 4234906 | Schindler | Nov 1980 | A |
| 4254453 | Mouyard et al. | Mar 1981 | A |
| 4591954 | Kawamura et al. | May 1986 | A |
| 5105183 | Beckman | Apr 1992 | A |
| 5321417 | Voelzke et al. | Jun 1994 | A |
| 5408395 | Schmid et al. | Apr 1995 | A |
| 5490049 | Montalan et al. | Feb 1996 | A |
| 5497269 | Gal | Mar 1996 | A |
| 5604509 | Moore et al. | Feb 1997 | A |
| 5629798 | Gaudreau | May 1997 | A |
| 5655830 | Ruskouski | Aug 1997 | A |
| 5790096 | Hill, Jr. | Aug 1998 | A |
| 5796376 | Banks | Aug 1998 | A |
| 5917552 | Van Court | Jun 1999 | A |
| 5949436 | Horan et al. | Sep 1999 | A |
| 5949581 | Kurtenbach | Sep 1999 | A |
| 5969704 | Green et al. | Oct 1999 | A |
| 6014120 | Chiu et al. | Jan 2000 | A |
| 6057863 | Olarig | May 2000 | A |
| 6078318 | Mori et al. | Jun 2000 | A |
| 6104414 | Odryna et al. | Aug 2000 | A |
| 6118486 | Reitmeier | Sep 2000 | A |
| 6169632 | Kurtenbach et al. | Jan 2001 | B1 |
| 6333750 | Odryna et al. | Dec 2001 | B1 |
| 6742188 | Del Castillo | May 2004 | B1 |
| 6819303 | Berger et al. | Nov 2004 | B1 |
| Number | Date | Country | |
|---|---|---|---|
| 20040212638 A1 | Oct 2004 | US |
| Number | Date | Country | |
|---|---|---|---|
| Parent | 09135944 | Aug 1998 | US |
| Child | 10845894 | US |
| Number | Date | Country | |
|---|---|---|---|
| Parent | 08909761 | Aug 1997 | US |
| Child | 09135944 | US |
