Controlled semiconductor capacitors

Description

FIELD AND BACKGROUND OF THE INVENTION
The present invention relates to semiconductor devices and, more particularly, to a new class of semiconductor devices known as "controlled" semiconductor capacitors (CC's), in which the capacitance can be varied using an external control agent such as current or a form of radiation, such as light.
Various attempts have been made to develop devices which include the high-speed control of a capacitance by an external source. To date, these attempts have been largely unsuccessful.
Well known in the art are varactors, in which the capacitance is controlled by a voltage. However, varactors provide only a partial solution since their basis of operation inherently restricts the range of the maximum to minimum capacitance ratios (C.sub.max /C.sub.min) obtainable in a narrow range of voltage changes, and their operating voltage is relatively low.
Also known are certain novel and rather exotic devices which are based on quantum well technologies. However, the performance of these devices also leaves much to be desired.
There is thus a widely recognized need for, and it would be highly advantageous to have, capacitors in which the capacitance can be changed over a wide range at a fixed applied voltage by the action of external factors, such as current or radiation, and the like, and which will feature performance which significantly exceeds that possible with presently known devices.
SUMMARY OF THE INVENTION
According to the present invention there is provided a controlled capacitor system, comprising: (a) a capacitor element; and (b) a diode element connected in series with the capacitor element, the diode element being forward-biased, the system being further characterized in that: (i) the diode element has a capacitance which is less than the capacitance of the capacitor element when the diode element is under zero bias; (ii) the capacitance of the diode element is controlled by varying the forward current through the diode element; and (iii) the forward current acting to control the capacitance of the diode element is selected such that the capacitance of the diode element is smaller than the capacitance of the capacitor element when the current through the diode element is below a minimum value; and (iv) the capacitance of the diode element is bigger than the capacitance of the capacitor element when the current through the diode element exceeds a maximum value.
According to further features in preferred embodiments of the invention described below, the diode element or capacitor is shunted by a device selected from the group consisting of a variable resistor, a reverse-biased diode, a photodiode, a photoresistor and a radiation sensor.
According to still a further embodiment according to the present invention, the capacitor element is a reverse-biased diode.
According to features of a preferred embodiment of the present invention the diode element is a GaAs P.sup.+ PiN diode fabricated on a P.sup.+ substrate having a carrier concentration in the i-region of less than 10.sup.12 cm.sup.-3.
The present invention successfully addresses the shortcomings of the presently known configurations by providing a controlled capacitor system which operates over a wide range of operating parameters and which features performance parameters which are significantly superior to those of presently known devices.
In principle, capacitance control can be effected using various combinations of traditionaI discrete elements such as semiconductor diodes arranged in suitable electrical circuits. However, the performance parameters of such devices, particularly in silicon, prevent a practical realization of such schemes or lead to schemes which are uneconomical.
According to the present invention, controlled capacitors can be fabricated using various techniques and devices. Preferably, these include using GaAs PiN diodes having a near-fully compensated i-region of controllable width, either alone or in combination with high-voltage GaAs Schottky diodes.
It appears that the most effective use of GaAs is in the context of light- or other radiation-controlled capacitors, which can take advantage of the advantages of its direct zone structure. It should be noted, however, that the principles of design and operation presented here allow development of controlled capacitors based on other semiconductor materials, if their properties and the fabrication technology allow the realization of these principles.
Controlled capacitors according to the present invention represent a new class of semiconductor devices having a wide range of possible applications in both high-power and low-power electronics and electrical engineering.

BRIEF DESCRIPTION OF THE DRAWINGS
The invention is herein described, by way of example only, with reference to the accompanying drawings, wherein:
FIG. 1a is a schematic depiction of a series connection of a constant capacitor C.sub.1 and a variable capacitor C.sub.2 ;
FIG. 1b is a representation of the dependence of the voltage on the capacitor over time. At time t.sub.1 a source acts (H>0) to influence the capacitor C.sub.2 ; at t.sub.2 the influence ends (H=0);
FIG. 2 is a the C-V curve of the scheme in FIG. 1a, which includes a jump in the capacitance at voltage V.sub.1, when the external source acts (H>0) to increase the capacitance C.sub.2. The influence ends at V.sub.2 ;
FIG. 3a is a schematic depiction of a series connection of a capacitor C.sub.1 and a forward-biased semiconductor diode D.sub.2. C.sub.1 is shunted with a variable resistor R.sub.1 ;
FIG. 3b shows the equivalent circuit of FIG. 3a: C.sub.t -depletion capacitance of diode D.sub.2. Both are functions of I.sub.2, the current through D.sub.2.
FIG. 4 features the calculated dependencies of the diffusion and depletion capacitances as well as the total capacitance as a function of the current through a GaAs and a Si diode;
FIG. 5 is a graphic illustration of the C-V characteristics of the circuit shown in FIG. 3 for R.sub.1 =const and R.sub.1 =f(V);
FIG. 6a, 6b, 6c and 6d are graphic illustrations of the C-V characteristics of the circuit shown in FIG. 3 for resistors R.sub.1 with various I-V characteristics;
FIG. 7 is a schematic depiction of a hybrid, or non-integrated, or non-monolithic, construction based on a capacitor and a diode connection in series. A switch (K) is used to control the current through the diode;
FIG. 8 is a schematic depiction of a hybrid construction using a reverse-biased diode D.sub.1 as a resistor R.sub.1 ;
FIG. 9 is a schematic depiction of a construction in which the current through diode D.sub.2 which is biased at a fixed voltage, is controlled by the action of an external factor (e.g. light) on the reverse biased diode D.sub.1 ;
FIG. 10 is a schematic depiction of a hybrid construction used to control the current through diode D.sub.2 by a separate source V.sub.2 ;
FIG. 11a shows two diodes connected in series in opposite directions to each other ("back-to-back");
FIG. 11b shows the equivalent circuit of FIG. 11a;
FIG. 12 is a graphic illustration of the C-V characteristics in a current controlled capacitor, or CCC, for two typical reverse I-V characteristics of a diode D.sub.1 : (1) a "soft" characteristic and (2) a "hard" characteristic;
FIG. 13 is a graphic illustration of the C-V characteristics dependence on light irradiation. The reverse I-V characteristic of diode D.sub.1 is controlled by light irradiation. This is an embodiment of a light controlled capacitor or LCC. H=intensity of light;
FIG. 14 is a graphic illustration of the CCC C-V characteristics as a function of the capacitance characteristics of the reverse-biased diode D.sub.1 ;
FIG. 15 shows an LCC construction variant, where diode D.sub.1 is shunted by a photoresistor R.sub.H1 ;
FIG. 16 is an LCC construction variant where diode D.sub.1 is shunted by a photodiode D.sub.H1 ;
FIG. 17 is a graphic illustration of the dependence of the C-V characteristics of the circuits shown in FIGS. 15 and 16 on light intensity (H);
FIG. 18 is a CCC construction variant, where it is possible to decrease the current through diode D.sub.2 by a shunt resistor R.sub.2 ;
FIG. 19 is an LCC construction variant, where it is possible to decrease the current through diode D.sub.2 by a shunt photoresistor R.sub.H2 ;
FIG. 20 is an LCC construction variant, where it is possible to decrease the current through diode D.sub.2 by a shunt photodiode D.sub.H2 ;
FIG. 21 is a graphic illustration of the C-V characteristics for the circuits shown in FIGS. 19 and 20 on light intensity (H);
FIG. 22 shows an electric field (E) distribution and depletion region propagation in a PiN structure with a near-fully compensated W.sub.i -wide i-region;
FIG. 23 shows the dependence of the depletion capacitance of the GaAs PiN structure under zero bias, C.sub.t (0), on the net carrier concentration (N.sub.d -N.sub.a).sub.i in the i-region. x.sub.i (0) is the depletion width under zero bias;
FIG. 24 shows the experimentally determined dependence of the depletion capacitance at zero bias, C.sub.1 (0), on diode areas, for three GaAs PiN diode sets, each set having a different W.sub.i ;
FIG. 25 shows the experimentally determined dependence of the total GaAs PiN diode capacitance, C(V), on forward bias. (W.sub.i .congruent.20 .mu.m, A=0.3 cm.sup.2);
FIG. 26 shows the calculated dependence of the total GaAs PiN diode capacitance, C(I), and its components on the forward current (for an area of 0.3 cm.sup.2): 1--diffusion capacitance, C.sub.d ; 2--depletion capacitance C.sub.t for the case when the i-region width W.sub.i is greater than the depletion region width x.sub.j (V); 3--depletion capacitance for the case when W.sub.i =20 .mu.m; 4--total capacitance for W.sub.i >x.sub.j (V); 5--total capacitance for W.sub.i =20 .mu.m; 6--experimental C(I) dependence;
FIG. 27a shows experimental I-V characteristics of four capacitors (#31, 41, 52 and 54) with different R.sub.d of the reverse-biased diode D.sub.1 (in this integrated, or monolithic, embodiment a Schottky diode, D.sub.1, and a PiN diode, D.sub.2, are fabricated on the same single crystal GaAs substrate);
FIG. 27b is an illustration of the dependence of V.sub.min and .DELTA.C/.DELTA.V on R.sub.d and shows experimental C-V curves of four capacitors (#31, 41, 52 and 54). The figure shows clearly the increase in V.sub.min and the decrease in .DELTA.C/.DELTA.V when R.sub.d increases;
FIG. 28a shows experimental reverse I-V characteristics of diode D.sub.1 (Schottky diode with area A.sub.1 =3.times.3 mm.sup.2) without light irradiation ("dark") and with light irradiation ("light");
FIG. 28b shows experimental C-V characteristics of an integrated LCC under illumination ("light") and without it ("dark"); in this integrated variant a Schottky diode D.sub.1 and PiN diode D.sub.2 are fabricated on the same single-crystal GaAs substrate;
FIG. 28c shows a more detailed view of the C-V characteristics of the same LCC around zero bias;
FIG. 29a shows an integrated construction of a controlled capacitor: D.sub.1 is a Schottky diode with full-area contact;
FIG. 29b shows an integrated construction of a controlled capacitor: D.sub.1 is a Schottky diode with "windows" in the metal contact;
FIG. 30 shows experimentally determined C-V characteristics of an integrated GaAs LCC as shown in FIG. 29a under illumination ("light") and without illumination ("dark"). The areas of the Schottky diode A.sub.1 and the PiN diode A.sub.2 are 3'3 mm.sup.2. W.sub.i in D.sub.2 is 20 .mu.m;
FIG. 31 shows experimentally determined C-V characteristics of an integrated GaAs LCC as shown in FIG. 29a under pulse illumination ("light" and "dark") and without illumination ("dark"). D.sub.1 and D.sub.2 diode areas are 2.times.2 mm.sup.2, W.sub.i in D.sub.2 is 30 .mu.m;
FIG. 32a shows the experimentally determined I-V characteristics of a GaAs LCC with integrated construction (as in FIG. 29a) under different illumination intensities. A.sub.1 =A.sub.2 =3.times.3 mm.sup.2 ;
FIG. 32b shows the experimentally determined C-V characteristics of a GaAs LCC with integrated construction (as in FIG. 29a) under different illumination intensities. A.sub.1 =A.sub.2 =3.times.3 mm.sup.2 ;
FIG. 33a shows another possible integrated construction of a controlled capacitor. D.sub.1 is a PN diode with full-area ohmic contact;
FIG. 33b shows another possible integrated construction of a controlled capacitor. D.sub.1 is a PN diode with "windows" etched into the ohmic contact and the P-layer down to the N-layer;
FIG. 34 shows an integrated construction of a controlled capacitor which uses a transparent layer (in this case In.sub.x O.sub.y) as the Schottky barrier for diode D.sub.1. A corner metal pad provides the ohmic contact to the transparent barrier;
FIG. 35 shows an integrated construction of a controlled capacitor with a PN heterojunction as diode D.sub.1. A window is etched in the top metal contact to allow penetration of radiation;
FIG. 36a shows an integrated construction of a controlled capacitor fabricated on a N.sup.+ substrate with an ohmic contact to the N-layer;
FIG. 36b shows an integrated construction of a controlled capacitor fabricated on a N.sup.+ substrate with a Schottky barrier to the N-layer;
FIG. 37a shows a matrix design for controlled capacitor arrays with Schottky diodes as D.sub.1. The top metal, or top metal and P-layer are etched in a "comb" form to allow penetration of radiation;
FIG. 37b shows a matrix design for controlled capacitor arrays with PN diodes as D.sub.1. The top metal, or top metal and P-layer are etched in a "comb" form to allow penetration of radiation;
FIG. 38 shows a parallel connection of many arrays as in FIG. 37 on a common metallic anode;
FIG. 39a and 39b show an inverted controlled capacitor construction, i.e., a design with a forward-biased Schottky diode as D.sub.2, and a reverse-biased PiN diode as D.sub.1 ;
FIG. 40 shows experimentally determined C-V characteristics of the inverted construction with a dot barrier contact to the low-doped N-layer of a GaAs PiN diode structure of 2.times.2 mm.sup.2 area (A.sub.2 <<A.sub.1) and W.sub.i =20 .mu.m;
FIG. 41 shows an inverted matrix construction with a reverse-biased common PiN diode D.sub.1. (1)--"windows"; (2)--dielectric compound;
FIG. 42a shows a hybrid construction, i.e., separate back-to-back D.sub.1 and D.sub.2 diodes, of a controlled capacitor comprising two PN diodes as D.sub.1 and D.sub.2 with equal or with different areas. In this illustration, the diodes are "glued" together by a conductive medium;
FIG. 42b shows a hybrid construction, i.e., separate back-to-back D.sub.1 and D.sub.2 diodes, of a controlled capacitor comprising a PN diode as D.sub.1 and a PiN diode as D.sub.2, the diodes may have equal or different areas. In this illustration, the diodes are "glued" together by a conductive medium;
FIG. 43a shows a hybrid construction of a controlled capacitor including a reverse-biased Schottky diode and forward-biased PiN diode with equal or different areas, and with full-area Schottky contact.
FIG. 43b shows a hybrid construction of a controlled capacitor including a reverse-biased Schottky diode and forward-biased PiN diode with equal or different areas and with "windows" in the Schottky contact.
FIG. 44a shows a hybrid construction of a controlled capacitor including two back-to-back PiN diodes with equal or different areas; full-area ohmic contact to the N-layer of the reverse-biased diode;
FIG. 44b shows a hybrid construction of a controlled capacitor including two back-to-back PiN diodes with equal or different areas and with "windows" in the ohmic contact and the N-layer of the reverse-biased diode;
FIG. 45a shows experimentally determined I-V characteristics of a GaAs Schottky diode of 3.times.3 mm.sup.2 area with a comb-shaped barrier metallization of 0.04 cm.sup.2 active area A.sub.1 (area of Schottky barrier). H - light intensity;
FIG. 45b shows experimentally determined C-V characteristics of a hybrid LCC composed of a Schottky diode as in FIG. 44a, and of a GaAs PiN diode of 0.36 cm.sup.2 area and W.sub.i =20 .mu.m: 1 --"dark" C-V of the LCC; 2 --"dark" C-V of the Schottky diode; 3 --the capacitance of the LCC is changing between (1) and (2) when illumination is switched on and off;
FIG. 46a shows the I-V characteristics of a similar GaAs Schottky diode to that of FIG. 45a but with an active Schottky diode area of about 0.07 cm.sup.2 ;
FIG. 46b shows the C-V characteristics of a similar LCC to that of FIG. 45b but with an active Schottky diode area of about 0.07 cm.sup.2. As a result, the C.sub.max values are also higher than in FIG. 45;
FIG. 47a shows the parallel connection of many hybrid controlled capacitors on a common metal anode. D.sub.1 --reverse-biased PiN diodes with a "comb" shape etched top contact and N-layer, D.sub.2 --forward-biased PiN diodes;
FIG. 47b shows the parallel connection of many hybrid controlled capacitors on a common metal anode. D.sub.1 --reverse-biased Schottky diodes with a "comb" shape etched metal barrier, D.sub.2 --forward-biased PiN diodes;
FIG. 47c shows the parallel connection of many hybrid controlled capacitors on a common metal anode. Top view of the structures in FIGS. 47a and 47b;
FIG. 48 is a schematic depiction of the dependencies of the illumination, the current through diode D.sub.1 and the capacitance with time;
FIG. 49 is a depiction of the time dependence of capacitance when the unloading time is determined mainly by .tau..sub.d ;
FIG. 50a is a suggested scheme for a CCC-based alternating voltage-to-alternating capacitance converter;
FIG. 50b shows the V(t) and C(t) dependencies of the scheme of FIG. 50a;
FIG. 51a depicts using an LCC to convert a radiation pulse into a capacitance pulse without a special receiver of radiation (D.sub.1 is itself radiation sensitive);
FIG. 51b depicts using an LCC to convert a radiation pulse into a capacitance pulse with a special receiver of radiation (such as a photodiode, photoresistor, etc.);
FIG. 51c depicts the time dependence of the radiation and the capacitance using an LCC to convert a radiation pulse into a capacitance pulse;
FIG. 52 depicts the control of capacitance through the control of the charge in diode D.sub.2 using a separate current source.

DESCRIPTION OF THE PREFERRED EMBODIMENTS
The present invention is of controlled semiconductor capacitors. Specifically, the present invention is of a family of capacitors whose capacitance can be changes quickly and effectively over wide ranges at a wide-ranging set of operating conditions.
The principles and operation of controlled capacitors according to the present invention may be better understood with reference to the drawings and the accompanying description.
Shown in FIG. 1a. is a simple circuit which includes two capacitors. The total capacitance, C, of two capacitors C.sub.1 and C.sub.2 connected in series is given by:
1/C=1/C.sub.1 +1/C.sub.2 (1)
Capacitance C.sub.2 can be quickly changed over a wide range of values using one or more influences or agencies. Assume, for the sake of exposition, that the range of variation of the capacitance C.sub.2 is such that:
C.sub.2 <C.sub.1, whenever the influence is absent (or sufficiently weak)
C.sub.2 >C.sub.1, whenever the influence is sufficiently intense.
Then, if the voltage on the capacitors increases with time as shown in FIG. 1b, and at a certain moment t.sub.1 a source having an intensity H acts to influence the capacitor C.sub.2, the C-V curve displays a jump of the capacitance at V=V.sub.1 (FIG. 2). If C.sub.2 >>C.sub.1 then from Equation (1) one obtains that C.sub.max .fwdarw.C.sub.1. At the end of the influence (t.sub.1) the capacitance returns to the initial value of C.sub.min at V=V.sub.2, and if C.sub.2 <<C.sub.1, C.sub.min .fwdarw.C.sub.2.
The above-described concept can be applied to the circuit of FIG. 3a, which is shown equivalently in FIG. 3b. The semiconductor diode D.sub.2 in FIG. 3a is forward-biased by the applied voltage and is connected in series with capacitor C.sub.1. Capacitor C.sub.1 is shunted by a variable resistivity element R.sub.1. In such a circuit, when the leakage current of the capacitor is sufficiently small or negligible, the current across diode D.sub.2 will be determined mainly by the applied voltage and by the resistivity R.sub.1.
A current controlled capacitor (CCC) according to the present invention causes the capacitance of diode D.sub.2 to be regulated, or changed, by passing through the diode a forward current which is controlled by the resistivity R.sub.1.
The operating principle of CCC's according to the present invention can be better understood with reference to FIG. 3 and the accompanying description.
When the leakage current of the capacitor C.sub.1 is zero, the current through diode D.sub.2 is given by
I.sub.2 =�V-V.sub.2 (I.sub.2)!/R.sub.1 (2)
where V is the applied external bias, and V.sub.2 (I.sub.2) is the forward voltage drop which is determined by the diode I-V characteristics. Remembering that the forward voltage drop on a PN junction or on a metal-semiconductor barrier does not exceed the contact potential .psi., which for most practical semiconductors does not exceed 1 V, then, when V>>1 V, the current through the diode is simply,
I.sub.2 .congruent.V/R.sub.1 (3)
The equivalent circuit of a PN junction diode is shown in FIG. 3b. It is well known that a PN junction can be represented by two parallel capacitances, namely C.sub.1, the "transition" or depletion region capacitance, and C.sub.d, the diffusion capacitance. In surface-barrier devices in which the current is of majority carriers only, such as Schottky diodes, the diffusion capacitance is zero.
The capacitance of a PN diode can be controlled within a wide range by changing the injection of minority carriers with forward current (the diffusion capacitance), and by changing the depletion region width (the depletion capacitance) (FIG. 4).
The diffusion capacitance of a diode D.sub.2 is given by;
C.sub.d =�A.sub.2 q.tau./kT!j.sub.0 exp (qV.sub.2 /kT)=q.tau.I.sub.2 /(kT) (4)
where .tau. is the lifetime of the carriers, I.sub.2 is the current across the diode, and A.sub.2 is the PN junction area. This expression is valid if the ratio of the low-doped base thickness, W, to the diffusion length L is greater than 1, i.e., W/L>1 . If W/L<<1, a correction factor of W/2L must be introduced, i.e.,
C.sub.d =(q.tau.I.sub.2 /kT)(W/2L) (5)
The limit value of C.sub.2 (I.sub.lim) shown in FIG. 5 and given in Equations (4) and (5) is determined by low or intermediate injection levels in the low-doped N region of the PN structure (in the case of a diode with an abrupt asymmetric PN junction, N.sub.a �P!>>N.sub.d �N!, where N.sub.a and N.sub.d are, respectively, the acceptor concentration in the P region and the donor concentration in the N region) or in the i-region of a PiN structure.
The limit value of the current density can be obtained from the conditions:
j.sub.lim =(qD.sub.p /L)p(0).sub.lim, if W/L>>1, (6)
and
j.sub.lim =�p.sub.avg (x)qW!/.tau., if W/L<1 (7)
where p(0) is the concentration of injected carriers on the N-side boundary of the PN junction, and p.sub.avg (x) is the average concentration of injected carriers over the N-base. Assuming p(0).sub.lim =N.sub.d, (or (N.sub.d -N.sub.a).sub.i in any i-layer) and p.sub.avg (x).sub.lim =N.sub.d and inserting into Equations (6,7), one obtains:
j.sub.lim .congruent.qD.sub.p N.sub.d /L, if W/L>1
j.sub.lim .congruent.qWN.sub.d .tau., if W/L<1 (8)
Taking D.sub.p .congruent.10 cm.sup.2 /sec, which is approximately the value of the diffusion coefficient of holes in low-doped Si and GaAs, .tau..congruent.100 ns and L.congruent.10.sup.-3 cm, one obtains for W>20-30 .mu.m:
j.sub.lim =1.6.times.10.sup.-2 A/cm.sup.2 when N.sub.d .congruent.10.sup.14 cm.sup.-3
j.sub.lim =1.6.times.10.sup.-4 A/cm.sup.2 when N.sub.d .congruent.10.sup.12 cm.sup.-3
and for W.congruent.10 .mu.m:
j.sub.lim =1.6.times.10.sup.-1 A/cm.sup.2 when N.sub.d =10.sup.14 cm.sup.-3
j.sub.lim =1.6.times.10.sup.-3 A/cm.sup.2 when N.sub.d =10.sup.12 cm.sup.-3
Thus, for any combination of parameters within a wide range of W and N.sub.d values, j.sub.lim will vary between 0.1 and 160 mA/cm.sup.2. The calculation of C.sub.d from Equations (4) and (5) is valid only in the region where the current I.sub.2 is lower than I.sub.lim, i.e., where,
I.sub.2 .ltoreq.A.sub.2 .times.j.sub.lim (9)
The depletion capacitance for an abrupt asymmetric PN junction (N.sub.a >>N.sub.d) can be found from Equation (10):
C.sub.t2 =A.sub.2 .times.�.epsilon..epsilon..sub.0 qN.sub.d /2(.psi.-V.sub.2))!.sup.0.5 (10)
where .psi. is the contact potential:
.psi.=(kT/q)ln(N.sub.a N.sub.d /n.sub.i.sup.2) (11)
The forward voltage drop on diode D.sub.2 is
V.sub.2 .congruent.V.sub.j =(kT/q)ln�(I.sub.2 /A.sub.2)/j.sub.0 +1!(12)
where V.sub.j is the junction potential, and
j.sub.0 .congruent.(qD.sub.p P.sub.n)/L=�q(D.sub.p).sup.0.5 n.sub.i.sup.2 !/�(.tau.).sup.0.5 N.sub.d !
FIG. 4 shows the diffusion and depletion capacitances, as well as the total capacitance (C.sub.2) of a GaAs and a Si diode (N.sub.d =10.sup.14 cm.sup.-3, A.sub.2 =1 cm.sup.2) plotted against the current through the diode. In a wide current range from 10.sup.-11 to 10.sup.-4 A, the total diode capacitance is determined mainly by the depletion component and changes only slightly. Above current values of about 10.sup.-4 A, the diffusion capacitance begins to dominate, and the total capacitance increases very quickly to the value corresponding to I.sub.lim �C.sub.2 (I.sub.lim)!.
From Equations (1-12) one obtains the following system of equations describing the dependence of the capacitance on the voltage in the circuit shown in FIG. 3 (if the current through the capacitor C.sub.1 is zero):
1/C(V)=1/C.sub.1 +1/�C.sub.12 (I.sub.2)+C.sub.d2 (I.sub.2)!
and
I.sub.2 =(V-V.sub.2)/R.sub.1 .congruent.V/R.sub.1 (13)
A graphic illustration of the solution of system (13) for R.sub.1 (V)=const and R.sub.1 (V)=V.sup.-n, is shown in FIG. 5. Using it one can explain the operating principle of the current controlled capacitor shown in FIG. 3. One can now determine the values of C.sub.max and C.sub.min and the corresponding values of I.sub.max, I.sub.min, V.sub.max, V.sub.min, (C.sub.max)/(C.sub.min) and .DELTA.C/.DELTA.V.congruent.(C.sub.max -C.sub.min)/(V.sub.max -V.sub.min) in FIG. 5. I.sub.min and I.sub.max are obtained from generally accepted conditions:
C(V).sub.max =0.9C.sub.1
and
C(V).sub.min =1.1C.sub.t2 (0) (14)
where C.sub.t2 (0) is the capacitance of the diode D.sub.2 at zero bias, i.e., when the current through the diode is zero, and C.sub.1 is the capacitance of capacitor C.sub.1. Inserting these conditions into the first equation of the Equation system (13) we obtain:
1/1.1C.sub.t2 (0)=1/C.sub.1 +1/�C.sub.t2 (I.sub.min)+C.sub.d2 (I.sub.min)!
1/0.9C.sub.1 =1/C.sub.1 +1/�C.sub.t2 (I.sub.max)+C.sub.d2 (I.sub.max)!(15)
I.sub.min and I.sub.max obtained from the solution of Equation system (15) are inserted into the second equation of Equation system (13) yielding V.sub.min and V.sub.max values:
V.sub.max =R.sub.1 .times.I.sub.max
and
V.sub.min =R.sub.1 .times.I.sub.min (16)
Using Equations (15) and (16) one can formulate the requirements for the parameters of diode D.sub.2, capacitor C.sub.1, and resistor R.sub.1 (FIG. 3) in order to obtain the optimal values of C.sub.max /C.sub.min, .DELTA.C/.DELTA.V, V.sub.min and V.sub.max.
FIG. 6 presents qualitatively the C-V characteristics of the circuit shown in FIG. 3 for resistors R.sub.1 with various I-V characteristics. These characteristics are next examined in detail. The following points are to be noted.
1) R.sub.1 =const (FIG. 6a). The current through the diode is determined by the voltage V. This case is straightforward. The smaller the resistance R.sub.1, the lower will be V.sub.max and V.sub.min, while the slope .DELTA.C/.DELTA.V will increase (FIG. 5):
.DELTA.C/.DELTA.V=(C.sub.max -C.sub.min)/(I.sub.max -I.sub.min)R.sub.1 (17)
The limit value of C.sub.max /C.sub.min is given by:
(C.sub.max /C.sub.min).sub.lim .fwdarw.C.sub.1 /C.sub.2 (0) (18)
2) V.congruent.constant, while the resistivity of the diode is changed abruptly (FIG. 6b). This case is realized when R.sub.1 decreases abruptly because of the influence of external factors (e.g., a photoresistor under the influence of light, the breakdown of a dielectric upon reaching a critical field value, the avalanche breakdown of a PN junction, and the like). The C-V characteristics of such a case is shown in FIG. 6b. When the external influence is absent (H=0), the resistance R.sub.1 is large, and the current through the diode, I.sub.2, is lower than I.sub.min over the entire voltage range. In this case the capacitance of the circuit in FIG. 3 is voltage-independent and is determined by the value of the diode capacitance under zero bias. If now at some voltage V.sub.H an external influence of sufficient intensity H.sub.max is applied to the resistor R.sub.1 (for example a photoresistor is illuminated), the resistance of R.sub.1 will decrease abruptly, and the current through the diode will also increase abruptly to the I.sub.max value. In this case a capacitance "jump" superimposed on the C(V) dependence will, appear. The slope of the curve .DELTA.C/.DELTA.V is:
.DELTA.C/.DELTA.V.congruent.(C.sub.max -CC.sub.min)/�V.sub.2 (I.sub.max)-V.sub.2 (I.sub.min)! (19)
where V.sub.2 (I.sub.max) and V.sub.2 (I.sub.min) are the voltage drops across the diode, corresponding to I.sub.max and I.sub.min, respectively.
It is to be noted that in this example the .DELTA.C/.DELTA.V value can be rather large because the .DELTA.V value can be a small fraction of a volt.
3) R.sub.1 .noteq.const (non-linear resistor)
(a) Here R.sub.1 is voltage-dependent (R.sub.1 .about.V.sup.-n, where -1<n.ltoreq..psi.) and does not depend on external factors. The current through the diode in this case is I.sub.2 .about.V.sup.(1+n) (R=const is a special case, when n=0). As can be seen in FIG. 6c, the threshold voltage and the slope .DELTA.C/.DELTA.V depend on the n value. In many applications, R.sub.n can be replaced by a reverse-biased diode.
(b) A "composite" case (FIG. 6d) is obtained when R.sub.1 depends on both the voltage (R.about.V.sup.-n) and on the external factors (R.about.1/H). Such a combined dependence, C(V,H), can be achieved by using as R.sub.1 a diode connected in a reverse direction, with the I-V characteristics sensitive to the influence of external radiation.
In an embodiment shown in FIG. 7, a switch can be used to control the current through diode D.sub.2. By mining on and off a switch (K) one can control the capacitance of the circuit at a given voltage. It is necessary only that when the switch is "on" (position 2), I.sub.2 .gtoreq.I.sub.max, and when it is "off" (position 1), I.sub.2 <I.sub.min, that is, the leakage current of the capacitor C.sub.1 is not zero.
Illustrated in FIG. 8 is the use of a reverse-biased diode D.sub.1 as a resistor R.sub.1. The current through diode D.sub.2 is now determined by the reverse I-V characteristic of diode D.sub.1. D.sub.1 can be a PN diode or a surface-barrier diode (Schottky diode). The capacitance of D.sub.1, C.sub.D1, is added to the capacitance C.sub.1 :
C.sub.1 (V)=C.sub.1 +C.sub.D1 (V) (20)
The reverse current through diode D.sub.1 is:
I(V)=A.sub.1 .times.j.sub.v (V).times.M(V)+I.sub.s (V) (21)
where, A.sub.1 --the area of D.sub.1 ;
j.sub.v (V)--the volume component of the reverse current;
I.sub.s (V)--the surface leakage current;
M(V)--the avalanche multiplication coefficient:
M(V)=1/�1-(V/V.sub.BR).sup.n ! (22)
V.sub.BR --avalanche breakdown voltage; and
n--coefficient determined by the semiconductor material and by the parameters of the rectifying element.
The calculation of the I-V dependence is rather difficult because of the uncertainties in some parameters and components of the reverse current, such as m and I.sub.s. It is therefore easier in most cases to use the experimental reverse I-V characteristics for the design and calculation of the current-controlled capacitors.
Another way to control the current through the diode at a given voltage is to act with an external factor on the reverse part of the I-V characteristic of diode D.sub.1 (FIG. 9). The influencing factor may be visible light, infrared or ultraviolet radiation, X-ray or .gamma. radiation, nuclear particle radiation, and the like. Each of these radiations influences the generation-recombination component of the reverse current, sometimes increasing it by many orders of magnitude. The practical implementation can be carried out by selecting an industrial diode or by designing a special diode which will satisfy the following requirements:
(1) the reverse current without external influence is lower than I.sub.min over a wide range of applied voltages;
(2) the action of an external influence of intensity H has to increase the reverse current up to I.sub.max ; and
(3) a high sensitivity, i.e., a maximum value of (I.sub.max -I.sub.min)/H.sub.max has to be obtained by the smallest possible H.sub.max value which corresponds to I.sub.max.
FIG. 10 illustrates the regulation of the current through diode D.sub.2 using a separate source (V.sub.2). The control of the current through diode D.sub.2 in the range from I.sub.min to I.sub.max, and consequently the control of C.sub.min and C.sub.max, is possible through the use of a separate source (V.sub.2) with a voltage from zero to about 1 V.
A controlled capacitor system according to the present invention is characterized in that:
1. The system includes a series connection of a forward-biased semiconductor diode and a capacitor.
2. The value of the capacitance of the capacitor connected in series with the diode exceeds the capacitance of the diode under zero bias, i.e., the "zero capacitance".
3. The capacitance of the diode is controlled by controlling the forward current through the diode.
4. The range of the forward current control is selected in such a way that if the current through the diode is less than I.sub.min, the capacitance of the diode is lower than the capacitance of the capacitor connected in series, (C.sub.2 <C.sub.1), and if the current is higher than I.sub.max the diode capacitance is higher than C.sub.1, i.e., C.sub.2 >C.sub.1.
The connection of two diodes in series and in an opposite direction to each other ("back to back") and their equivalent circuit is illustrated in FIG. 11. C.sub.t1 is the depletion capacitance of the diode, and R.sub.j is the differential resistivity of the reverse I-V characteristic of this diode. An important point is that both C.sub.t1 and R.sub.j are voltage-dependent. C.sub.t2 and C.sub.d2 are the depletion and diffusion capacitances, respectively, of diode D.sub.2. The system of expressions used to describe the circuit is:
1/C(V)=1/C.sub.t1 +1/(C.sub.t2 +C.sub.d2)
C.sub.t1 (V)=A.sub.1 (q.epsilon..epsilon..sub.0 N.sub.d1 /2�.psi..sub.1 +(V-V.sub.2)!).sup.0.5
C.sub.t2 (V)=A.sub.2 �(q.epsilon..epsilon..sub.0 N.sub.d2)/2(.psi..sub.2 -V.sub.2)!.sup.0.5
.psi..sub.1 =(kT/q)ln�N.sub.a1 N.sub.d1 /(n.sub.i).sup.2 !
.psi..sub.2 =(kT/q)ln�N.sub.a2 N.sub.d2/ (n.sub.i).sup.2 ! (23)
C.sub.d2 =q.tau.I/(kT)
V.sub.2= (kT/q)ln�(I/A.sub.2)/j.sub.02 +1!
j.sub.02 =qD.sub.p p.sub.n /L=q(D.sub.p).sup.0.5 (n.sub.i).sup.2 /�(.tau.).sup.0.5 N.sub.d2 !
I=A.sub.1 .times.j.sub.v (V-V.sub.2)+I.sub.s
For simplification the assumption is made that V>>V.sub.2, so that V-V.sub.2 .congruent.V and .psi..sub.1 +V-V.sub.2 .congruent.V.
From the previous analysis it follows that the necessary condition for obtaining the value of C.sub.max at voltage V.sub.max is that the capacitance of diode D.sub.1 at V.sub.max be greater than the capacitance of diode D.sub.2 under zero bias (I=0 or V.sub.2 =0) i.e.,
C.sub.t1 (V.sub.max)>C.sub.t2 (0) (24)
If one sets a definite value for the term C.sub.t1 (V.sub.max)/C.sub.t2 (0), one can calculate certain diode parameters and obtain the voltage range. From system (23) one obtains:
C.sub.t1 (V.sub.max)/C.sub.t2 (0)=A.sub.1 /A.sub.2 �N.sub.d1 .psi..sub.2 /(N.sub.d2 V.sub.max)!.sup.0.5 (25)
where V.sub.max is lower than the breakdown voltage of diode D.sub.1, V.sub.BR1, i.e., V.sub.max <V.sub.BR1. From Equation (25) one can reach some interesting conclusions. One can assume, for example, that V.sub.max =100 V, C.sub.t1 (100)/C.sub.t2 (0)=10 and .psi..sub.2 .congruent.1. The maximum concentration N.sub.d1 can be obtained from the condition V.sub.max <V.sub.BR1. Calculations made using expressions show that in this case N.sub.d1 .ltoreq.(2-3).times.10.sup.15 cm.sup.-3. From Equation (25) it follows that if N.sub.d1 =N.sub.d2 then the ratio of the areas A.sub.1 /A.sub.2 has to be about 100, i.e., the area of the PN junction of diode D.sub.1 has to be about 100 times larger than that of diode D.sub.2. The ratio will be smaller if N.sub.d1 >N.sub.d2, but there is a limit imposed by the fact that modern semiconductor technology permits production of low-doped Si and GaAs layers with a minimum concentration of about 10.sup.13 -10.sup.14 cm.sup.-3. For the "best" case when N.sub.d2 .congruent.10.sup.13 cm.sup.-3, i.e., N.sub.d1 /N.sub.d2 .congruent.100, the area ratio A.sub.1 /A.sub.2 of diodes D.sub.1 and D.sub.2 will be about 10.
This analysis shows that even the design of a circuit with a relatively low voltage of 100 V and with a low effective ratio of diode areas of 10-100, stretches the ability of modern technology.
To increase the voltage and to decrease the ratio A.sub.1 /A.sub.2 it is necessary to decrease the donor concentration in the base regions of both diodes. For example, for A.sub.1 /A.sub.2 =10 and at V.sub.max =1000 V, the concentrations N.sub.d1 and N.sub.d2 have to be 10.sup.14 and 10.sup.11 cm.sup.-3, respectively.
An especially interesting case occurs when A.sub.1 /A.sub.2 =1. The calculation shows that at 100 V (N.sub.d1 .congruent.(2-3).times.10.sup.15 cm.sup.-3) the concentration N.sub.d2 .congruent.(2-3).times.10.sup.11 cm.sup.-3. The structure includes a series connection of a GaAs Schottky diode as D.sub.1, and of a GaAs PiN diode as D.sub.2. The donor concentration in the base region of the Schottky diode N.sub.d1 is about (2-3) .times.10.sup.15 cm.sup.-3, and the concentration N.sub.d2 in the i-region of the PiN diode is less than 5.times.10.sup.11 cm.sup.-3.
Equation system (23) allows the calculation of the parameters of controlled capacitors and to design diodes for use as in such controlled capacitor devices. FIG. 12 demonstrates an example of a grapho-analytic calculation of a C-V characteristic for two typical reverse I-V characteristics of a diode D.sub.1 : for a "soft" characteristic (1), and for a "hard" one (2), in which the I.sub.min value is reached only at the start of the avalanche multiplication. V.sub.min and the slope .DELTA.C/.DELTA.V are smaller for the diode with the "soft" I-V characteristic than for the "hard" one. It is clear from the previous analysis that the smaller the differential resistivity of the reverse I-V curve of diode D.sub.1, the higher will be the slope .DELTA.C/.DELTA.V. The maximum slope can be obtained when the switching condition (i.e., when I=I.sub.min), is reached at avalanche breakdown, where the slope of the I-V characteristic is maximum. The I.sub.min value is the same for both the "soft" and the "hard" diodes D.sub.1, because their C.sub.min values coincide. This is clear and is a conclusion from the expressions describing the theoretical model of this capacitor. The I.sub.max values are different and I.sub.max1 >I.sub.max2. This is also in agreement with the model, but needs some qualitative explanation. The difference between the I.sub.max values is due to the difference in the C.sub.max values. This difference is due to the decrease of the capacitance of diode D.sub.1 with increasing applied voltage. In FIG. 12 one clearly sees that for C.sub.t1 =const, C.sub.max1 =C.sub.max2 and I.sub.max1 =I.sub.max2. To increase C.sub.max /C.sub.min at a given voltage, the diode D.sub.1 has to be chosen with some higher "zero capacitance" and also with a weaker dependence of C.sub.t2 on V. At the same time I.sub.max has to be lower than I.sub.lim.
It is well known that the irradiation of a PN junction with visible light or with other kinds of radiation generates excess electron-hole pairs, the number of which, which can significantly exceed the equilibrium concentration, depends on the parameters of the radiation and of the PN junction. In a reverse-biased PN junction, radiation can increase the generation recombination current by many orders of magnitude.
This process makes it possible to design and fabricate a capacitor which is controlled by light or other forms of radiation. In fact, the result is still a current controlled capacitor, as described above, with the control current being changed through the agency of incident radiation. In the case of a current controlled capacitor described above the reverse current of diode D.sub.1 was independent of all external influences except temperature and the "dark" I-V characteristics were completely determined by the construction and nature of the diode. In contrast, in the case of the light, or radiation, controlled capacitor, one can control the I-V characteristics of diode D.sub.1 through a rather wide range by irradiation, and therefore control the capacitance of the device. The power of the radiation needed for the control is rather small.
FIG. 13 illustrates the grapho-analytical calculation of the C(V) dependence on irradiation. C(V).sub.min is determined by the "dark" reverse I-V characteristics of diode D.sub.1, and C(V).sub.max is determined by the reverse current of diode D.sub.1 under irradiation. The more intense the radiation, the higher C(V).sub.max. For a sufficiently high intensity (high reverse current), the C.sub.max value is, as in the case of current controlled capacitance, limited by the depletion capacitance of diode D.sub.1 �C.sub.t1 (V)!.
In alternative embodiments according to the present invention it is possible to fabricate hybrid devices which include two diode devices connected in series. In the construction of two diodes connected in series the control of the capacitance of diode D.sub.2 is provided by the reverse I-V characteristics of diode D.sub.1 (FIG. 11a). The conditions C.sub.1 (0)>>C.sub.2 (0) and I(V.sub.min).sub.1 .ltoreq.I.sub.min.2 have to be fulfilled. The lower the reverse current of diode D.sub.1, i.e., the higher its differential resistivity (.DELTA.V/.DELTA.I) and the higher V.sub.min. V.sub.min is limited by the breakdown voltage of diode D.sub.1 : V.sub.min .ltoreq.V.sub.BR1.
As diodes D.sub.1 and D.sub.2, one could use, for example, the usual silicon diodes, but, as explained above, these diodes suffer from the drawback that a rather high ratio of areas A.sub.1 /A.sub.2 (about 100 or higher) is required, and that they have rather high reverse currents. The high A.sub.1 /A.sub.2 ratio requirement can be reduced by using as diode D.sub.2 a GaAs PiN diode with a carrier concentration in the i-region which is much lower than that in the N region of diode D.sub.1. In this case, both C.sub.min and C.sub.max /C.sub.min can be changed by changing A.sub.2 and/or the thickness of the i-region.
As diode D.sub.1 one may use Schottky diodes, PN diodes or PiN diodes. Schottky diodes have a larger zero capacitance, but a rather low reverse voltage. For example, silicon Schottky diodes are mostly designed with reverse voltages below 60V. The reverse current of such diodes is rather high, about tens or hundreds of microamperes, which decreases V.sub.min significantly, to a few volts or tenths of a volt, therefore making them unusable in certain applications.
More attractive is the use of GaAs Schottky diodes, which can now be fabricated with a reverse voltage of 200-300 V and with reverse currents below one microampere. The common disadvantage of all Schottky diodes is a strong dependence of the capacitance of the reverse-biased diode on the applied voltage (FIG. 14):
C(V).sub.D1 .congruent.C(0).sub.D1 V.sup.-1/2 (26)
Therefore, at an applied bias of only 100 V the capacitance of a Schottky diode decreases by about 10 times from its zero-voltage value.
PN junction diodes can be fabricated with significantly higher reverse voltage and lower reverse currents than those of Schottky diodes. It is possible also to fabricate diodes with a linear doping profile and consequently with a weaker C(V) dependence (FIG. 14):
C(V).sub.D1 .congruent.C(0).sub.D1 V.sup.-1/3 (27)
The most promising device for use as diode D.sub.1 is a GaAs PiN diode. In this case,
C(V).sub.D1 .congruent.C(0).sub.D1 V.sup.-1/k (28)
where k=6-12 (FIG. 14).
When a PiN diode is, in addition, used as diode D.sub.2, the C.sub.max /C.sub.min value can be obtained from the relationship:
C.sub.max /C.sub.min .congruent.C(0).sub.D1 /C(0).sub.D2 .congruent.A.sub.D1 W.sub.i2 /A.sub.D2 W.sub.i1 (29)
and the C(0).sub.d1 and C(0).sub.D2 values from:
C(0).sub.D1 =.epsilon..epsilon..sub.0 A.sub.D1 /W.sub.i1 (for GaAs C(0).sub.D1 =10.sup.-12 A.sub.D1 /W.sub.i1)
C(0).sub.D2 =.epsilon..epsilon..sub.0 A.sub.D2 /W.sub.i2 (for GaAs C(0).sub.D2 =10.sup.-12 A.sub.D2 /W.sub.i2)
where A.sub.D1 and A.sub.D2 are the areas of the PiN diodes, and W.sub.i1 and W.sub.i2 are the thicknesses of their respective i-regions. A detailed model of a device with a GaAs PiN diode as diode D.sub.2 is presented below.
The simple series connection of two diodes shown in FIG. 11 does not allow the control of V.sub.min because its value is determined mostly by the parameters of diodes D.sub.1 and D.sub.2 and, in particular, mainly by the reverse I-V characteristics of diode D.sub.1 . If the diodes are fabricated in a package which protects the rectifying elements from any external influence, the temperature will be the only factor which can influence V.sub.min. It is well known that the reverse current grows exponentially with temperature, so the V.sub.min stability will be determined mainly by the temperature stability of the reverse I-V characteristics of diode D.sub.1.
Much more attractive is the control of C(V) by external factors, for example, by light. Possible construction variants are shown in FIGS. 15 and 16, where the diode D.sub.1 is shunted by a light sensor, for example, by a photoresistor or by a photodiode.
If one chooses diodes D.sub.1 and D.sub.2 and photoresistor R.sub.H1 or photodiode D.sub.H1 so that without illumination the current through diode D.sub.2 is lower than I.sub.min over the entire-voltage range, while under illumination the current is higher than I.sub.min, then it is possible to control the capacitance of the circuit by illumination (FIG. 17). By selecting the moment of the light impulse relative to the V(t) characteristic, and the intensity of illumination, one can control the V.sub.min and C.sub.max /C.sub.min values.
As mentioned above, the main condition for V.sub.min >0 is that the value of the current through diode D.sub.2 be lower than I.sub.min at V.sub.D1 <V.sub.min. This condition is rather difficult to obtain in a reversely-biased diode D.sub.1. If the reverse current of diode D.sub.1 is higher than I.sub.min, it is possible to change the current through D.sub.2 by a shunt resistor R.sub.2 (FIG. 18), which is selected so that the current through D.sub.2 up to an applied voltage V.sub.min will be lower than I.sub.min. A lower R.sub.2 value leads to a smaller current through diode D.sub.2 and to a higher V.sub.min.
Using a photoresistor (R.sub.H2) or a photodiode (D.sub.H2) as a resistor R.sub.2 (FIGS. 19, 20), it is possible to control the C.sub.max /C.sub.min value by illumination. In this type of circuit, in contrast with that of FIG. 17, an increase in the illumination intensity will decrease the current through diode D.sub.2 and consequently the capacitance. If, without illumination, the current through D.sub.2 is I.sub.max and the capacitance is C.sub.max, then under illumination of an intensity H.sub.max, the current through D.sub.2 will decrease to I.sub.min, and consequently C(0) will decrease to C.sub.min (FIG. 21).
In a preferred embodiment according to the present invention, a controlled capacitor is based on a GaAs PiN diode and a Schottky diode or, alternatively, on two GaAs PiN diodes. State-of-the-art technologies (MBE, MOCVD, and the like) make it possible to fabricate PiN silicon diodes having i-layer doping concentrations of not less than (1-5).times.10.sup.13 cm.sup.-3, and GaAs diodes with a doping concentration of not less than 10.sup.14 cm.sup.-3 in an i-layer of a few microns in thickness.
It was shown above that the doping concentration is the main determinant of the C.sub.min and C.sub.max (V)/C.sub.min (V) values. To achieve acceptable values of C.sub.max /C.sub.min in diodes having a relatively high carrier concentration in the low-doped region, a rather high ratio of junction cross-section areas A.sub.1 /A.sub.2 of diodes D.sub.1 and D.sub.2 is required, which constitutes a major drawback in many applications.
In our copending PCT application (PCT/US94/06144, filed 31 May 1994), which is incorporated by reference in its entirety for all purposes as if fully set forth herein, is disclosed a novel GaAs PiN layer growth technology which makes it possible to fabricate diode structures having a carrier concentration in the i-region (N.sub.d -N.sub.a).sub.i of less than 5.times.10.sup.11 cm.sup.-3. At the same time, the i-region thickness can be controlled from about 3 to 100 .mu.m. These structures open up new possibilities for the design of controlled capacitors according to the present invention.
A sketch of the electric field distribution and of the depletion layer propagation in a PiN structure with a near-fully compensated W.sub.i -wide i-layer is shown in FIG. 22. If (N.sub.d -N.sub.a).sub.i is sufficiently small, the calculated thickness of the depletion region in the i-region, x.sub.i, under zero bias is much larger than W.sub.i. In this case the value of the capacitance C.sub.t under zero bias is determined mainly by W.sub.i. The assumption is made that in these PiN structures the P-i and i-N junctions are abrupt and that N.sub.a and N.sub.d in the P and N regions, respectively, are much higher than (N.sub.d -N.sub.a).sub.i. These assumptions allow one to neglect the expansion of the depletion region into the P and N regions under reverse bias (x.sub.P and x.sub.N in FIG. 22). Under small forward bias the calculated depletion width x.sub.i (V.sub.2) decreases (but still remains larger than W.sub.i), however the changes are very small. From the forward bias value corresponding to x.sub.i .congruent.W.sub.i, C.sub.t begins to grow because the width of the depletion region is still not bound by the i-region. For this type of PiN diodes, C.sub.t is given by Equation (30a,b):
C.sub.t (V)=C.sub.t (W.sub.i)=.epsilon..epsilon..sub.o A/W.sub.i, when x.sub.i (V)>W.sub.i (30a)
C.sub.t (V)=C.sub.t (x.sub.i)=.epsilon..epsilon..sub.o A/x.sub.i (V), when x.sub.i (V)<W.sub.i (30b)
where
x.sub.i (V)=�2.epsilon..epsilon..sub.0 (.psi.-V)/q(N.sub.d -N.sub.a).sub.i !.sup.0.5 (30c)
From Equations (30a-c) and experimental measurements of C.sub.t (0), one can extract W.sub.i and estimate the maximum (N.sub.d -N.sub.a).sub.i value. FIG. 23 shows the dependence of C.sub.t (0) on (N.sub.d -N.sub.a).sub.i, calculated by using Equations (30b,c) at zero bias (V=0) and at room temperature (T=300K). The dotted lines show experimentally measured C.sub.t (0) values of two diodes with different W.sub.i (W.sub.i,1 .congruent.70 .mu.m, W.sub.i,2 .congruent.17 .mu.m). This plot shows that the calculated x.sub.i (0) values corresponding to the measured C.sub.t (0) are close to the measured W.sub.i values, and that the condition C.sub.t (0).sub.exp =C.sub.t (0).sub.calc will be fulfilled for (N.sub.d -N.sub.a).sub.i .congruent.2.5.times.20.sup.11 cm.sup.-3 for W.sub.i.1 and for about 4.times.10.sup.12 cm.sup.-3 for W.sub.i,2.
Because (N.sub.d -N.sub.a).sub.i is, in principle, independent of W.sub.i one can conclude that:
(1) for W.sub.i,1 <W.sub.i <W.sub.i,2, (in the above case up to about 70 .mu.m) the maximum concentration in the i-region is below 5.times.10.sup.11 cm.sup.-3 ;
(2) from Equations (30b,c) one obtains that x.sub.i (0).sub.max .gtoreq.70 .mu.m for (N.sub.d -N.sub.a).sub.i .ltoreq.5.times.10.sup.11 cm.sup.-3 ;
(3) for all W.sub.i .ltoreq.x.sub.i (0).sub.max the W.sub.i value can be obtained from the expression:
W.sub.i .congruent..epsilon..epsilon..sub.0 A/C.sub.t (0).sub.exp (31)
FIG. 24 illustrates the measured dependence of C.sub.t (0) on PiN diode areas for three diode sets, each set having a different W.sub.i. Within each set W.sub.i is constant. The lines represent a regression fit according to the dependence C.sub.t (0).about.A (Equation 30a). Inserting the regression parameters into Equations (31) one obtains W.sub.i values of 71, 27 and 17 .mu.m, which are close to thicknesses measured by other methods. This result supports the validity of both the condition x.sub.i (0)>W.sub.i and the assumption that (N.sub.d -N.sub.a).sub.i is independent of W.sub.i.
A very important practical conclusion from these measurements is that the ability to grow thick (up to 100 .mu.m) PiN layers with such a low (.sub.d -N.sub.a).sub.i allows the fabrication of diodes with a relatively large (about 1 mm.sup.2) area but with a very small (1 pF and smaller) capacitance. This is very important for the design of high-frequency semiconductor capacitors, because one can use special high-frequency packages and thus easily avoid the normal stray capacitance due to connections. At the same time the fabrication technology of these small-capacitance structures is much easier than that in existing technologies for making low-capacitance silicon structures.
In an analogous way, the diffusion capacitance of a GaAs PiN structure is given by:
C.sub.d =q.tau.I/kT for W.sub.i /L>1 (32a)
C.sub.d =(q.tau.I/kT).times.W.sub.i /2L for W.sub.i /L<<1 (32b)
where .tau. is the carrier lifetime, and L is the diffusion length. These equations are valid up to a maximum current density of about 10.sup.-1 A/cm.sup.2 when (N.sub.d -N.sub.a).sub.i is about 5.times.10.sup.11 cm.sup.-3.
The total capacitance of a diode is given by:
C(I)=C.sub.t (V.sub.2)+C.sub.d (I) (33)
where C.sub.t (V.sub.2) is the depletion capacitance under forward bias, Equations (30), and
V.sub.2 =(kT/q)ln�(I/A)/j.sub.0 +1!
and
j.sup.0 .congruent.q(D.sub.i).sup.0.5 p.sub.i /(.tau..sub.i).sup.0.5
where D.sub.i. p.sub.i and .tau..sub.i are, respectively, the diffusivity, equilibrium hole concentration and hole lifetime respectively in the i-layer.
FIG. 25 shows the measured dependence of the total PiN diode capacitance C(I) on forward bias, and FIG. 26 shows the calculated dependence of C(I) and its components on the forward current (for an area of 0.3 cm.sup.2). The diffusion component C.sub.d is given by curve 1; the depletion component C.sub.1 was calculated for two conditions: (a) - for W.sub.i >x.sub.i (V) (curve 2), and (b) - for W.sub.i =20 .mu.m (curve 3).
For condition (a), C(I) (curve 4) is determined mainly by C.sub.t up to a certain current, and grows only slowly with increasing current. Above I=I.sub.min (I.congruent.10.sup.-6 A), C(I) increases much faster, and the dependence becomes almost linear due to the dominance of C.sub.d (curve 1). For condition (b) C.sub.t is independent of the current (curve 3) up to .about.10.sup.-3 A, and should be calculated from (30a); C(I) (curve 5) is then given by:
C(I)=C.sub.t (W.sub.i)+C.sub.d (I) (34)
For illustration, curve 6 in FIG. 26 shows the experimental C(I) dependence of a PiN structure with parameters similar to those used in the calculation. The curve was obtained by converting V values into I values using a measured I-V characteristic. There is an excellent fit with the theoretical "case (b)" curve.
Diode D.sub.1 can be a diode with an abrupt PN junction, a linearly graded PN junction, a PiN diode or a Schottky diode. The total capacitance of the two diodes in series C(V) is calculated using Equations (23), (30) and (33). For W.sub.i <x.sub.i (V) (see Equation (34)),
1/C(V)=1/C.sub.1 (V)+1/C.sub.2 (V)=1/C.sub.t1 (V)+1/�C.sub.t2 (W.sub.i)+C.sub.d2 (I)! (35)
One can discuss as an example the calculation of the capacitance of a controlled capacitor consisting of a GaAs PiN diode D.sub.2 and a reversely connected diode D.sub.1.
1) Assuming as a main condition:
C.sub.t1 (V)=mC.sub.2 (0) where m>1 (36a)
In this case in Equation (35) C.sub.2 (0)=C.sub.t2 (W.sub.i), i.e.,
C.sub.t1 (V)=mC.sub.t2 (W.sub.i) (36b)
The multiplier m can be chosen arbitrarily starting with the suggested ratio C.sub.max /C.sub.min at a given bias.
2) C(V).sub.min is obtained from the condition that at I.sub.min, C.sub.d2 <C.sub.t2, i.e.,
C.sub.d2 (I.sub.min)=.alpha..times.C.sub.t2 (W.sub.i), where 0.2.ltoreq..alpha..ltoreq.1 (37)
From Equations (35), (36b) and (37) it follows that:
C(V).sub.min =�m(1+.alpha.)/(1+.alpha.+m)!C.sub.t2 (W.sub.i) (38)
Taking m=10 and .alpha.=0.2 one obtains C(V).sub.min =1.1 C.sub.t2 (W.sub.i).
3) I.sub.min is obtained from Equation (37) by inserting the respective values of C.sub.d2 (I.sub.min) and C.sub.t2 (W.sub.i) into Equations (30a) and (32a):
q.tau.I.sub.min /kT=.alpha.(.epsilon..epsilon..sub.0 A.sub.2)/W.sub.i
or
I.sub.min =.alpha.(kT/q)(.epsilon..epsilon..sub.0 A.sub.2)/(.tau.W.sub.i) (39)
Equation (39) shows that I.sub.min decreases when .tau. and/or W.sub.i increase. For a PiN diode with parameters: W.sub.i =20 .mu.m, .tau.=150 ns, A.sub.2 =0.1 cm.sup.2, m=10 and .alpha.=0.2, I.sub.min =1.6.times.10.sup.-6 and C(V).sub.min =60 pF.
4) C(V).sub.max is determined by the condition that the total capacitance of diode D.sub.2 has to be much greater than the depletion capacitance of diode D.sub.1 at a given bias:
C.sub.d2 (I.sub.max)+C.sub.t2 (W.sub.i)>>C.sub.t1 (V), i.e., C.sub.ds (I.sub.max)+C.sub.t2 (W.sub.i)=.beta.C.sub.t1 (V), where .beta.>>1 (40)
From Equations (35), (36b) and (40) one gets:
C(V).sub.max =�m.beta./(1+.beta.)!C.sub.t2 (W.sub.i) (41)
Assuming .beta.=10 and m=10, one obtains C(V).sub.max .congruent.9 C.sub.t2 (W.sub.i), and for the above example C(V).sub.max .congruent.480 pF.
5) I.sub.max can be extracted from Equations (36b) and (40):
C.sub.d2 (.sub.max)+C.sub.t2 (W.sub.i)=.beta.mC.sub.t2 (W.sub.i)
(q.tau.I.sub.max)/kT=(.beta.m-1)C.sub.t2 (W.sub.i)
I.sub.max =(.beta.m-1)(kT/q)(.epsilon..epsilon..sub.0 A.sub.2)/.tau.W.sub.i
and since .beta.m>>1
I.sub.max .congruent..beta.m(kT/q)(.epsilon..epsilon..sub.0 A.sub.2)/.tau.W.sub.i (42)
By comparing Equations (39) and (42), it can be seen that I.sub.max and I.sub.min are related through .alpha., .beta.and m:
I.sub.max =(.beta.m/.alpha.)I.sub.min (43)
For .alpha.=0.2, .beta.=10 and m=10 and for the diode parameters chosen above, one gets I.sub.man .congruent.10.sup.-3 A, and j.sub.max =I.sub.max /A.sub.2 .congruent.10.sup.-2 A/cm.sup.2 which is below the j.sub.lim value for the diffusion capacitance.
6) V.sub.min and V.sub.max are obtained from the reverse I-V characteristic of diode D.sub.1, inserting the I.sub.min and I.sub.max values:
I.sub.min =A.sub.1 .times.j(V.sub.min) (44a)
I.sub.max =A.sub.1 .times.j(V.sub.max) (44b)
FIG. 27a shows examples of experimental I-V characteristics of different diodes D.sub.1 with different values of differential resistivity R.sub.d in the V.sub.min -V.sub.max range; FIG. 27b shows the measured C-V characteristics of the same capacitors. The V.sub.min value is dependent on the differential resistivity at V>V.sub.min , and as a first approximation can be written:
V.sub.min =V.sub.max -(I.sub.max -I.sub.min)R.sub.d (45)
From Equation (45) it follows that the smaller is R.sub.d, the closer is V.sub.min to V.sub.max. Considering that I.sub.max >>I.sub.min, one gets:
V.sub.min =V.sub.max -I.sub.max R.sub.d (46)
or:
.DELTA.V=I.sub.max R.sub.d (47)
Now
.DELTA.C/.DELTA.V=�C(V).sub.max -C(V).sub.min !/(V.sub.max -V.sub.min) (48)
and using Equation (47)
.DELTA.C/.DELTA.V=�C(V).sub.max -C(V).sub.min !/I.sub.max R.sub.d (49)
Equation (49) shows that the slope of the C(V) characteristic increases with decreasing R.sub.d. It was mentioned above that it is possible to control the size of the reverse current in diode D.sub.1 between I.sub.min and I.sub.max through the influence of radiation at V<V.sub.min. In this case the reverse current will depend on the intensity and the energy of radiation, and on the design and parameters of D.sub.1 (FIG. 28).
As the source of radiation which leads to the growth of the reverse current by the generation of electron-hole pairs one can use visible infrared or ultraviolet light, .gamma.- or X-rays, nuclear radiation, etc. Generation of electron-hole pairs, can also be induced by increasing the temperature of diode D.sub.1. Controlled capacitors can therefore be very attractive candidates for sensors of radiation or temperate. From a radiation sensitivity viewpoint, the most effective con, oiled capacitors will be composed of diodes made from semiconductors with a direct zone structure, particularly GaAs.
7) The parameters of diode D.sub.1 are obtainable from (see Equations (26),(27),(28)):
C.sub.t1 (V)=C.sub.t1 (0).times.(V.sub.max).sup.-1/k (50)
where k=2 for abrupt PN junctions, k=3 for graded ones, and k>3 for PiN structures.
Inserting the C.sub.t1 (V) value from Equations (36b) into Equation (50) one obtains the expected value of C.sub.t1 (0):
C.sub.t1 (0)=mC.sub.t2 (W.sub.i).times.(V.sub.max).sup.1/k (51)
Equation (51) shows that the expected "zero" capacitance of diode D.sub.1 increases when k decreases. If a PiN diode is used as diode D.sub.1 then:
C.sub.t1 (0).congruent.C.sub.t1 (W.sub.i,1)=(.epsilon..epsilon..sub.0 A.sub.1)/W.sub.i,1 (52)
and combining Equations (51) and (52),
(A.sub.1 /A.sub.2)(W.sub.i,2 /W.sub.i,1)=m.times.(V.sub.max).sup.1/k, where k.congruent.6-12 (53)
When a Schottky diode or a diode with an abrupt PN junction is used as diode D.sub.1,
C.sub.t1 (0).congruent.A.sub.1 �q.epsilon..epsilon..sub.o N.sub.1 /(2.psi.)!.sup.0.5 (54)
and from Equations (51) and (54),
A.sub.1 �q.epsilon..epsilon..sub.0 N.sub.1 /2.psi.!.sup.0.5 =(m.epsilon..epsilon..sub.0 A.sub.2 /W.sub.i,1).times.(V.sub.max).sup.1/k
or
(A.sub.1 W.sub.i,2 /A.sub.2).times.�qN.sub.1 /(2.epsilon..epsilon..sub.0 .psi.)!.sup.0.5 =m.times.(V.sub.max).sup.1/k (55)
The assumption is made in all the calculations that .psi.=1 V.
Equations (53) and (55) make it possible to calculate the parameters of diode D.sub.1 (A.sub.1, W.sub.i,1, N.sub.1), staring with the previously assumed or calculated parameters of diode D.sub.2 : W.sub.i,2, A.sub.2, m and V.sub.max. During calculation one need merely keep the N.sub.1 and W.sub.i,1 values in a range which guaranties that the breakdown voltage of diode D.sub.1 is higher than V.sub.max, i.e., V.sub.BR,1 .gtoreq.V.sub.max. For our example, (D.sub.1 -Schottky diode; D.sub.2 -PiN diode with m=10, W.sub.i,1 =20 .mu.m, A.sub.2 =0.1 cm.sup.2) and for V.sub.max =100 V, one obtains N.sub.1 =2.times.10.sup.15 cm.sup.-3 (V.sub.BR .congruent.140 V>V.sub.max) and an area A.sub.1 .congruent.0.4 cm.sup.2.
Table 1 gives calculated parameters of a GaAs controlled capacitor composed of a Schottky diode under reverse bias as D.sub.1, and of a PiN diode under forward bias as D.sub.2, connected in series.
TABLE 1______________________________________Schottky diode (D.sub.1) parametersA.sub.1 0.1 cm.sup.2C(0) 3900 pFN.sub.d 2 .times. 10.sup.15 cm.sup.-3I.sub.min 2 .times. 10.sup.-6 AI.sub.max 10.sup.-3 APiN diode (D.sub.2) parametersW.sub.i 2 .times. 10.sup.-3 cm(N.sub.d -N.sub.8).sub.i <2 .times. 10.sup.11 cm.sup.-3A.sub.2 0.1 cm.sup.2C.sub.t (W.sub.i) 50 pFMain parameters of the capacitorC.sub.min 60 pFC.sub.max 500 pFC.sub.max /C.sub.min 8.3V.sub.max 50 V______________________________________
Controlled capacitors according to the present invention may be fabricated in integrated form. The construction of such a controlled capacitor composed of a Schottky diode as diode D.sub.1, and of a forward biased PiN diode as a diode D.sub.2 is illustrated in FIG. 29. What follows is a brief description of the fabrication steps.
Metallic layers are deposited on an epitaxially grown P.sup.+ PiN structure having a defined i-region thickness, creating an ohmic contact with a specific contact resistivity of about 10.sup.-6 -10.sup.-7 ohm.times.cm.sup.2 on the highly-doped P.sup.+ substrate, and a Schottky barrier on the low-doped (.congruent.5.times.10.sup.15 cm.sup.-3) N-layer. The breakdown voltage of such a Schottky barrier is about 40-70 V. The Schottky barrier is reverse-biased and the PiN diode is forward-biased. The reverse current of the Schottky diode is composed of volume and surface components. The surface component can be reduced by special treatment and protection of the side surface.
The C.sub.min value is controlled by the thickness of the i-region of the PiN diode and by the cross-section area (equal in both D.sub.1 and D.sub.2, i.e., A.sub.1 =A.sub.2). FIGS. 30-31 demonstrate experimental Schottky diode I-V and C-V characteristics of such structures having different W.sub.i and A.
The light control can be provided by direct irradiation of the side surface of the Schottky diode. The current generated by light in the near-surface region is high enough for capacitance control. FIG. 32(a) shows experimental C-V characteristics of a light controlled capacitor (LCC) under various light intensities (H.sub.1 <H.sub.2 <H.sub.3). A regular microscope illumination lamp was used as a light source, and voltage changes led to different light intensities. FIG. 32(b) shows the dependence of the reverse current of the Schottky diode on light intensity. To improve the light action effectiveness, light penetration through the Schottky barrier area is provided by etching the metallization, so that the contact has the shape of a metal grid or "fingers".
Another variant of an integrated controlled capacitor design is based on the P.sup.+ PiNP.sup.+ structure shown in FIG. 33, which includes a back-to-back connection of a P.sup.+ N and a PiN diode. The P.sup.+ N junction (D.sub.1) can be made by an acceptor atom, such as Zn, diffusion into the N region of a GaAs P.sup.+ PiN structure, or by the epitaxial growth of a P.sup.+ -layer, for example by methods such as LPE, CVD, MBE or MOCVD, on N. Using diffusion, it is possible to get a more linear junction with a higher breakdown voltage of diode D.sub.1. Etching the metallization and the P-layer in D.sub.1 to open windows will improve the efficiency of light control.
Instead of a P.sup.+ -layer in D.sub.1, one can form a transparent, conductive, Schottky barrier, using oxides such as SnO.sub.x, InO.sub.x and In.sub.x Sn.sub.y O.sub.z (FIG. 34). This variant creates a Schottky diode (D.sub.1) in reverse bias connected to the forward-biased PiN (D.sub.2) diode. Another variant uses a PN heterojunction in D.sub.1 (FIG. 35). The use of a semiconductor with a wider band gap, such as GaAsP or GaAlAs, as the P-layer of diode D.sub.1, widens the range of usable wavelengths and reduces the absorption in the P region, thereby improving the light sensitivity of the capacitor.
The controlled capacitor can also be fabricated on a N.sup.+ substrate (FIG. 36). First, a PiN layered structure is grown, e.g., by LPE. Either an ohmic contact or a Schottky barrier is then deposited on the N-layer. In the first construction (FIG. 36(a)), the characteristic of the capacitor is determined by the reverse I-V characteristics of the N.sup.+ P junction. In the second (FIG. 36(b)) the N.sup.+ P(D.sub.1 ') and the Schottky (D.sub.1 ") diodes are both reverse-biased, and connected in series, and therefore the voltage held by D.sub.1 '+D.sub.1 " is larger than in the first case (FIG. 36(a)).
Controlled capacitors can also be designed in the form of a matrix arrangement, as shown in FIG. 37. The structure is separated into elementary cells, each of which includes a forward-biased PiN diode in series with a reverse-biased Schottky diode (FIG. 37(a)) or a reverse-biased PN junction.(FIG. 37(b)). For light control, windows are etched in the metallization of each cell. In general, all the previously discussed variants (FIGS. 29, 33-36) can be realized in a matrix form. The main advantage of such a form is the added possibility of controlling the capacitance of a separate cell, or of a group of cells, by appropriate irradiation.
A matrix form can also be used to obtain large values of capacitance (C.sub.min). For this purpose the cells of the matrix must be connected in parallel with the common cathode. A further increase in the total capacitance may be achieved by the parallel connection of a number of matrices to a common metallic anode (FIG. 38). In this way one can design a controlled capacitor having relatively high C.sub.min and C.sub.max.
One can also consider an inverted construction (FIG. 39), i.e., a design having a forward-biased Schottky diode as D.sub.2 and a reverse-biased PiN diode as D.sub.1. From the previous analysis it follows that a condition for C.sub.max /C.sub.min >1 is that C.sub.PiN (V)>C.sub.Sch (0). For this construction a system of equations can be written in the form
C(V)=�C.sub.PiN (W.sub.I).times.C.sub.t,Sch (V.sub.2)!/�C.sub.PiN (W.sub.i)+C.sub.t,Sch (V.sub.2)!
V.sub.2 =(kT/q)ln�I.sub.PiN /(j.sub.0,Sch A.sub.2)+1! (55)
I.sub.PiN =A.sub.1 .times.j.sub.1 (V)
This is in principle a different situation than the one encountered before where the capacitance of a forward-biased Schottky diode was controlled by the reverse current of a PiN diode. In this circuit, the diffusion capacitance is absent, and all C(V) changes are caused by the changes in the depletion capacitance of the forward-biased Schottky diode. The advantage of this circuit is high operation rates, because the relaxation time of the depletion capacitance is less than 1 ns, as shown below. In addition, V.sub.min for this construction will be higher because of the high breakdown voltage of PiN diodes, and the reverse current can be significantly lower than I.sub.min up to high biases.
One can estimate the ratio of the areas A.sub.1 /A.sub.2. When
C.sub.PiN .congruent.(.epsilon..epsilon..sub.0 A.sub.1)/W.sub.i .congruent.10.sup.-12 A.sub.1 /W.sub.i
and
C.sub.Sch (0)=A.sub.2 (q.epsilon..epsilon..sub.0 N.sub.d /2.psi.).sup.0.5 =2.7.times.10.sup.-16 A.sub.2 (N.sub.).sup.0.5 and .psi.=1
then
C.sub.PiN /C.sub.Sch (0)=4.times.10.sup.3 /�W.sub.i (N.sub.d).sup.0.5 !.times.A.sub.1 /A.sub.2 (56)
The ratio C.sub.PiN /C.sub.Sch (0) increases with decreasing W.sub.i and/or N.sub.d, and by increasing A.sub.1 /A.sub.2. Assuming C.sub.PiN /C.sub.Sch (0)=10, N.sub.d =5.times.10.sup.15 cm.sup.-3 and W.sub.i =20 .mu.m, one obtains A.sub.1 /A.sub.2 .congruent.350, i.e., the area of the Schottky barrier has to be about 350 times smaller than that of the PiN diode. This remit was obtained experimentally with a dot barrier contact to the low-doped (.congruent.5.times.10.sup.15 cm.sup.-3) N base of a PiN diode structure with an area of 3.times.3 mm.sup.2 (FIG. 40).
One of the interesting applications of such a configuration is as a high-voltage, high speed, light-controlled capacitance matrix, the design of which is shown in FIG. 41. The reverse-biased PiN structure is a common diode D.sub.1 for hundreds of forward-biased Schottky diodes. Windows (1) through the N-layer are etched down to the i-region. Some windows are then filled by an opaque dielectric compound (2) to electrically isolate the diodes, and to protect the spaces between the matrix elements from light. The light absorbed in a window (1) generates electron-hole pairs in the i-region which leads to the growth of the reverse current I.sub.rev of the PiN diode and consequently to the growth of the capacitance of the matrix cell through which the current is passed.
If the "dark" reverse current of the PiN diode in the matrix is lower than I.sub.min, then by irradiation of the same cell, it is possible to raise the capacitance of this cell up to the capacitance of the PiN structure, that is, up to the capacitance of the entire matrix. If the matrix (i.e., PiN diode) area is A.sub.i =10 cm.sup.2, the area of a single cell (that is, a Schottky diode) has to be smaller than 1000 mm.sup.2 /350.congruent.3 mm.sup.2 (see calculation above). Starting with the dimensions given in FIG. 41, one obtains A.sub.2 =0.75 mm.sup.2, C.sub.Sch (0).congruent.150 pF and C.sub.Pin .congruent.5000 pF, i.e., C.sub.PiN /C.sub.Sch (0).congruent.35.
The most difficult technological problem in the fabrication of such a matrix is to ensure the homogeneous distribution of the reverse current among all the cells, and to guarantee an I.sub.rev value below I.sub.min for each cell.
A hybrid design of a controlled capacitor (that is, separate back-to-back D.sub.1 and D.sub.2 diodes) is preferable when it is necessary to connect two diodes having different areas, or whenever it is impossible technologically to fulfill the I.sub.min and V.sub.min conditions using an integrated design. A hybrid design also enables electrical connection to the "middle point" between the diodes, which can be useful for some applications, and/or connection of sensors or other current regulation elements for capacitance control. In a hybrid construction the elements can be connected by a conductive glue or by soldering. A few illustrative examples of CCC's and LCC's in a hybrid design are shown in FIGS. 42, 43 and 44.
FIG. 45(a) shows the reverse I-V characteristics of a Schottky diode of 3.times.3 mm.sup.2 area with a comb-shaped barrier metallization of an active area A.sub.1 of 0.04 cm.sup.2. The base doping concentration is about (1-2).times.10.sup.16 cm.sup.-3 and the breakdown voltage about 30 V. Light irradiation by a microscopic light source increases the "dark" reverse current by up to four orders of magnitude. FIG. 45(b) shows the measured C-V characteristics of a hybrid LCC composed of this Schottky diode and of a PiN diode with a 0.36 cm.sup.2 area and W.sub.i =20 .mu.m. Curve 1 is the "dark" C-V of the LCC, curve 2 is the "dark" C-V of the Schottky diode, and curve 3 shows how the LCC capacitance switches between these two when the light is switched on and off.
FIGS. 46(a) and 46(b) show I-V and C-V characteristics of a similar LCC, but having an active area of the Schottky diode of about 0.07 cm.sup.2, and therefore C.sub.max values also higher than in FIG. 45.
The hybrid construction is the only one possible for application in high power converters, where large capacitances have to be controlled at high voltages. In this case a number of capacitors are connected in parallel, as shown in FIG. 47.
The dynamic characteristics of a controlled capacitor are determined mainly by the time constants of the loading and unloading of the various capacitances in the device. One can estimate the operation rate of a controlled capacitor composed of two "back to back" diodes connected in series. The time constant of such a capacitor is determined to a first approximation by two components: 1) .tau..sub..alpha.,R .congruent.RC.sub.t - the loading (unloading) constant of the depletion region capacitance, where R is the series resistance of the contacts and of ohmic resistances of various regions of the structure; and 2) the loading (unloading) constant of the diffusion capacitance .tau..sub.d.
R can be written as
R.congruent..SIGMA..sub.k (.rho..sub.k l.sub.k /A.sub.k)+.SIGMA..sub.x (.rho..sub.s /A.sub.s) (57)
where .rho..sub.k represents the ohmic resistivities of the layers of the semiconductor structure, l.sub.k represents their thicknesses, .rho..sub.s is the specific contact resistivity �ohm.times.cm.sup.2 !, A.sub.k are the areas of the layers and A.sub.s are the areas of the contacts.
The .tau..sub.Ct.R value for a GaAs PiN diode connected in series with a reverse-biased diode can be estimated from the following arguments. Assuming that: (1) diodes D.sub.1 and D.sub.2 have equal areas; and (2) contact resistivities can be neglected, one obtains:
.tau..sub.Ct.R =R(C.sub.max -C.sub.min).congruent.mC(W.sub.i).SIGMA..sub.k (.rho..sub.k l.sub.k /A)
or
.tau..sub.Ct,R .congruent.(m.epsilon..epsilon..sub.0 /W.sub.i).SIGMA..sub.k .rho..sub.k l.sub.k (58)
The time constant for a Schottky diode connected to a PiN diode in a integrated construction (FIG. 29) is:
.tau..sub.Ct.R =m.epsilon..epsilon..sub.0 /(W.sub.i q)�l.sub.N /(.mu..sub.N n.sub.N)+1.sub.p /(.mu..sub.p p.sub.p)! (59)
Assuming that l.sub.N =l.sub.p =100 .mu.m, n.sub.N .congruent.p.sub.p =10.sup.15 cm.sup.-3, .mu..sub.n =8000 V/cm.sup.2 s, .mu..sub.p =400 V/cm.sup.2 s, m(V).congruent.10 and W.sub.i =20 .mu.m one obtains .tau..sub.Ct,R .congruent.10.sup.-9 s=1 ns. If diodes D.sub.1 and D.sub.2 have equal areas, from Equations (58) and (59) it follows that .tau..sub.Ct.R is independent of the diodes area.
.tau..sub.d can be obtained to a first approximation from:
W.sub.i.sup.2 /(2D).vertline..sub.Wi/L<1 .ltoreq..tau..sub.d <.tau..sub.i .vertline..sub.Wi/L>1 (60)
where .tau..sub.i is the carrier lifetime in the i-region of the PiN diode. Assuming that .tau..sub.i .congruent.150 ns and W.sub.i is in a range between 5 and 100 .mu., one obtains a .tau..sub.d value between 10 and 150 ns. Comparing the two relaxation times (time constants) one sees that the relaxation of the diffusion capacitance is the slower process. The relaxation time depends also on the frequency of the controlling light source. This is shown qualitatively in FIG. 48. The faster is the current reaction of diode D.sub.i to the irradiation change, the closer will be the relaxation time to the value determined by the time constant of the diffusion capacitance .tau..sub.d. From a maximum operation rate viewpoint, the requirement for the frequency of the light source, such as light diodes, lasers, and the like, can be formulated from the condition that the time constant of the light intensity rise .tau..sub.H (.about.t.sub.H) be much smaller than .tau..sub.d (.congruent.t.sub.d). If, for example, .tau..sub.H .congruent.0.1 .rho..sub.d, then 1 ns.ltoreq..tau..sub.H .ltoreq.15 ns.
The energy accumulated in a capacitor by the charging is
.DELTA.C.times.V.sup.2 /2�J!
where .DELTA.C=C.sub.max -C.sub.min. The power returned to an external load R during unloading is:
P.congruent..DELTA.C.times.V.sup.2 /(4t.sub.RC)
where t.sub.RC is the unloading time of the capacitor to an R, (t.sub.RC .congruent.R.DELTA.C+.tau..sub.d). If R.DELTA.C<<.tau..sub.d, then the unloading time is determined mainly by .tau..sub.d (FIG. 49). The limit power of the capacitor unloading is:
P.sub.lim =.DELTA.C.times.V.sup.2 /4t.sub.c (61)
The power averaged over a period (see FIG. 49 ) is:
P.sub.av =.DELTA.C.times.V.sup.2 /4T.congruent..DELTA.C.times.(V.sup.2 /4)f
where f is the frequency and T is the period of the signal. In the limit case T.sub.min .congruent.2 t.sub.d, and
P.sub.av,lim =.DELTA.C.times.V.sup.2 /8t.sub.d =.DELTA.C.times.(V.sup.2 /4)f.sub.max (62)
where f.sub.max .congruent.1/(2t.sub.d). For t.sub.d .congruent.100 ns, f.sub.max =5 MHz.
Devices according to the present invention may find application in a wide variety of applications, all of which are intended to fall within the scope of the present invention. Three possible areas of controlled capacitor applications are: (1) LCR contours and amplifiers; (2) sensors and detectors; and (3) power converters. FIG. 50 demonstrates an idea for converting an alternating voltage into an alternating capacitance. Because
.DELTA.C.congruent.dC/dV.times..DELTA.V,
the higher the slope of the C-V characteristic dC/dV, the smaller has to be the .DELTA.V value to obtain the expected .DELTA.C.
.DELTA.C.sub.max =(C.sub.max -C.sub.min).congruent.dC/dV.times..DELTA.V.sub.max
.DELTA.C.sub.max and dC/dV are the parameters of a controlled capacitor.
FIG. 51 shows two different circuits using an LCC. The grog of the capacitance as a result of irradiation takes place practically under a constant bias on the controlled capacitor, because .DELTA.V.congruent.0.2-0.4 V. .DELTA.C=C-C.sub.min is proportional to H-H.sub.min =.DELTA.H, where H is the intensity of radiation. .DELTA.C.sub.max .congruent.C.sub.max -C.sub.min .about..DELTA.H.sub.max. The slope of a characteristic is
dC/dV.congruent..DELTA.c/.DELTA.V.about..DELTA.H
(dC/dV).sub.max .congruent.C.sub.max /.DELTA.V.about..DELTA.H.sub.max
In an experimental GaAs LCC the .DELTA.C/.DELTA.D, V value reaches 2000 pF/V (FIG. 28c). In the construction demonstrated in FIG. 51b, a photodiode, photoresistor, and the like, can be used as the receiver of radiation. The criterion for diode D.sub.2 to be used as a receiver is that the current through the diode without irradiation has to be below I.sub.min, while under irradiation it must reach I.sub.max at some defined intensity H.sub.max. It is also possible to control the capacitance by controlling the charge in diode D.sub.2 using a separate current source V', as shown in FIG. 52. .DELTA.C.about.V'; .DELTA.C.sub.max =(C.sub.max -C.sub.min).congruent..DELTA.V'.sub.max. The maximum frequency will be determined by the relaxation time of the diffusion capacitance (.tau..sub.d) of diode D.sub.2, and is in the range of 5-20 MHz.
For power electronics applications the preferred embodiments of controlled capacitors appear to be the light controlled capacitors. The main factors determining the usefulness of these capacitors in power electronics are power and voltage. The maximum of average power is given by Equations (62).
For GaAs PiN diodes, f.sub.max =5-20 MHz, and for f.sub.max =5 MHz one obtains:
P.sub.av,max .congruent.10.sup.6 .DELTA.C.times.V.sup.2 (63)
One can use converters as an example of a power system and separate all converters into three groups, first by operation voltage, and then by converted power.
In the case of low-voltage (up to 50 V) and low-power (up to 5 W) applications, the .DELTA.C value obtained from Equation (63) for 5 W and 50 V is .DELTA.C=2000 pF. For this voltage/power range the recommended design is the integrated one (FIG. 29). The area of such a structure will be about 0.3-0.5 cm.sup.2. The hybrid construction of a GaAs Schottky diode with a reverse voltage above 50 V in series with a PiN diode (FIG. 43) is also a candidate.
For intermediate power (10-100 W), the area of controlled capacitors in this power range has to be between 1-10 cm.sup.2. Intermediate power converters can be fabricated using a parallel connection of structures with areas of 0.3-0.5 cm.sup.2 in an integrated or in a hybrid design (FIGS. 38, 47).
For high power (above 100 W) applications the application of low-voltage capacitors is not advantageous from an economic point of view.
In the case of intermediate-voltage (50-200 V) and low-power (up to 10 W) applications, a hybrid construction, composed of a high-voltage (up to 200 V) Schottky diode and a PiN diode, or of two PiN diodes with different areas and different thicknesses of i-region is the most advantageous. For an applied voltage of 200 V and 10 W, Equation (63) gives .DELTA.C=250 pF. For a "two PiN diode" design one can calculate the parameters of diode D.sub.1 and see that to obtain the reverse voltage of 200 V, an i-region of about 5 .mu.m is needed. Assuming the "zero" capacitance of such a diode is about 500 pF, one obtains for a bias of 200 V .DELTA.C.congruent.250 pF and an area of about 0.25 cm.sup.2, i.e., the capacitor needed for 10 W power conversion will have an area of about 5.times.5 mm.
For intermediate power (10-200 W) capacitors can be made by parallel connection of an appropriate number of low-power capacitors. For example, for 200 W conversion a parallel connection of about 20 10 W capacitors is required.
For conversion of power above 200 W the application of capacitors of this voltage range is not advantageous at this time.
In the case of high-voltage (200-1000 V) and intermediate-power (about 200 W) applications, for example 1000 V, 200 W, the .DELTA.C.congruent.200 pF. Such a controlled capacitor can be realized through the connection of two PiN diodes, with diode D.sub.1 parameters of W.sub.i .congruent.20 .mu.m (required for reverse bias of 1000 V) and A.sub.1 .congruent.0.5 cm.sup.2.
For high power (1 kW and above) applications converters can be made by parallel connection of hybrid capacitors designed for 200 W. For example, for conversion of 10 KW, a about 50 elements have to be connected, each with an area of 0.5 cm.sup.2. The total area of such a capacitor will be about 25 cm.sup.2, rather small for this power conversion.
From a "specific power" point of view, that is, for the maximum power converted by one cm.sup.2 of area, the most advantageous controlled capacitors are high voltage capacitors, because the increase of applied voltage increases the converted power significantly but does not require a significant increase in the area. For example, a capacitor designed for 2KV has about the same dimensions as a 1KV controlled capacitor, but the converted power can reach about 40KW as compared to 10 kW.
While the invention has been described with respect to a limited number of embodiments, it will be appreciated that many variations, modifications and other applications of the invention may be made.

Claims

1. A current-controlled capacitor system, comprising:
(a) a capacitor element; and
(b) a diode element in series with said capacitor element, said diode element being a forward-biased GaAs PiN diode having a carrier concentration in the i-region of less than about 10.sup.12 cm.sup.-3, the system being further characterized in that:
(o) said forward-biased diode element conducts a forward current which acts to control the forward-bias diffusion capacitance of said diode element;
(i) said diode element has a capacitance which is less than the capacitance of said capacitor element when said diode element is under zero bias;
(ii) said diffusion capacitance of said diode element is controlled by varying said forward current through said diode element;
(iii) said forward current acting to control said diffusion capacitance of said diode element is selected such that the total capacitance, Cmin, of the current-controlled capacitor system is 1.1 times the zero-bias depletion capacitance, C.sub.t (0), of said diode element at some minimum value of forward current, I.sub.min ; and,
(iv) the total capacitance, Cmax, of the current-controlled capacitor system is 0.9 times the capacitance, C.sub.1, of said capacitor element at some greater value of forward current, I.sub.max ;
wherein said capacitor element is a reverse-biased diode, having reverse-bias-voltage-dependent junction depletion capacitance, said reverse-biased diode thus serving the function of said capacitor element;
wherein said reverse-biased diode is a GaAs Schottky diode with contact to the N-layer which includes windows in said Schottky contact and said diode element is a GaAs P.sup.+ PiN diode, said reverse-biased diode and said diode element being integrally formed in a single crystal.
2. A current-controlled capacitor system, comprising:
(a) a capacitor element; and
(b) a diode element in series with said capacitor element, said diode element being a forward-biased GaAs PiN diode having a carrier concentration in the i-region of less than about 10.sup.12 cm.sup.-3, the system being further characterized in that:
(o) said forward-biased diode element conducts a forward current which acts to control the forward-bias diffusion capacitance of said diode element;
(i) said diode element has a capacitance which is less than the capacitance of said capacitor element when said diode element is under zero bias;
(ii) said diffusion capacitance of said diode element is controlled by varying said forward current through said diode element;
(iii) said forward current acting to control said diffusion capacitance of said diode element is selected such that the total capacitance, Cmin, of the current-controlled capacitor system is 1.1 times the zero-bias depletion capacitance, C.sub.t (0), of said diode element at some minimum value of forward current, I.sub.min ; and,
(iv) the total capacitance, Cmax, of the current-controlled capacitor system is 0.9 times the capacitance, C.sub.1, of said capacitor element at some greater value of forward current, I.sub.max ;
wherein said capacitor element is a reverse-biased diode, having reverse-bias-voltage-dependent junction depletion capacitance, said reverse-biased diode thus serving the function of said capacitor element;
wherein said reverse-biased diode is a PN diode with contact to the P-layer which includes windows into said contact and into said P-layer down to said adjoining N-layer, and said diode element is a GaAs P.sup.+ PiN diode, said reverse-biased diode and said diode element being integrally formed in a single crystal.
3. A current-controlled capacitor system, comprising:
(a) a capacitor element; and
(b) a diode element in series with said capacitor element, said diode element being a forward-biased GaAs PiN diode having a carrier concentration in the i-region of less than about 10.sup.12 cm.sup.-3, the system being further characterized in that:
(o) said forward-biased diode element conducts a forward current which acts to control the forward-bias diffusion capacitance of said diode element;
(i) said diode element has a capacitance which is less than the capacitance of said capacitor element when said diode element is under zero bias;
(ii) said diffusion capacitance of said diode element is controlled by varying said forward current through said diode element;
(iii) said forward current acting to control said diffusion capacitance of said diode element is selected such that the total capacitance, Cmin, of the current-controlled capacitor system is 1.1 times the zero-bias depletion capacitance, C.sub.t (0), of said diode element at some minimum value of forward current, I.sub.min ; and,
(iv) the total capacitance, Cmax, of the current-controlled capacitor system is 0.9 times the capacitance, C.sub.1, of said capacitor element at some greater value of forward current, I.sub.max ;
wherein said capacitor element is a reverse-biased diode, having reverse-bias-voltage-dependent junction depletion capacitance, said reverse-biased diode thus serving the function of said capacitor element;
wherein said diode element is a GaAs PiN structure grown on a N.sup.+ substrate and having an ohmic contact to the N-layer, said reverse-biased diode being the N.sup.+ P junction, where said N.sup.+ portion of said N.sup.+ P junction is said N.sup.+ substrate, with said reverse-biased diode and said diode element being integrally formed in a single crystal.
4. A current-controlled capacitor system, comprising:
(a) a capacitor element; and
(b) a diode element in series with said capacitor element, said diode element being a forward-biased GaAs PiN diode having a carrier concentration in the i-region of less than about 10.sup.12 cm.sup.-3, the system being further characterized in that:
(o) said forward-biased diode element conducts a forward current which acts to control the forward-bias diffusion capacitance of said diode element;
(i) said diode element has a capacitance which is less than the capacitance of said capacitor element when said diode element is under zero bias;
(ii) said diffusion capacitance of said diode element is controlled by varying said forward current through said diode element;
(iii) said forward current acting to control said diffusion capacitance of said diode element is selected such that the total capacitance, Cmin, of the current-controlled capacitor system is 1.1 times the zero-bias depletion capacitance, C.sub.t (0), of said diode element at some minimum value of forward current, I.sub.min ; and,
(iv) the total capacitance, Cmax, of the current-controlled capacitor system is 0.9 times the capacitance, C.sub.1, of said capacitor element at some greater value of forward current, I.sub.max ;
wherein said capacitor element is a reverse-biased diode, having reverse-bias-voltage-dependent junction depletion capacitance, said reverse-biased diode thus serving the function of said capacitor element;
wherein said diode element is a GaAs PiN structure grown on an N.sup.+ substrate and having a Schottky barrier with the N-layer, said reverse-biased diode being the N.sup.+ P junction and Schottky barrier, with said reverse-biased diode and said diode element being integrally formed in a single crystal.
5. A current-controlled capacitor system, comprising:
(a) a capacitor element; and
(b) a diode element in series with said capacitor element, said diode element being a forward-biased GaAs PiN diode having a carrier concentration in the i-region of less than about 10.sup.12 cm.sup.-3, the system being further characterized in that:
(o) said forward-biased diode element conducts a forward current which acts to control the forward-bias diffusion capacitance of said diode element;
(i) said diode element has a capacitance which is less than the capacitance of said capacitor element when said diode element is under zero bias;
(ii) said diffusion capacitance of said diode element is controlled by varying said forward current through said diode element;
(iii) said forward current acting to control said diffusion capacitance of said diode element is selected such that the total capacitance, Cmin, of the current-controlled capacitor system is 1.1 times the zero-bias depletion capacitance, C.sub.t (0), of said diode element at some minimum value of forward current, I.sub.min ; and,
(iv) the total capacitance, Cmax, of the current-controlled capacitor system is 0.9 times the capacitance, C.sub.1, of said capacitor element at some greater value of forward current, I.sub.max ;
wherein said capacitor element is a reverse-biased diode, having reverse-bias-voltage-dependent junction depletion capacitance, said reverse-biased diode thus serving the function of the capacitor element;
wherein a plurality of systems
wherein said reverse-biased diode is a GaAs Schottky diode with contact to the N-layer which includes windows in said Schottky contact and said diode element is a GaAs P.sup.+ PiN diode, said reverse-biased diode and said diode element being integrally formed in a single crystal
are grown on a single P.sup.+ substrate so as to be separated from each other by etching down to the P-layer, so as to form an integrated matrix of controlled capacitors.
6. A current-controlled capacitor system, comprising:
(a) a capacitor element; and
(b) a diode element in series with said capacitor element, said diode element being a forward-biased GaAs PiN diode having a carrier concentration in the i-region of less than about 10.sup.12 cm.sup.-3, the system being further characterized in that:
(o) said forward-biased diode element conducts a forward current which acts to control the forward-bias diffusion capacitance of said diode element;
(i) said diode element has a capacitance which is less than the capacitance of said capacitor element when said diode element is under zero bias;
(ii) said diffusion capacitance of said diode element is controlled by varying said forward current through said diode element;
(iii) said forward current acting to control said diffusion capacitance of said diode element is selected such that the total capacitance, Cmin, of the current-controlled capacitor system is 1.1 times the zero-bias depletion capacitance, C.sub.t (0), of said diode element at some minimum value of forward current, I.sub.min ; and,
(iv) the total capacitance, Cmax, of the current-controlled capacitor system is 0.9 times the capacitance, C.sub.1, of said capacitor element at some greater value of forward current, I.sub.max ;
wherein said capacitor element is a reverse-biased diode, having reverse-bias-voltage-dependent junction depletion capacitance, said reverse-biased diode thus serving the function of said capacitor element;
wherein said reverse-biased diode is a PN diode with contact to the P-layer which includes windows into said contact and into said P-layer down to said adjoining N-layer, and said diode element is a GaAs P.sup.+ PiN diode, said reverse-biased diode and said diode element being integrally formed in a single crystal
are grown on a single P.sup.+ substrate so as to be separated from each other by etching down to the P-layer of said P.sup.+ PiN diode, so as to form an integrated matrix of controlled capacitors.
7. A current-controlled capacitor system, comprising:
a capacitor element; and
(b) a diode element in series with said capacitor element, said diode element being a forward-biased GaAs Schottky diode, the system being further characterized in that:
(o) said forward-biased diode element conducts a forward current which acts to control the forward-bias diffusion capacitance of said diode element;
(i) said diode element has a capacitance which is less than the capacitance of said capacitor element when said diode element is under zero bias;
(ii) said diffusion capacitance of said diode element is controlled by varying said forward current through said diode element;
(iii) said forward current acting to control said diffusion capacitance of said diode element is selected such that the total capacitance, Cmin, of the current-controlled capacitor system is 1.1 times the zero-bias depletion capacitance, C.sub.t (0), of said diode element at some minimum value of forward current, I.sub.min ; and,
(iv) the total capacitance, Cmax, of the current-controlled capacitor system is 0.9 times the capacitance, C.sub.1, of said capacitor element at some greater value of forward current, I.sub.max ;
wherein said capacitor element is a reverse-biased diode, having reverse-bias-voltage-dependent junction depletion capacitance, said reverse-biased diode thus serving the function of said capacitor element;
wherein said reverse-biased diode is a GaAs P.sup.+ PiN diode, said reverse-biased diode being fabricated by growing a GaAs PiN structure on a P.sup.+ substrate, and wherein said diode element is a Schottky barrier to the N-layer, the cross sectional area of said Schottky barrier being smaller than that of the P.sup.+ PiN diode GaAs.
8. A system as in claim 7 wherein said reverse-biased diode is a GaAs P.sup.+ PiN diode with an ohmic contact to the N-layer which includes windows in said ohmic contact and in said N-layer down to the i-layer.
9. A current-controlled capacitor system, comprising:
(a) a capacitor element; and
(b) a diode element in series with said capacitor element, said diode element being a forward-biased GaAs Schottky diode, the system being further characterized in that:
(o) said forward-biased diode element conducts a forward current which acts to control the forward-bias diffusion capacitance of said diode element;
(i) said diode element has a capacitance which is less than the capacitance of said capacitor element when said diode element is under zero bias;
(ii) said diffusion capacitance of said diode element is controlled by varying said forward current through said diode element;
(iii) said forward current acting to control said diffusion capacitance of said diode element is selected such that the total capacitance, Cmin, of the current-controlled capacitor system is 1.1 times the zero-bias depletion capacitance, C.sub.t (0), of said diode element at some minimum value of forward current, I.sub.min ; and,
(iv) the total capacitance, Cmax, of the current-controlled capacitor system is 0.9 times the capacitance, C.sub.1, of said capacitor element at some greater value of forward current, I.sub.max ;
wherein said capacitor element is a reverse-biased diode, having reverse-bias-voltage-dependent junction depletion capacitance, said reverse-biased diode thus serving the function of said capacitor element;
wherein said reverse-biased diode is a GaAs P.sup.+ PiN diode, said reverse-biased diode being fabricated by growing a GaAs PiN structure on a P.sup.+ substrate, and wherein said diode element is a Schottky barrier to the N-layer, the cross sectional area of said Schottky barrier being smaller than that of the P.sup.+ PiN diode, wherein a plurality of structures
are grown on a single P.sup.+ substrate and are separated from each other by etching down to the i-layer of the P.sup.+ PiN structure.
10. A system as in claim 9 wherein said reverse-biased diode GaAs P.sup.+ PiN diode has an ohmic contact to the N-layer which includes windows in said ohmic contact and in said N-layer down to the i-layer.
11. A current-controlled capacitor system, comprising:
(a) a capacitor element; and
(b) a diode element in series with said capacitor element, said diode element being a forward-biased GaAs PiN diode having a carrier concentration in the i-region of less than about 10.sup.12 cm.sup.-3, the system being further characterized in that:
(o) said forward-biased diode element conducts a forward current which acts to control the forward-bias diffusion capacitance of said diode element;
(i) said diode element has a capacitance which is less than the capacitance of said capacitor element when said diode element is under zero bias;
(ii) said diffusion capacitance of said diode element is controlled by varying said forward current through said diode element;
(iii) said forward current acting to control said diffusion capacitance of said diode element is selected such that the total capacitance, Cmin, of the current-controlled capacitor system is 1.1 times the zero-bias depletion capacitance, C.sub.t (0), of said diode element at some minimum value of forward current, I.sub.min ; and,
(iv) the total capacitance, Cmax, of the current-controlled capacitor system is 0.9 times the capacitance, C.sub.1, of said capacitor element at some greater value of forward current, I.sub.max ;
wherein said GaAs PiN diode element structure grown on a first surface of a GaAs substrate having first and second surfaces, and said capacitor element is a reverse-biased PiN diode, said reverse-biased PiN diode being formed on said second surface of said GaAs substrate, with said reverse-biased PiN diode and said diode element thereby being integrally formed in a single said GaAs substrate, on opposite surfaces of said single GaAs substrate.
12. A system as in claim 11 wherein said reverse-biased diode is a GaAs P.sup.+ PiN diode with an ohmic contact to the N-layer which includes windows in said ohmic contact and in said N-layer down to the i-layer.
13. A system as in claim 4 wherein said Schottky barrier of said reverse-biased diode is transparent.

Priority Claims (1)

Number	Date	Country	Kind
105952	Jun 1993	ILX

PCT Information

Filing Document	Filing Date	Country	Kind	102e Date	371c Date
PCT/US94/06144	5/31/1994			2/6/1995	2/6/1995

Publishing Document	Publishing Date	Country	Kind
WO94/29960	12/22/1994

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Controlled semiconductor capacitors

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