Switching power converters are widely used in electronic devices, such as to provide a regulated electric power source. A switching power converter is configured such that its solid-state power switching devices do not continuously operate in their linear states; instead, the switching devices repeatedly switch between their on-states and off-states. One type of a switching power converter is a direct-current-to-direct-current (DC-to-DC) converter which converts one direct-current (DC) voltage to another DC voltage, or converts one DC current to another DC current.
One direct-current-to-direct-current (DC-to-DC) converter parameter is duty cycle (D), which refers to a portion of a switching cycle that a control switching device, sometimes referred to as an active switching device, is in its on-state (conductive state). A control switching device of a DC-to-DC converter is a switching device of the DC-to-DC converter where duty cycle of the switching device may be modulated to regulate one or more parameters of the DC-to-DC converter, such as input voltage magnitude, input current magnitude, output voltage magnitude, and/or output current magnitude. As one example of duty cycle of a DC-to-DC converter, consider
A constant frequency operating mode of a DC-to-DC converter is an operating mode where a switching frequency of the DC-to-DC converter is fixed. A period of each switching cycle of the DC-to-DC converter is also necessarily fixed in the constant frequency operating mode because switching period is the inverse of switching frequency, as mentioned above. Duty cycle may be modulated in the constant frequency operating mode by modulating control switch on-time within each switching cycle, to regulate one or more parameters of the DC-to-DC converter. Consequently, control switching device on-time and control switching device off-time may vary among switching cycles, in the constant frequency operating mode.
For example, in each of switching cycles 202(1) and 202(2), the control switching device is in its on-state for a duration of w2a, and the control switching device is in its off-state for a duration of o2a. The duty cycle of the control switching device is therefore w2a/T2a in each of switching cycles 202(1) and 202(2). In each of switching cycles 202(3) and 202(4), though, the control switching device is in its on-state for a duration of w2b, the control switching device is in its off-state for a duration of o2b, and the control switching device therefore has a duty cycle of w2b/T2a. Duration w2b is greater than duration w2a, and the duty cycle of the control switching device in switching cycles 202(3) and 202(4) is therefore greater than the duty cycle of the control switching device in switching cycles 202(1) and 202(2). In switching cycle 202(5), the control switching device is in its on-state for a duration of w2c, the control switching device is in its off-state for a duration of o2c, and the duty cycle of the control switching device is w2c/T2a. Duration w2e is greater than either of durations w2a and w2b, and the duty cycle of the control switching device in switching cycle 202(5) is therefore greater than the duty cycle of the control switching device in any of switching cycles 202(1)-202(4). Duty cycle of the control switching device in switching cycle 202(6), in contrast, in smaller than the duty cycle of the control switching device in any of switching cycles 202(1)-202(5). Specifically, in switching cycle 202(6), the control switching device is in its on-state for a relatively small duration of w2d, the control switching device is in its off-state for a relatively long duration of o2d, and the duty cycle of the control switching device is w2d/T2a.
A constant off-time operating mode of a DC-to-DC converter is an operating mode where an off-time of a control switching device of the DC-to-DC converter is fixed, where off-time refers to the duration of each switching cycle where the control switching device is in its off-state. Duty cycle may be modulated in the constant off-time operating mode by modulating control switching device on-time in each switching cycle, to regulate one or more parameters of the DC-to-DC converter. Consequently, DC-to-DC converter switching frequency may vary among switching cycles, in the constant off-time operating mode.
For example, in each of switching cycles 302(1), 302(2), 302(5), and 302(6), the control switching device is in its on-state for a duration of w3a, the period is T3a, and the switching power converter has a switching frequency of F3a, where switching frequency of F3a is the inverse of period T3a. The duty cycle of the control switching device is therefore w3a/T3a in each of switching cycles 302(1), 302(2), 302(5), and 302(6). In switching cycle 302(3), though, the control switching device is in its on-state for a relatively long duration of w3b to achieve a larger duty cycle of w3b/T3b, such as in response to a change in operating conditions of the DC-to-DC converter. Consequently, switching cycle 302(3) has a relatively large period T3b and a relatively small switching frequency F3b. In switching cycle 302(4), in contrast, the control switching device is in its on-state for a relatively short duration of w3c to achieve a smaller duty cycle of w3c/T3e, such as in response to another change in operating conditions of the DC-to-DC converter. Consequently, switching cycle 302(4) has a relatively small period T3c and a relatively large switching frequency F3c.
A ratio of output voltage Vout to input voltage Vin, of a DC-to-DC converter is typically a function of duty cycle D. For example, EQNS. 2, 3, and 4 specify a ratio of output voltage Vout to input voltage Vin as a function of duty cycle for a boost DC-to-DC converter, a buck-boost DC-to-DC converter, and a buck DC-to-DC converter, respectively, assuming continuous conduction operation.
As evident from EQNS. 2-4, duty cycle D must be large to obtain a large ratio of output voltage Vout to input voltage Vin. However, a maximum value of duty cycle D is limited in a DC-to-DC converter operating in a constant frequency operating mode to allow time for switching devices to change states as well as time for a controller of the DC-to-DC converter to obtain and process data. Therefore, a ratio of output voltage Vout to input voltage Vin of a DC-to-DC converter operating in a constant frequency operating mode is limited by a maximum permissible value of duty cycle D. Such limitation may be problematic in applications where a large ratio of Vout/Vin, is required, such as in applications where Vin is abnormally low due to a large load placed on a power supply providing input voltage Vin, low temperature of a battery providing input voltage Vin, etc.
In contrast, duty cycle may be essentially unlimited in a DC-to-DC converter operating in a constant off-time operating mode, which enables the DC-to-DC converter to achieve a large ratio of Vout/Vin. However, switching frequency may significantly vary in the constant off-time operating mode, such as discussed above with respect to
Disclosed herein are new controllers for DC-to-DC converters and associated systems and methods which at least partially mitigate the problems discussed above. Certain embodiments of the new controllers, systems, and methods automatically switch an operating mode of a DC-to-DC converter between a constant frequency operating mode and a constant off-time operating mode at least partially based on duty cycle of a control switching device of the DC-to-DC converter, such as in response to duty cycle of the control switching device crossing a threshold value. For example, certain embodiments are configured to (a) cause a DC-to-DC converter to operate in a fixed frequency operating mode when a duty cycle of a control switching device of the DC-to-DC converter does not exceed a maximum permissible duty cycle in the constant frequency operating mode and (b) cause the DC-to-DC converter to operate in a constant off-time operating mode when a duty cycle of the control switching device exceeds the maximum permissible constant duty cycle in the constant frequency operating mode. Accordingly, certain embodiments cause a DC-to-DC converter to operate in a constant frequency operating mode except when operation in a constant off-time operating mode is required to achieve regulation of one or more DC-to-DC converter parameters, thereby promoting stability associated with constant frequency operation while enabling a large ratio of output voltage to input voltage to be realized when required.
Furthermore, some embodiments of the new controller, systems, and methods support current mode control, such as peak current mode control, to promote high performance line and load regulation. In these embodiments, a slope compensation signal is optionally provided in a constant frequency operating mode to enable stable operation, e.g., operation without subharmonic oscillation, with duty cycle greater than fifty percent. Additionally, some embodiments change generation of a slope compensation signal, such as by maintaining the slope compensation signal at a constant value, in response to duty cycle of the control switching device crossing a threshold value, such that the slope compensation signal does not affect DC-to-DC converter operation when the DC-to-DC converter is operating in a fixed off-time operating mode.
Electric power source 402 is electrically coupled between first input port 414 and second input port 416, and electric load 406 is electrically coupled between first output port 418 and second output port 420. Power stage 408 is configured to convert an input voltage Vin, between first input port 414 and second input port 416 to an output voltage Vout between first output port 418 and second output port 420 (or vice versa), in response to control signals (not shown) from controller 410. Additionally, power stage 408 is configured to convert an input current Iin flowing between first input port 414 and second input port 416 to an output current Iout flowing between first output port 418 and second output port 420 (or vice versa), in response to control signals (not shown) from controller 410.
Power stage 408 may have either a non-isolated topology or an isolated topology. In some embodiments where power stage 408 has a non-isolated topology, first input port 414 and first output port 418 are part of a common electric node. In some other embodiments where power stage 408 has a non-isolated topology, second input port 416 and second output port 420 are part of a common electric node. In particular embodiments, power stage 408 has one of a boost topology, a buck-boost topology, or a buck topology, such as discussed below with respect to
Controller 410 is formed, for example, of analog electronic circuitry and/or digital electronic circuitry. Although controller 410 is depicted as being a single element, controller 410 may be formed of multiple sub-elements that need not be co-packaged. Additionally, controller 410 could partially or fully integrated with one or more other elements, such as with power stage 408. Furthermore, in some alternate embodiments, controller 410 is at least partially located external to DC-to-DC converter 404. For example, in particular alternate embodiments, controller 410 is split into a local portion and a remote portion, where the local portion is within DC-to-DC converter 404 and the remote portion is external to DC-to-DC converter 404.
Certain embodiments of controller 410 are configured to generate one or more control signals (not shown) to control duty cycle of control switching device 422 of power stage 408 to regulate one or more parameters of DC-to-DC converter 404. Examples of such parameters that may be regulated include, but are not limited to, one or more of magnitude of input voltage Vin, magnitude of output voltage Vout, magnitude of input current Iin and magnitude of output current Iout. Importantly, controller 410 is further configured to automatically switch an operating mode of DC-to-DC converter 404 between a constant frequency operating mode and a constant off-time operating mode at least partially based on duty cycle of control switching device 422, such as in response to duty cycle of control switching device 422 crossing a threshold value. In certain embodiments, controller 410 is configured to switch the operating mode of DC-to-DC converter 404 between the constant frequency operating mode and the constant off-time operating mode at least partially by extending a period of an oscillator (not shown in
For example,
Controller 410 is embodied by a controller 710 in DC-to-DC converter 704, and controller 710 is configured to generate control signals ϕ1 and ϕ2. Controller 710 is configured to generate control signal ϕ1 to control switching of control switching device 722 to regulate one or more parameters of DC-to-DC converter 704. In certain embodiments, such as illustrated in
Controller 710 generates control signal ϕ1 such that DC-to-DC converter 704 operates in a constant off-time operating mode in switching cycles 806(3) and 806(4), such as in response to duty cycle of control switching device 722 increasing beyond a maximum permissible duty value in the constant frequency operating mode. Control switching device 722 accordingly has a constant off-time of o8a in switching cycles 806(3) and 806(4). However, respective on-times w8e and w8d of control switching device 722 in switching cycles 806(3) and 806(4) differ, such as in response to operating conditions of DC-to-DC converter 704 varying among switching cycles 806(3) and 806(4). Consequently, switching cycles 806(3) and 806(4) have different respective switching frequencies of F8b and F8e, which are the inverse of periods T8b and T8c, respectively. As evident when comparing switching cycles 806(3) and 806(4) to switching cycles 806(1) and 806(2), switching frequency in the constant off-time operating mode is less than switching frequency in the constant frequency operating mode.
Controller 410 is embodied by a controller 910 in DC-to-DC converter 904, and controller 910 is configured to generate control signals ϕ1 and ϕ2. Controller 910 is configured to generate control signal ϕ1 to control switching of control switching device 922 to regulate one or more parameters of DC-to-DC converter 904. In certain embodiments, such as illustrated in
Controller 910 generates control signal ϕ1 such that DC-to-DC converter 904 operates in a constant-off time operating mode in switching cycles 1006(3) and 1006(4), such as in response to duty cycle of control switching device 922 increasing beyond a maximum permissible duty value in the constant frequency operating mode. Control switching device 922 accordingly has a constant off-time of o10a in switching cycles 1006(3) and 1006(4). However, respective on-times w10c and w10d of control switching device 922 in switching cycles 1006(3) and 1006(4) differ, such as in response to operating conditions of DC-to-DC converter 904 varying among switching cycles 906(3) and 906(4). Consequently, switching cycles 906(3) and 906(4) have different respective switching frequencies of F10b and F10c, which are the inverse of periods T10b and T10c, respectively. As evident when comparing switching cycles 1006(3) and 1006(4) to switching cycles 1006(1) and 1006(2), switching frequency in the constant off-time operating mode is less than switching frequency in the constant frequency operating mode.
Controller 410 is embodied by a controller 1110 in DC-to-DC converter 1104, and controller 1110 is configured to generate control signals ϕ1 and ϕ2. Controller 1110 is configured to generate control signal ϕ1 to control switching of control switching device 1122 to regulate one or more parameters of DC-to-DC converter 1104. In certain embodiments, such as illustrated in
Controller 1110 generates control signal ϕ1 such that DC-to-DC converter 1104 operates in a constant off-time operating mode in switching cycles 1206(3) and 1206(4), such as in response to duty cycle of control switching device 1122 increasing beyond a maximum permissible constant-frequency duty value in the constant frequency operating mode. Control switching device 1122 accordingly has a constant off-time of o12a in switching cycles 1206(3) and 1206(4). However, respective on-times w12c and w12d of control switching device 1122 in switching cycles 1206(3) and 1206(4) differ, such as in response to operating conditions of DC-to-DC converter 1104 varying among switching cycles 1206(3) and 1206(4). Consequently, switching cycles 1206(3) and 1206(4) have different respective switching frequencies of F12b and F12c, which are the inverse of periods T12b and T12c, respectively. As evident when comparing switching cycles 1206(3) and 1206(4) to switching cycles 1206(1) and 1206(2), switching frequency in the constant off-time operating mode is less than switching frequency in the constant frequency operating mode.
Referring again to
Controller 1300 includes an oscillator 1302, a slope compensation module 1304, a voltage control module 1306, a switching control module 1308, and a mode change module 1310. Oscillator 1302 is configured to generate an oscillator signal OSC and a clock signal CLK, where clock signal CLK is optionally derived from oscillator signal OSC. Additionally, oscillator 1302 is configured to assert a duty cycle signal DMAX in each switching cycle in response to a maximum permissible duty cycle of control switching device 422 having been exceeded. Oscillator signal OSC is, for example, a ramp signal, and slope compensation module 1304 is configured to generate a slope compensation signal SLOPE in response to oscillator signal OSC and σ1. Slope compensation signal SLOPE is, for example, a linear or non-linear slope signal, such as a ramp signal. Voltage control module 1306 is configured to generate an error signal ERR, for example, that is proportional to, or is integral-proportional to, a difference between a magnitude of output voltage Vout and a reference voltage, where the reference voltage is, for example, a desired value of output voltage Vout, or a scaled value of the desired value of output voltage Vow.
Switching control module 1308 includes an amplifier 1312, a comparator 1314, a flip-flop 1316, and an inverter 1318. An output of flip-flop 1316 is control signal ϕ1, and flip-flop 1316 is set by assertion of clock signal CLK signal by oscillator 1302. Accordingly, control signal ϕ1 is asserted in response to assertion of clock signal CLK. Inverter 1318 generates control signal ϕ2 by inverting control signal ϕ1, such that control signal ϕ2 is complementary to control signal ϕ11. Some embodiments of switching control module 1308 additionally include one or more elements (not shown) to insert deadtime between consecutive assertion of controls signals ϕ1 and σ2, to ensure that there is no shoot-through, i.e., simultaneous conduction of control switching device 422 and a freewheeling switching device, such as freewheeling switching device 724, 924, or 1124.
Amplifier 1312 is configured to generate a command signal CMD proportional to a difference between error signal ERR and slope compensation signal SLOPE. Comparator 1314 receives both command signal CMD and signal IL_s as inputs, where signal IL_s represents magnitude current flowing through an inductor of power stage 408. In some embodiments where power stage 408 has a boost topology, a buck-boost topology, or a buck topology, signal IL_s is generated by current sense circuitry 732 (
Mode change module 1310 receives each of duty cycle signal DMAX and control signal ϕ1 as inputs, and mode change module 1310 asserts a signal PAUSE in response to each of the aforementioned inputs being simultaneously asserted. As such, mode change module 1310 asserts signal PAUSE in a given switching cycle in response to control switching device 422 being in its on-state and when the maximum permissible duty cycle of control switching device 422 is reached in the switching cycle. Assertion of signal PAUSE causes oscillator 1302 to change its operation, such as by extending a period of oscillator 1302, thereby causing DC-to-DC converter 404 to change from its constant frequency operating mode to its constant off-time operating mode. For example, in particular embodiments, oscillator 1302 pauses its operation in response to assertion of signal PAUSE, resulting in (a) assertion of clock signal CLK being delayed and (b) magnitude of oscillator signal OSC being maintained at a constant value equal to the last value of the oscillator signal before assertion of signal PAUSE. Slope compensation module 1304 also changes its operation in response to assertion of signal PAUSE, such as in response to magnitude of oscillator signal OSC being maintained at a constant value. For example, in certain embodiments, slope compensation signal SLOPE is maintained at a constant value equal to its last value before assertion of signal PAUSE, in response to assertion of signal PAUSE. In some alternate embodiments, slope compensation module 1304 directly receives signal PAUSE, and slope compensation module 1304 pauses generation of slope compensation signal SLOPE in response to assertion of signal PAUSE.
In the
Oscillator 1600 includes a current source 1602, a p-channel metal oxide field effect transistor (PMOS) 1604, a PMOS 1606, a PMOS 1608, a capacitor 1610, an n-channel metal oxide field effect transistor (NMOS) 1612, a comparator 1614, a delay buffer 1616, an AND gate 1618, a pulse generator 1620, a pulse generator 1622, and an inverter 1624. A source (S) of PMOS 1604 is electrically coupled to a power rail 1626, and each of a gate (G) and drain (D) of PMOS 1604 is electrically coupled to an electric node 1628. Current source 1602 is electrically coupled between electric node 1628 and a reference electric node 1630. A source of PMOS 1608 is electrically coupled to power rail 1626, and a drain of PMOS 1608 is electrically coupled to electric node 1628. A source of PMOS 1606 is electrically coupled to power rail 1626, and a gate of PMOS 1606 is electrically coupled to electric node 1628. A drain of PMOS 1606 is electrically coupled to an oscillator electric node 1632, and capacitor 1610 is electrically coupled between oscillator electric node 1632 and reference electric node 1630. Oscillator electric node 1632 provides oscillator signal OSC. A drain of NMOS 1612 is electrically coupled to oscillator electric node 1632, and a source of NMOS 1612 is electrically coupled to reference electric node 1630.
A non-inverting input of comparator 1614 is electrically coupled to oscillator electric node 1632, and an inverting input of comparator 1614 is electrically coupled to a reference voltage Vref_1. An output of comparator 1614 provides duty cycle signal DMAX, and the output of comparator 1614 is also electrically coupled to an input of delay buffer 1616. An output of delay buffer provides a signal DMAX_B, which is electrically coupled to an input of AND gate 1618. An input of inverter 1624 receives signal PAUSE, and an output of inverter 1624 provides a signal PAUSE_B. Signal PAUSE_B is electrically coupled to each of a gate of PMOS 1608 and another input of AND gate 1618. An output of AND gate 1618 provides a signal DMAX_C which is electrically coupled to an input (I) of pulse generator 1620. An output (O) of pulse generator 1620 provides a signal CLK_B which is electrically coupled to each (a) a gate of NMOS 1612 and (b) an input of pulse generator 1622. An output of pulse generator 1622 provides clock signal CLK.
Signal PAUSE_B is asserted when signal PAUSE is de-asserted, and PMOS 1608 is therefore off when signal PAUSE is de-asserted. Therefore, PMOS 1608 does not affect operation of PMOS 1604 or PMOS 1606 when signal PAUSE is de-asserted. PMOS 1604 and PMOS 1606 collectively mirror a current Ics of current source 1602 to generate a current Ich which charges capacitor 1610. Oscillator signal OSC is equal to a voltage Voc across capacitor 1610, and oscillator signal OSC therefore ramps up as current Ich charges capacitor 1610. Comparator 1614 asserts duty cycle signal DMAX when voltage Voc reaches reference voltage Vref_1, and a duty cycle where a transition between the constant frequency operating mode of DC-to-DC converter 404 and the constant off-time operating mode of DC-to-DC converter 404 occurs is therefore a function of the magnitude of reference voltage Vref_1, capacitance of capacitor 1610, and magnitude of current Ich. Delay buffer 1616 delays asserts signal DMAX_B after a delay following comparator 1614 asserting signal duty cycle signal DMAX, and AND gate 1618 asserts signal DMAX_C when (a) signal DMAX_B is asserted and signal PAUSE is de-asserted. Pulse generator 1620 asserts signal CLK_B in response to signal DMAX_C being asserted, and asserted signal CLK_B is a pulse having a width equal to TMIN_OFF (discussed above with respect to
Assertion of signal PAUSE turns on PMOS 1608, which causes each of PMOS 1604 and PMOS 1606 to turn off. Consequently, assertion of signal PAUSE disables current Ich charging capacitor, and voltage Voc therefore stops ramping upward. Consequently, oscillator signal OSC remains constant at a last value of voltage Voc before signal PAUSE was asserted. Additionally, assertion of signal PAUSE prevents AND gate 1618 from asserting signal DMAX_C, which disables generation of clock signals CLK_B and CLK and discharging of capacitor 1610 while signal PAUSE is asserted. As such, operation of oscillator 1600 is paused when signed PAUSE is asserted.
Voltage control module 1900 includes a resistor 1902, a resistor 1904, a transconductance amplifier 1906, and filter circuitry 1908. Resistor 1902 and resistor 1904 are electrically coupled in series between a node providing output voltage Vout and a reference electric node 1910. An inverting input of transconductance amplifier 1906 is electrically coupled to a divider electric node 1912 where resistor 1902 and resistor 1904 are electrically coupled together. A non-inverting input of transconductance amplifier 1906 is electrically coupled to a reference voltage Vref_2. Filter circuitry 1908 is electrically coupled between an output of transconductance amplifier 1906 and reference electric node 1910. Filter circuitry 1908 is illustrated as including a resistor 1914 electrically coupled in series with a capacitor 1916, although filter circuitry 1908 may vary as a design choice, such as to achieve a desired frequency response of voltage control module 1900. Filter circuitry 1906 integrates a current IERR flowing out of transconductance amplifier 1906 to generate error signal ERR. Transconductance amplifier 1906 generates current IERR in proportion to a difference between voltage at divider electric node 1912 and reference voltage Vref_2. Accordingly, magnitude of output voltage Vout is a function of both (a) a voltage divider formed by resistor 1902 and resistor 1904 and (b) reference voltage Vref_2.
Features described above may be combined in various ways without departing from the scope hereof. The following examples illustrate some possible combinations.
(A1) A method for controlling a direct-current-to-direct-current (DC-to-DC) converter, the method including, in a first switching cycle of the DC-to-DC converter, (1) causing the DC-to-DC converter to operate in a constant frequency operating mode, (2) determining that a duty cycle of a first switching device of the DC-to-DC converter has crossed a first threshold value, and (3) in response to the duty cycle of the first switching device of the DC-to-DC converter crossing the first threshold value, causing the DC-to-DC converter to switch from operating in the constant frequency operating mode to operating in a constant off-time operating mode.
(A2) In the method denoted as (A1), the first threshold value may be a maximum permissible duty cycle of the first switching device of the DC-to-DC converter in the constant frequency operating mode of the DC-to-DC converter.
(A3) In either one of the methods denoted as (A1) and (A2), causing the DC-to-DC converter to operate in the constant off-time operating mode may include changing operation of an oscillator of the DC-to-DC converter.
(A4) In the method denoted as (A3), changing operation of the oscillator of the DC-to-DC converter may include causing the oscillator to maintain an oscillator signal at a constant value while the DC-to-DC converter operates in the constant off-time operating mode.
(A5) In either of the methods denoted as (A3) and (A4), changing operation of the oscillator of the DC-to-DC converter may include extending a period of the oscillator.
(A6) Any one of the methods denoted as (A1) through (A5) may further include, in response to the duty cycle of the first switching device crossing the first threshold value, changing operation of a slope compensation module of the DC-to-DC converter.
(A7) In the method denoted as (A6), changing operation of the slope compensation module of the DC-to-DC converter may include causing the slope compensation module to maintain a slope compensation signal at a constant value while the DC-to-DC converter operates in the constant off-time operating mode.
(A8) Any one of the methods denoted as (A1) through (A7) may further include causing the first switching device to operate in its off-state, in response to magnitude of current flowing through an inductor of the DC-to-DC converter reaching a second threshold value.
(A9) Any one of the methods denoted as (A1) through (A8) may further include, in a second switching cycle of the DC-to-DC converter, causing the DC-to-DC converter to operate in the constant frequency operating mode for an entirety of the second switching cycle of the DC-to-DC converter, in response to the duty cycle of the first switching of the DC-to-DC converter not exceeding the first threshold value before the first switching device of the DC-to-DC converter switches to its off-state.
(B1) A controller for a direct-current-to-direct-current (DC-to-DC) converter includes (1) an oscillator configured to generate an oscillator signal, a clock signal, and a duty cycle signal, the duty cycle signal indicating that a maximum permissible duty cycle of a first switching device of the DC-to-DC converter has been exceeded, (2) a slope compensation module configured to generate a slope compensation signal at least partially based on the oscillator signal, (3) a switching control module configured to generate a control signal to control the first switching device at least partially based on the slope compensation signal and the clock signal, and (4) a mode change module configured to change operation of each of the oscillator and the slope compensation module in response to the duty cycle signal being asserted while the control signal is asserted.
(B2) In the controller denoted as (B1), the switching control module may be further configured to generate the control signal at least partially based on an error signal.
(B3) The controller denoted as (B2) may further include a voltage control module configured to generate the error signal at least partially based on a difference between a voltage of the DC-to-DC converter and a reference voltage.
(B4) In any one of the controllers denoted as (B1) through (B3), the switching control module may be further configured to generate the control signal based on a magnitude of current flowing through an inductor of the DC-to-DC converter.
(B5) In any one of the controllers denoted as (B1) through (B4), the maximum permissible duty cycle of the first switching device of the DC-to-DC converter may be a maximum permissible duty cycle of the first switching device of the DC-to-DC converter in a constant frequency operating mode of the DC-to-DC converter.
(B6) In any one of the controllers denoted as (B1) through (B5), the oscillator may be configured such that the DC-to-DC converter switches from a constant frequency operating mode to a constant off-time operating mode in response to assertion of the duty cycle signal.
(B7) In any one of the controllers denoted as (B1) through (B6), the oscillator may be configured such that a switching frequency of the DC-to-DC converter is reduced in response to assertion of the duty cycle signal.
(C1) A direct-current-to-direct-current (DC-to-DC) converter includes a power stage including a first switching device and a controller communicatively coupled to the power stage. The controller is configured to (1) cause the DC-to-DC converter to operate in a constant frequency operating mode, (2) determine that a duty cycle of the first switching device has crossed a first threshold value, and (3) in response to the duty cycle of the first switching device crossing the first threshold value, cause the DC-to-DC converter to switch from operating in the constant frequency operating mode to operating in a constant off-time operating mode.
(C2) In the DC-to-DC converter denoted as (C1), the first threshold value may be a maximum permissible duty cycle of the first switching device, in the constant frequency operating mode.
(C3) In either one of the DC-to-DC converters denoted as (C1) and (C2), the power stage may have a topology selected from the group consisting of a boost topology, a buck-boost topology, and a buck topology.
(C4) In any one of the DC-to-DC converters denoted as (C1) through (C3), (1) the controller may include an oscillator, (2) the controller may be further configured to cause the DC-to-DC converter to operate in the constant off-time operating mode at least partially by changing operation of the oscillator.
(C5) In the DC-to-DC converter denoted as (C4), changing operation of the oscillator may include disabling a current source charging a capacitor.
(C6) In either one of the DC-to-DC converters denoted as (C4) and (C5), changing operation of the oscillator may include extending a period of the oscillator.
(C7) In any one of the DC-to-DC converters denoted as (C1) through (C3), (1) the controller may include a slope compensation module, (2) the controller may be further configured to change operation of the slope compensation module in response to the duty cycle of the first switching device crossing the first threshold value.
(C8) In the DC-to-DC converter denoted as (C7), (1) the controller may further include an oscillator providing an oscillator signal to the slope compensation module, and (2) the controller may be further configured to change operation of the slope compensation module by changing operation of the oscillator.
Changes may be made in the above methods, devices, and systems without departing from the scope hereof. It should thus be noted that the matter contained in the above description and shown in the accompanying drawings should be interpreted as illustrative and not in a limiting sense. The following claims are intended to cover generic and specific features described herein, as well as all statements of the scope of the present method and system, which as a matter of language, might be said to fall therebetween.
This application claims benefit of U.S. Provisional Patent Application No. 63/517,110, filed on Aug. 1, 2023, which is incorporated herein by reference.
Number | Date | Country | |
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63517110 | Aug 2023 | US |