The present invention relates generally to optoelectronic devices, such as vertical-cavity surface-emitting lasers (VCSELs), and particularly to circuits and methods for driving such devices to generate short optical pulses.
Various schemes for driving VCSELs and other pulsed solid-state emitters are known in the art.
An embodiment of the present invention that is described herein provides an optoelectronic device including a laser diode, a driver and a reverse-bias circuit. The laser diode has a first terminal and a second terminal. The driver is coupled to drive current pulses through the laser diode between the first and second terminals. The reverse-bias circuit is configured to reverse-bias the laser diode during time intervals derived from the current pulses.
In some embodiments, the laser diode includes a vertical-cavity surface-emitting laser (VCSEL). In disclosed embodiments, the reverse-bias circuit is configured to reverse-bias the laser diode at a first time-delay after start times of the current pulses, and to stop reverse-biasing the laser diode at a second time-delay after end times of the current pulses. In an example embodiment, by reverse-biasing the laser diode, the reverse-bias circuit is configured to set a fall time of 40 db of an emitted optical energy of the laser diode to less than 2 nano-seconds.
In some embodiments, the driver includes a unidirectional current source configured to generate the current pulses, and the reverse-bias circuit includes an additional power source configured to generate power for reverse-biasing the laser diode. In an embodiment, the additional power source includes a charge-pump circuit. In another embodiment, the additional power source includes a resistance, across which a voltage drop develops as a result of the current pulses. In yet another embodiment, the driver is configured to generate the current pulses from a first supply voltage, and wherein the reverse-bias circuit is configured to reverse-bias the laser diode using a second supply voltage, higher than the first supply voltage.
There is additionally provided, in accordance with an embodiment of the present invention, a method including driving current pulses through a laser diode. The laser diode is reverse-biased during time intervals derived from the current pulses.
The present invention will be more fully understood from the following detailed description of the embodiments thereof, taken together with the drawings in which:
Semiconductor laser diodes, and particularly VCSELs, are used in a variety of applications to generate short, high-power optical pulses. For example, in depth mapping based on time of flight (ToF) measurement, one or more VCSELs direct optical pulses toward a target scene, and a receiver senses the times of arrival of photons reflected back from points in the scene in order to create the depth map. The temporal resolution of the ToF measurements, and hence the depth resolution of the map, are limited by the temporal duration of the optical pulses emitted by the VCSELs. For this reason, the VCSELs are typically driven to emit pulses having a duration on the order of a few nanoseconds (e.g., 2 ns).
Various schemes can be used for shortening the duration of pulses emitted by VCSELs. It is possible, for example, to form a short circuit between the anode terminal and the cathode terminal of the VCSEL, thus discharging residual charge and terminating optical emission. Such schemes are less suitable since they do not deplete the residual charge form the quantum wells.
To achieve high peak current with low average power consumption, these sorts of portable devices may use a unidirectional current source, which quickly forces current through the VCSEL in one direction, and then quickly turns off the current until the next pulse. (The term “current source,” as used in the context of the present description and in the claims, includes sources of both positive and negative currents, which are commonly referred to respectively as current sources and current sinks.) When this sort of scheme is used, however, residual charge remains at the junction (active region made by quantum wells and barrier layers) of the VCSEL even after the current source has been shut off. This residual charge causes the VCSEL to continue emitting optical radiation, with the result that the optical pulse has a long “tail” following the end of the current pulse. When the VCSEL is used in a ToF-based depth mapper, this lengthening of the optical pulses can have a deleterious effect on depth mapping performance, as explained above.
One way to shorten the above-described “tail” is to rapidly discharge the laser diode at the conclusion of the current pulse using a discharge switch that forms a short circuit between the anode terminal and the cathode terminal of the laser diode. This technique shortens the “tail”, but a residual tail remains, which may limit the accuracy of ToF measurements.
Embodiments of the present invention that are described herein rapidly discharge the laser diode at the conclusion of the current pulse by reverse biasing the laser diode, e.g., at a voltage of −0.5V. As simulated, if the laser diode is shorted at the conclusion of the current pulse, the light power drops by 40 db (decibel) in 2.5 ns (nanosecond), whereas, in embodiment according to the present invention, reverse-biasing the laser diode causes the light power to drop by 40 db in 1.5 ns.
In an embodiment, the reverse biasing is achieved by applying a voltage level to the cathode that is greater than the voltage level applied to the anode by 0.5V or more. In another embodiment, a charge-pump circuit generates the power source used to reverse-bias the diode, and in yet another embodiment the reverse bias is generated by voltage drops generated by the VCSEL current, when passing through resistances (the intrinsic resistance of the path, or a combination of the intrinsic resistance and a dedicated resistor).
The anode terminal of the VCSEL is connected to a voltage source (Vlaser) 104, which charges a capacitor Canode 106 between laser pulses (capacitor Canode 106 may be needed if the instantaneous current through VCSEL 102 at any time is beyond the drive capability of voltage source 104).
A Driver Circuit 108 is operable to sink short, intense, unidirectional current pulses, from voltage source 104 and capacitor Canode 106, through VCSEL 102 (from VCSEL anode to VCSEL cathode), thus causing the VCSEL to emit light pulses. (The driver circuit is thus unidirectional, with low power consumption and heat dissipation, in contrast to bidirectional driver circuits based on push-pull arrangements.)
Driver Circuit 108 comprises a switchable current source 110, a reverse bias voltage source Vsrc 112, a decoupling capacitor Cr-bias 114, a switch 116 (e.g., a suitable transistor) and a Pulse-Control circuit 118. Voltage source Vsrc 112 adds a Vrb voltage potential to Vlaser, charging capacitor Cr-bias 114 to Vlaser+Vrb. In embodiments that are described herein, Vrb may be generated by a charge pump, by voltage drop over a resistive path or by a separate voltage supply; in other embodiments any other suitable circuits may be used to generate Vlaser+Vrb. In embodiments, Vrb is typically 0.5V.
To drive VCSEL 102, Pulse-Control 118 controls current-source 110 to sink a current pulse from the cathode of the VCSEL, which generates a corresponding light pulse. When the current pulse ends, the light pulse may not stop immediately but, rather, light intensity may gradually decrease. Such gradual decrease may reduce the accuracy of ToF measurements.
According to the example embodiment illustrated in
Thus, according to the example embodiment illustrated in
As would be appreciated, the structure of driver circuit 108 described above is cited by way of example. Driver circuits in accordance with the disclosed techniques are not limited to the description hereinabove. In alternative embodiments, for example, the polarities of VCSEL 102, current source 110 and Vsrc 112 may be reversed (e.g., current source 110 will source current pulses into the anode of VCSEL 102, the cathode of the VCSEL will be coupled to a zero potential, and the voltage on capacitor Cr-bias 114 will be negative). In an embodiment, Canode 106 and/or Cr-bias 114 may comprise a plurality of capacitors, of the same or of different types. In some embodiments, the anode of VCSEL 102 is coupled to voltage source 104 through an additional switch, for example, to allow an x-y selection of a single VCSEL from an array of VCSELs.
A Driver Circuit 210 is configured to drive VCSEL 102 with current pulses, and to terminate the current pulses by reverse-biasing the VCSEL. The driver circuit comprises an adjustable reference current source 212; an N-MOS transistor 214, which is configured as a forward-biased diode; an N-MOS transistor 216, whose gate is coupled to a VDDA voltage level (VDDA is set so that transistor 216 is at the saturation region e.g., 5V; in some embodiments, VDDA is the internal digital voltage supply); an N-MOS transistor 218, which is configured as a current mirror of transistor 214; and, an N-MOS transistor 220, which is configured to allow current pulses through transistor 218 when a Sink-Control input is at a Logic-High level.
The adjustable reference current source 212 is configured to sink an adjustable current from a VDDA source (In some embodiments, the adjustable reference current source is coupled to a Digital-to-Analog Converter (DAC), to allow digital control of the sourced current).
As would be appreciated, transistor pairs 214, 216 and 218, 220 are configured as a current mirror; when the gate of transistor 220 is at a logic-high level, the current through transistors 218, 220 will equal the current through the adjustable current source 212. In some embodiments, transistors 214 and 218 have similar geometries and hence similar electrical parameters. In other embodiments, the ratio between the channel widths of transistors 214 and 218 is preset (when the circuit is designed), and thus the current through transistors 218, 220 is a known multiple of the current sourced by the adjustable current source.
Thus, when the sink-control input is at logic-high, Driver-Circuit 210 sinks an adjustable current through VCSEL 102, which, in response, emits light.
The Driver Circuit further comprises a P-MOS transistor 222, which is configured to connect the cathode of VCSEL 102 to the reverse bias input of the driver circuit (coupled to VDD-HD 208) when an rb-control input, coupled to the gate of transistor 222, is at a low voltage (e.g., 0 V). The rb-control input is pulsed low when (or a short time before) the sink control pulse ends. As a result of the reverse bias, the light emitted by VCSEL 102 rapidly turns off.
In summary, according to the example embodiment illustrated in
As would be appreciated, the structure of driver circuit 210 described above is cited by way of example. driver circuits in accordance with the disclosed techniques are not limited to the description hereinabove. In alternative embodiments, for example, some or all of N-MOS transistors 214, 216, 218, 220 and P-MOS transistor 222 may be replaced by any other suitable electronic devices, including but not limited to J-FET transistors, bipolar transistors, SCRs and thyristors.
As explained above the negative pulse on the rb-control input reverse-biases the VCSEL, causing a fast termination of the current pulse through the VCSEL and rapid termination of the light pulse.
A waveform 306 illustrates the optical output of the VCSEL when the reverse bias voltage is 0V (e.g., when the RB control pulse is on (low), the cathode and the anode of the VCSEL are shorted to each other). The current starts to fall at a sharp slope, but at some point the slope gentles, and a current “tail” (as well as a “tail” in the emitted light) occurs.
According to embodiments of the present invention, for shorter “tails”, the reverse bias voltage is negative. A waveform 308 illustrates the optical output of the VCSEL when the reverse bias voltage is −2V. As can be seen, the “tail” is considerably shorter than the tail of waveform 306.
As would be appreciated, the waveforms illustrated in
The power of the emitted light as a function of time is illustrated in a curve 402 for the case wherein Vrb=0V, and in a curve 404 for Vrb=−2V. Curves 402 and 404 were extracted using circuit simulations. As can be seen, curves 402 and 404 track each other until they reach a power level of approximately −30 db. From that point on, curve 404 continues to fall sharply, whereas curve 402 exhibits a substantial “tail”.
Further embodiments according to the present invention that will be disclosed herein comprise the same Driver Circuit 210 of the embodiment illustrated in
As would be appreciated, the embodiments disclosed in
In various embodiments, Driver Circuit 108 and/or 210, and/or charge pump 502, may be implemented using suitable hardware, such as one or more Application-Specific Integrated Circuits (ASIC), using discrete components, or a combination of ASIC and discrete components.
Although the embodiments described herein mainly address turn-off techniques for VCSEL laser diodes, the methods and circuits described herein can also be used in other applications such as turn-off of other suitable laser diodes, and in light emitting diodes (LEDs).
It will thus be appreciated that the embodiments described above are cited by way of example, and that the present invention is not limited to what has been particularly shown and described hereinabove. Rather, the scope of the present invention includes both combinations and sub-combinations of the various features described hereinabove, as well as variations and modifications thereof which would occur to persons skilled in the art upon reading the foregoing description and which are not disclosed in the prior art. Documents incorporated by reference in the present patent application are to be considered an integral part of the application except that to the extent any terms are defined in these incorporated documents in a manner that conflicts with the definitions made explicitly or implicitly in the present specification, only the definitions in the present specification should be considered.
This application claims the benefit of U.S. Provisional Patent Application 63/070,295, filed Aug. 26, 2020, which is incorporated herein by reference.
Number | Date | Country | |
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63070295 | Aug 2020 | US |